公开(公告)号：US20190272456A1

公开(公告)日：2019-09-05

申请号：US16412139

申请日：2019-05-14

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Steven B. Roach ,  Richard A. Blanchard ,  Eric W. Kahrs ,  Larry Todd Biggs ,  Chye Kiat Ang ,  Mark D. Lowenthal ,  William J. Ray

IPC: G06K19/07 ,  G06K19/04 ,  H01L25/075

Abstract: In one embodiment, an authentication area on a portable object comprises a random arrangement of printed LEDs and a wavelength conversion layer. The object to be authenticated may be a credit card, casino chip, or other object. When the LEDs are energized during authentication of the object, the emitted spectrum and/or persistence of the wavelength conversion layer is detected and encoded in a first code, then compared to valid codes stored in the database. If there is a match, the object is authenticated. The LED power may be remotely inductively coupled and may flash the LEDs, while the wavelength conversion layer emission slowly decays during its optical detection. The flash of blue LED light may be emitted from the edges of the object, which may act as a light guide, for optical feedback to the user that the object is being authenticated.

公开(公告)号：US20190130821A1

公开(公告)日：2019-05-02

申请号：US16219463

申请日：2018-12-13

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Brian D. Ogonowsky

IPC: G09G3/32 ,  H01L23/00 ,  H01L33/06 ,  H01L33/32 ,  H01L33/40 ,  H01L33/50 ,  H01L33/48 ,  H01L33/62 ,  H01L33/58 ,  H01L33/54 ,  H01L33/00

CPC classification number: G09G3/32 ,  G06T2207/20021 ,  G09G2300/04 ,  H01L24/00 ,  H01L25/0753 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/32 ,  H01L33/405 ,  H01L33/486 ,  H01L33/502 ,  H01L33/54 ,  H01L33/58 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2933/0066 ,  H01L2933/0083

Abstract: Pixel locations in an addressable display are defined by metal landings on a top surface of a flexible substrate, such as by depositing a metal film and etching the film. The substrate surface may be hydrophobic so that the hydrophobic surface is exposed between the metal landings. The substrate has conductive vias that connect the metal landings to traces on a bottom surface of the substrate for connection to addressing circuitry. LED ink is then blanket-printed over the top surface and cured to electrically connect bottom electrodes of the LEDs to the metal landings. LEDs that fall between the landings are ineffective. A dielectric layer is blanket-printed which exposes the top electrodes, and a transparent conductor layer is blanket-printed over the LEDs to connect all LEDs associated with an individual pixel location in parallel. Accordingly, all printed steps can be performed without any alignment.

公开(公告)号：US10201051B1

公开(公告)日：2019-02-05

申请号：US16003544

申请日：2018-06-08

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard A. Blanchard

IPC: H01L27/15 ,  H01L33/00 ,  H05B33/08 ,  H01L33/36

Abstract: An LED module is disclosed containing an integrated MOSFET driver transistor in series with an LED. In one embodiment, GaN-based LED layers are epitaxially grown over an interface layer on a silicon substrate. The MOSFET gate is formed in a trench in the silicon substrate and creates a vertical channel between a top source and a bottom drain when the gate is biased to turn on the LED. A conductor on the die connects the MOSFET in series with the LED. One power electrode is located on a top of the die, another power electrode is located on the bottom of the die, and the gate electrode may be on the top or the side of the die.

公开(公告)号：US20180132347A1

公开(公告)日：2018-05-10

申请号：US15868773

申请日：2018-01-11

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： William Johnstone Ray ,  Richard Austin Blanchard ,  Mark David Lowenthal ,  Bradley Steven Oraw

IPC: H05K1/02 ,  H01L23/00

CPC classification number: H05K1/0296 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/00 ,  H01L24/06 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L24/95 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/0753 ,  H01L25/18 ,  H01L25/50 ,  H01L33/20 ,  H01L2221/68381 ,  H01L2224/06181 ,  H01L2224/24137 ,  H01L2224/25105 ,  H01L2224/25174 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82143 ,  H01L2224/92244 ,  H01L2224/95085 ,  H01L2224/95101 ,  H01L2224/95102 ,  H01L2224/95115 ,  H01L2224/95143 ,  H01L2224/95146 ,  H01L2924/10253 ,  H01L2924/12 ,  H01L2924/1203 ,  H01L2924/12041 ,  H01L2924/13 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091

Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.

公开(公告)号：US20180102457A1

公开(公告)日：2018-04-12

申请号：US15835944

申请日：2017-12-08

Applicant: NthDegree Technologies Worldwide Inc.

Inventor： William Johnstone Ray ,  Mark D. Lowenthal ,  Neil O. Shotton ,  Richard A. Blanchard ,  Mark Allan Lewandowski ,  Kirk A. Fuller ,  Donald Odell Frazier

IPC: H01L33/00 ,  H01L33/08 ,  H01L33/20 ,  H01L31/0352 ,  H01L31/0232 ,  H01L21/30 ,  H01L33/30 ,  H01L33/34 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L51/52 ,  H01L27/142 ,  H01L27/15 ,  H01L31/028 ,  H01L31/0304 ,  H01L31/0328 ,  H01L31/05 ,  H01L33/32 ,  H01L31/0475 ,  H01L31/068 ,  H01L31/054 ,  H01L27/32 ,  H01L51/56 ,  H01L51/44 ,  H01L51/00 ,  B82Y30/00 ,  B82Y20/00

Abstract: The present invention provides an electronic apparatus, such as a lighting device comprised of light emitting diodes (LEDs) or a power generating apparatus comprising photovoltaic diodes, which may be created through a printing process, using a semiconductor or other substrate particle ink or suspension and using a lens particle ink or suspension. An exemplary apparatus comprises a base; at least one first conductor; a plurality of diodes coupled to the at least one first conductor; at least one second conductor coupled to the plurality of diodes; and a plurality of lenses suspended in a polymer deposited or attached over the diodes. The lenses and the suspending polymer have different indices of refraction. In some embodiments, the lenses and diodes are substantially spherical, and have a ratio of mean diameters or lengths between about 10:1 and 2:1. The diodes may be LEDs or photovoltaic diodes, and in some embodiments, have a junction formed at least partially as a hemispherical shell or cap.

公开(公告)号：US20180023793A1

公开(公告)日：2018-01-25

申请号：US15707739

申请日：2017-09-18

Applicant: NthDegree Technologies Worldwide Inc.

Inventor： Mark David Lowenthal ,  William Johnstone Ray ,  Neil O. Shotton ,  Richard A. Blanchard ,  Brad Oraw ,  Mark Allan Lewandowski ,  Jeffrey Baldridge ,  Eric Anthony Perozziello

IPC: F21V23/06 ,  F21V3/04 ,  F21V5/04 ,  F21V7/00 ,  F21V9/16 ,  F21V19/00 ,  F21V23/00 ,  F21V23/04 ,  H01L23/00 ,  H01L25/04 ,  H01L25/075 ,  H01L33/06 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/42 ,  H01L33/48 ,  H01L51/56 ,  H01L51/52 ,  H01L33/62 ,  H01L33/58 ,  H01L33/50 ,  H01L33/38 ,  H01L33/20 ,  F21Y101/00 ,  H01L27/15

CPC classification number: F21V3/06 ,  F21K9/13 ,  F21K9/135 ,  F21K9/17 ,  F21K9/175 ,  F21K9/232 ,  F21K9/27 ,  F21K9/50 ,  F21K9/56 ,  F21V3/049 ,  F21V5/048 ,  F21V7/0066 ,  F21V9/30 ,  F21V19/0005 ,  F21V23/003 ,  F21V23/04 ,  F21V23/06 ,  F21Y2101/00 ,  F21Y2101/02 ,  F21Y2103/003 ,  F21Y2107/20 ,  F21Y2111/004 ,  F21Y2113/005 ,  F21Y2115/10 ,  H01L24/24 ,  H01L24/95 ,  H01L25/048 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/38 ,  H01L33/382 ,  H01L33/42 ,  H01L33/483 ,  H01L33/486 ,  H01L33/50 ,  H01L33/58 ,  H01L33/62 ,  H01L51/52 ,  H01L51/5203 ,  H01L51/56 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/95101 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An exemplary printable composition of a liquid or gel suspension of diodes generally includes a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary apparatus may include: a plurality of diodes; at least a trace amount of a first solvent; and a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.

公开(公告)号：US09777914B2

公开(公告)日：2017-10-03

申请号：US14630266

申请日：2015-02-24

Applicant: NthDegree Technologies Worldwide Inc.

Inventor： Mark David Lowenthal ,  William Johnstone Ray ,  Neil O. Shotton ,  Richard A. Blanchard ,  Brad Oraw ,  Mark Allan Lewandowski ,  Jeffrey Baldridge ,  Eric Anthony Perozziello

IPC: H01J1/62 ,  H01L25/04 ,  H01L51/52 ,  H01L51/56 ,  H01L23/00 ,  F21V23/06 ,  F21V7/00 ,  H01L33/50 ,  H01L25/075 ,  H01L33/38 ,  H01L33/48 ,  F21V3/04 ,  F21V5/04 ,  F21V9/16 ,  F21V19/00 ,  F21V23/00 ,  F21V23/04 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32 ,  H01L33/62 ,  F21K9/232 ,  H01L33/22 ,  H01L33/42 ,  H01L33/58 ,  F21K9/27 ,  H01L33/20 ,  F21Y101/00 ,  F21Y115/10 ,  F21Y107/20 ,  H01L27/15

CPC classification number: F21V23/06 ,  F21K9/232 ,  F21K9/27 ,  F21V3/049 ,  F21V3/06 ,  F21V5/048 ,  F21V7/0066 ,  F21V9/30 ,  F21V19/0005 ,  F21V23/003 ,  F21V23/04 ,  F21Y2101/00 ,  F21Y2107/20 ,  F21Y2115/10 ,  H01L24/24 ,  H01L24/95 ,  H01L25/048 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/38 ,  H01L33/382 ,  H01L33/42 ,  H01L33/483 ,  H01L33/486 ,  H01L33/50 ,  H01L33/58 ,  H01L33/62 ,  H01L51/52 ,  H01L51/5203 ,  H01L51/56 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/95101 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An exemplary printable composition of a liquid or gel suspension of diodes generally includes a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary apparatus may include: a plurality of diodes; at least a trace amount of a first solvent; and a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.

公开(公告)号：US20170125823A1

公开(公告)日：2017-05-04

申请号：US15406407

申请日：2017-01-13

Applicant: NTHDEGREE TECHNOLOGIES WORLDWIDE INC.

Inventor： Vera N. Lockett ,  John G. Gustafson ,  William J. Ray ,  Yasser Salah

IPC: H01M4/90 ,  H01M10/05 ,  H01G11/46 ,  H01M4/50 ,  H01G11/24 ,  H01G11/36 ,  H01M8/16 ,  H01M6/40

CPC classification number: H01M4/9016 ,  C09D5/00 ,  H01G11/24 ,  H01G11/36 ,  H01G11/38 ,  H01G11/46 ,  H01G11/52 ,  H01M2/1646 ,  H01M4/48 ,  H01M4/50 ,  H01M4/502 ,  H01M4/625 ,  H01M6/40 ,  H01M8/16 ,  H01M10/05 ,  H01M10/36 ,  Y02E60/13

Abstract: An energy storage device can include a cathode having a first plurality of frustules, where the first plurality of frustules can include nanostructures having an oxide of manganese. The energy storage device can include an anode comprising a second plurality of frustules, where the second plurality of frustules can include nanostructures having zinc oxide. A frustule can have a plurality of nanostructures on at least one surface, where the plurality of nanostructures can include an oxide of manganese. A frustule can have a plurality of nanostructures on at least one surface, where the plurality of nanostructures can include zinc oxide. An electrode for an energy storage device includes a plurality of frustules, where each of the plurality of frustules can have a plurality of nanostructures formed on at least one surface.

公开(公告)号：US20170125372A1

公开(公告)日：2017-05-04

申请号：US15408930

申请日：2017-01-18

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： William Johnstone Ray ,  Richard Austin Blanchard ,  Mark David Lowenthal ,  Bradley Steven Oraw

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/07 ,  H01L25/00

CPC classification number: H01L24/95 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/06 ,  H01L24/24 ,  H01L24/25 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/0753 ,  H01L25/18 ,  H01L25/50 ,  H01L33/20 ,  H01L2221/68381 ,  H01L2224/06181 ,  H01L2224/24137 ,  H01L2224/25105 ,  H01L2224/25174 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82143 ,  H01L2224/92244 ,  H01L2224/95085 ,  H01L2224/95101 ,  H01L2224/95102 ,  H01L2224/95115 ,  H01L2224/95143 ,  H01L2224/95146 ,  H01L2924/10253 ,  H01L2924/12 ,  H01L2924/1203 ,  H01L2924/12041 ,  H01L2924/13 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H05K1/029 ,  H05K1/0296 ,  H05K3/12

Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.

公开(公告)号：US20170077344A1

公开(公告)日：2017-03-16

申请号：US15359514

申请日：2016-11-22

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Tricia Youngbull ,  Bradley Steven Oraw ,  William Johnstone Ray

IPC: H01L31/18 ,  H01L31/0443 ,  H01L31/0463 ,  H01L31/0352

CPC classification number: H01L31/1824 ,  H01L27/1421 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/0443 ,  H01L31/046 ,  H01L31/0463 ,  H01L31/0465 ,  H01L31/18 ,  H01L31/188 ,  Y02E10/50

Abstract: A PV module is formed having an array of PV cells, where the cells are separated by gaps. Each cell contains an array of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The diodes and conductor layers may be patterned by printing. A continuous metal substrate supports the diodes and conductor layers in all the cells. A dielectric substrate is laminated to the metal substrate. Trenches are then formed by laser ablation around the cells to sever the metal substrate to form electrically isolated PV cells. A metallization step is then performed to connect the cells in series to increase the voltage output of the PV module. An electrically isolated bypass diode for each cell is also formed by the trenching step. The metallization step connects the bypass diode and its associated cell in a reverse-parallel relationship.

Abstract translation: 形成具有PV电池阵列的PV模块，其中电池被间隙分开。 每个电池都包含并联连接的小硅球二极管阵列（直径10-300微米）。 可以通过印刷将二极管和导体层图案化。 连续的金属基板在所有单元中支撑二极管和导体层。 将电介质基板层压到金属基板上。 然后通过在细胞周围的激光烧蚀形成沟槽，以切断金属基底以形成电隔离的PV电池。 然后执行金属化步骤以串联连接电池，以增加PV模块的电压输出。 用于每个电池的电隔离旁路二极管也通过开沟步骤形成。 金属化步骤以反平行关系连接旁路二极管及其相关联的电池。