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公开(公告)号：US09397070B2
公开(公告)日：2016-07-19
申请号：US14766504
申请日：2014-09-17
发明人： Yujuan Tao
CPC分类号： H01L24/96 , H01L21/4853 , H01L21/486 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/82 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L23/544 , H01L24/17 , H01L24/19 , H01L24/29 , H01L24/83 , H01L24/97 , H01L2223/54426 , H01L2223/54486 , H01L2224/04105 , H01L2224/12105 , H01L2224/1301 , H01L2224/16225 , H01L2224/17181 , H01L2224/24195 , H01L2224/29026 , H01L2224/32225 , H01L2224/73204 , H01L2224/818 , H01L2224/97 , H01L2924/014 , H01L2924/15311 , H01L2924/15788 , H01L2924/19105 , H01L2924/3511 , H01L2224/81 , H01L2224/83 , H01L2924/00
摘要： A method for forming a package structure is provided, which includes: providing a pre-packaged panel including a first encapsulation layer, which includes multiple integrating units each including at least one semiconductor chip with multiple first pads, and first metal bumps are disposed on the first pads; providing a circuit board including a first surface and a second surface, where the circuit board includes multiple carrying units each including multiple input pads on the first surface and multiple output pads on the second surface; mounting the pre-packaged panel on the first surface to form multiple package units; forming a filling layer by filling a space between the first surface and the pre-packaged panel; forming second metal bumps on the output pads on the second surface; cutting the structure based on the multiple package units to form multiple independent package structures. Accordingly, the package structure improves package efficiency.
摘要翻译： 提供了一种用于形成封装结构的方法，其包括：提供包括第一封装层的预封装面板，所述第一封装层包括多个积分单元，每个积分单元包括具有多个第一焊盘的至少一个半导体芯片，并且第一金属凸块设置在 第一垫 提供包括第一表面和第二表面的电路板，其中所述电路板包括多个承载单元，每个承载单元包括在所述第一表面上的多个输入焊盘和所述第二表面上的多个输出焊盘; 将预包装的面板安装在第一表面上以形成多个包装单元; 通过填充第一表面和预包装的面板之间的空间来形成填充层; 在第二表面上的输出焊盘上形成第二金属凸块; 基于多个包装单元切割结构以形成多个独立的包装结构。 因此，封装结构提高了封装效率。
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公开(公告)号：US20160172321A1
公开(公告)日：2016-06-16
申请号：US14971495
申请日：2015-12-16
发明人： GUOHUA GAO
IPC分类号： H01L23/00
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/02123 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05007 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05547 , H01L2224/05557 , H01L2224/05558 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11334 , H01L2224/11849 , H01L2224/13026 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16503 , H01L2224/8181 , H01L2924/00014 , H01L2924/014
摘要： A method for wafer-level packaging includes providing a substrate having a conductive metal pad formed on the surface of the substrate; forming a metal core on the top of the conductive metal pad with the metal core protruding from the surface of the substrate; then, forming an under bump metal layer on the top surface and the side surface of the metal core; and finally, forming a bump structure on the top of the under bump metal layer.
摘要翻译： 一种用于晶片级封装的方法包括提供一种在衬底的表面上形成有导电金属焊盘的衬底; 在金属芯从基板的表面突出的状态下在导电金属焊盘的顶部上形成金属芯; 然后在金属芯的顶表面和侧表面上形成凸块下金属层; 最后，在凸块下方的金属层的顶部形成凸块结构。
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公开(公告)号：US09293338B2
公开(公告)日：2016-03-22
申请号：US14074687
申请日：2013-11-07
发明人： Chang-Ming Lin , Yu-Juan Tao
IPC分类号： H01L21/285 , H01L23/00 , H01L21/28 , H01L23/36 , H01L23/367 , H01L23/498 , H01L23/31
CPC分类号： H01L23/485 , H01L21/28 , H01L21/28587 , H01L23/3121 , H01L23/3142 , H01L23/3192 , H01L23/36 , H01L23/3675 , H01L23/3677 , H01L23/48 , H01L23/482 , H01L23/49838 , H01L23/49861 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2224/02311 , H01L2224/02313 , H01L2224/02331 , H01L2224/0239 , H01L2224/0345 , H01L2224/0361 , H01L2224/03612 , H01L2224/03614 , H01L2224/03912 , H01L2224/0401 , H01L2224/05025 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/06102 , H01L2224/1132 , H01L2224/11462 , H01L2224/1147 , H01L2224/1182 , H01L2224/11825 , H01L2224/11849 , H01L2224/119 , H01L2224/11903 , H01L2224/1191 , H01L2224/13024 , H01L2224/13076 , H01L2224/13082 , H01L2224/13084 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13541 , H01L2224/13562 , H01L2224/1357 , H01L2224/13582 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/14051 , H01L2224/16055 , H01L2224/16058 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/17106 , H01L2224/17519 , H01L2224/73204 , H01L2224/81191 , H01L2224/81424 , H01L2224/81447 , H01L2224/831 , H01L2224/92 , H01L2224/92125 , H01L2224/94 , H01L2924/12042 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2224/03 , H01L2224/11 , H01L2224/0231 , H01L21/304 , H01L21/78 , H01L2224/81 , H01L2924/00
摘要： A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.
摘要翻译： 提供半导体封装方法。 该方法包括提供半导体衬底。 半导体衬底具有第一表面和第二表面，以及在半导体衬底的第一表面上的电镀籽晶层。 该方法还包括在电镀种子层上形成多个柱状电极，其中柱状电极包括第一柱状电极和第二柱状电极。 此外，该方法包括在第一柱状电极和第二柱状电极上形成扩散阻挡层，在第一柱状电极上的扩散阻挡层上形成多个第一焊球。 该方法还包括提供具有对应于第一焊球的焊接端子的封装基板，并将半导体基板安装在翻转位置的封装基板上，使得第一焊球与焊接端子连接。
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公开(公告)号：US20160043020A1
公开(公告)日：2016-02-11
申请号：US14780233
申请日：2014-06-26
发明人： Xin XIA , Wanchun DING , Guohua GAO
CPC分类号： H01L23/49537 , H01L21/4828 , H01L21/56 , H01L23/293 , H01L23/3107 , H01L23/3135 , H01L23/3171 , H01L23/49548 , H01L23/49572 , H01L23/49582 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0345 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/1145 , H01L2224/11462 , H01L2224/1147 , H01L2224/1181 , H01L2224/11849 , H01L2224/119 , H01L2224/13007 , H01L2224/13021 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/16245 , H01L2224/48091 , H01L2224/48247 , H01L2224/81191 , H01L2224/81801 , H01L2224/81815 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01073 , H01L2924/2064 , H01L2924/00014 , H01L2924/01047 , H01L2924/014
摘要： The present invention provides a semiconductor package structure, including: a chip, wherein bonding pads and a passivation layer are arranged on the surface of the chip, the passivation layer is provided with first openings for exposing the bonding pads, and a seed layer connected with the bonding pads and columnar salient points stacked on the seed layer are arranged on the bonding pads; lead frames, wherein each lead frame is provided with a plurality of discrete pins, and internal pins and external pins are respectively arranged on two opposite surfaces of the pins; the chip being flipped on the lead frames, and the columnar salient points being connected with the internal pins; a plastic package layer, wherein the plastic package layer is used for sealing the chip, the columnar salient points and the lead frames and exposing the external pins. By adopting the present invention, a transverse area occupied by the package structure is decreased, the volume of the entire package structure is correspondingly decreased, and the integration level of the package structure is improved. The present invention further provides a forming method of the semiconductor package structure.
摘要翻译： 本发明提供了一种半导体封装结构，包括：芯片，其中，焊盘和钝化层布置在芯片的表面上，钝化层设置有用于暴露焊盘的第一开口，以及与 层叠在种子层上的接合焊盘和柱状突出点配置在接合焊盘上; 引线框架，其中每个引线框架设置有多个分立的引脚，并且内部引脚和外部引脚分别布置在引脚的两个相对表面上; 芯片在引线框架上翻转，柱状突出点与内部引脚连接; 塑料封装层，其中塑料封装层用于密封芯片，柱状突出点和引线框架，并露出外部引脚。 通过采用本发明，封装结构占据的横向面积减小，整体封装结构的体积相应减小，并提高了封装结构的集成度。 本发明还提供一种半导体封装结构的形成方法。
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公开(公告)号：US20160035696A1
公开(公告)日：2016-02-04
申请号：US14766504
申请日：2014-09-17
发明人： Yujuan Tao
CPC分类号： H01L24/96 , H01L21/4853 , H01L21/486 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/82 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L23/544 , H01L24/17 , H01L24/19 , H01L24/29 , H01L24/83 , H01L24/97 , H01L2223/54426 , H01L2223/54486 , H01L2224/04105 , H01L2224/12105 , H01L2224/1301 , H01L2224/16225 , H01L2224/17181 , H01L2224/24195 , H01L2224/29026 , H01L2224/32225 , H01L2224/73204 , H01L2224/818 , H01L2224/97 , H01L2924/014 , H01L2924/15311 , H01L2924/15788 , H01L2924/19105 , H01L2924/3511 , H01L2224/81 , H01L2224/83 , H01L2924/00
摘要： A method for forming a package structure is provided, which includes: providing a pre-packaged panel including a first encapsulation layer, which includes multiple integrating units each including at least one semiconductor chip with multiple first pads, and first metal bumps are disposed on the first pads; providing a circuit board including a first surface and a second surface, where the circuit board includes multiple carrying units each including multiple input pads on the first surface and multiple output pads on the second surface; mounting the pre-packaged panel on the first surface to form multiple package units; forming a filling layer by filling a space between the first surface and the pre-packaged panel; forming second metal bumps on the output pads on the second surface; cutting the structure based on the multiple package units to form multiple independent package structures. Accordingly, the package structure improves package efficiency.
摘要翻译： 提供了一种用于形成封装结构的方法，其包括：提供包括第一封装层的预封装面板，所述第一封装层包括多个积分单元，每个积分单元包括具有多个第一焊盘的至少一个半导体芯片，并且第一金属凸块设置在 第一垫 提供包括第一表面和第二表面的电路板，其中所述电路板包括多个承载单元，每个承载单元包括在所述第一表面上的多个输入焊盘和所述第二表面上的多个输出焊盘; 将预包装的面板安装在第一表面上以形成多个包装单元; 通过填充第一表面和预包装的面板之间的空间来形成填充层; 在第二表面上的输出焊盘上形成第二金属凸块; 基于多个包装单元切割结构以形成多个独立的包装结构。 因此，封装结构提高了封装效率。
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公开(公告)号：US20160155684A1
公开(公告)日：2016-06-02
申请号：US15014929
申请日：2016-02-03
发明人： CHANG-MING LIN , YU-JUAN TAO
IPC分类号： H01L23/367 , H01L23/00 , H01L23/31 , H01L23/498
CPC分类号： H01L23/485 , H01L21/28 , H01L21/28587 , H01L23/3121 , H01L23/3142 , H01L23/3192 , H01L23/36 , H01L23/3675 , H01L23/3677 , H01L23/48 , H01L23/482 , H01L23/49838 , H01L23/49861 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2224/02311 , H01L2224/02313 , H01L2224/02331 , H01L2224/0239 , H01L2224/0345 , H01L2224/0361 , H01L2224/03612 , H01L2224/03614 , H01L2224/03912 , H01L2224/0401 , H01L2224/05025 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/06102 , H01L2224/1132 , H01L2224/11462 , H01L2224/1147 , H01L2224/1182 , H01L2224/11825 , H01L2224/11849 , H01L2224/119 , H01L2224/11903 , H01L2224/1191 , H01L2224/13024 , H01L2224/13076 , H01L2224/13082 , H01L2224/13084 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13541 , H01L2224/13562 , H01L2224/1357 , H01L2224/13582 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/14051 , H01L2224/16055 , H01L2224/16058 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/17106 , H01L2224/17519 , H01L2224/73204 , H01L2224/81191 , H01L2224/81424 , H01L2224/81447 , H01L2224/831 , H01L2224/92 , H01L2224/92125 , H01L2224/94 , H01L2924/12042 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2224/03 , H01L2224/11 , H01L2224/0231 , H01L21/304 , H01L21/78 , H01L2224/81 , H01L2924/00
摘要： A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.
摘要翻译： 提供半导体封装方法。 该方法包括提供半导体衬底。 半导体衬底具有第一表面和第二表面，以及在半导体衬底的第一表面上的电镀籽晶层。 该方法还包括在电镀种子层上形成多个柱状电极，其中柱状电极包括第一柱状电极和第二柱状电极。 此外，该方法包括在第一柱状电极和第二柱状电极上形成扩散阻挡层，在第一柱状电极上的扩散阻挡层上形成多个第一焊球。 该方法还包括提供具有对应于第一焊球的焊接端子的封装基板，并将半导体基板安装在翻转位置的封装基板上，使得第一焊球与焊接端子连接。
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公开(公告)号：US20160124020A1
公开(公告)日：2016-05-05
申请号：US14927749
申请日：2015-10-30
发明人： LEI SHI
CPC分类号： G01R3/00 , G01R1/06738 , G01R1/06761 , G01R1/07307
摘要： A semiconductor testing fixture is provided. The semiconductor testing fixture comprises a substrate having a surface; a plurality of testing probes formed on the surface of the substrate; and a dielectric layer filling space between adjacent testing probes and covering side surfaces of the plurality of testing probes formed on the surface of the substrate.
摘要翻译： 提供半导体测试夹具。 半导体测试夹具包括具有表面的基板; 形成在所述基板的表面上的多个测试探针; 以及在相邻的测试探针之间的介电层填充空间和形成在基板的表面上的多个测试探针的覆盖侧表面。
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8.发明申请TESTING PROBE AND SEMICONDUCTOR TESTING FIXTURE, AND FABRICATION METHODS THEREOF 审中-公开测试探针和半导体测试仪器及其制造方法公开(公告)号：US20160124017A1
公开(公告)日：2016-05-05
申请号：US14926961
申请日：2015-10-29
发明人： LEI SHI
CPC分类号： G01R1/06733 , G01R3/00
摘要： Testing probe and semiconductor testing fixture, and their fabrication methods are provided. A plurality of first testing pins is formed on the substrate, each first testing pin including a first testing terminal on a top and a first connection terminal on a bottom. An insulating layer is formed on a sidewall surface of each first testing pin. A number of second testing pins are formed on the insulating layers, each second testing pin including a second testing terminal on a top thereof and a second connection terminal on a bottom thereof. A first concave surface is formed on a top of the second testing terminal, and surrounds a corresponding first testing pin.
摘要翻译： 提供测试探头和半导体测试夹具及其制造方法。 多个第一测试引脚形成在基板上，每个第一测试引脚包括顶部的第一测试端子和底部的第一连接端子。 在每个第一测试销的侧壁表面上形成绝缘层。 在绝缘层上形成多个第二测试引脚，每个第二测试引脚在其顶部包括第二测试端子和在其底部的第二连接端子。 第一凹面形成在第二测试端子的顶部，并且包围相应的第一测试针。
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公开(公告)号：US20140124929A1
公开(公告)日：2014-05-08
申请号：US14074697
申请日：2013-11-07
发明人： CHANG-MING LIN , Lei SHI , GUO-HUA GAO
IPC分类号： H01L23/00
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/03462 , H01L2224/03472 , H01L2224/0401 , H01L2224/05008 , H01L2224/05011 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05562 , H01L2224/05567 , H01L2224/05572 , H01L2224/05655 , H01L2224/1132 , H01L2224/11849 , H01L2224/13006 , H01L2224/13011 , H01L2224/13015 , H01L2224/13018 , H01L2224/13076 , H01L2224/13111 , H01L2224/13147 , H01L2924/00014 , H01L2924/014 , H01L2924/00012
摘要： Semiconductor devices and methods are provided. The semiconductor device can include a semiconductor substrate, a plurality of solder pads disposed on the semiconductor substrate, a first insulating layer disposed over the semiconductor substrate, a columnar electrode disposed over the solder pad, and a solder ball disposed on the columnar electrode. The first insulating layer can include a first opening to expose a solder pad of the plurality of solder pads. The columnar electrode can include a bulk material and a through hole in the bulk material. The through hole can expose at least a surface portion of the solder pad. The solder ball can include a convex metal head on a top surface of the bulk material of the columnar electrode, and a filling part filled in the through hole.
摘要翻译： 提供了半导体器件和方法。 半导体器件可以包括半导体衬底，设置在半导体衬底上的多个焊盘，设置在半导体衬底上的第一绝缘层，设置在焊盘上的柱状电极和设置在柱状电极上的焊球。 第一绝缘层可以包括第一开口以暴露多个焊盘的焊盘。 柱状电极可以包括散装材料和散装材料中的通孔。 通孔可以暴露至少一个焊盘的表面部分。 焊球可以包括在柱状电极的本体材料的顶表面上的凸金属头和填充在通孔中的填充部分。
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公开(公告)号：US20140124927A1
公开(公告)日：2014-05-08
申请号：US14074598
申请日：2013-11-07
发明人： CHANG-MING LIN , LEI SHI , XIAO-CHUN WU
IPC分类号： H01L21/48 , H01L23/498
CPC分类号： H01L21/4846 , H01L23/3192 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0346 , H01L2224/03464 , H01L2224/0401 , H01L2224/05017 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05558 , H01L2224/05582 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/1132 , H01L2224/1134 , H01L2224/11849 , H01L2224/13017 , H01L2224/13018 , H01L2224/13019 , H01L2224/13024 , H01L2224/13076 , H01L2224/131 , H01L2224/13111 , H01L2224/13562 , H01L2224/13582 , H01L2224/94 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2924/00012
摘要： An IC packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a metal pad and an insulating layer and the insulating layer has an opening to expose the meal pad. The method also includes forming an under-the-ball meal electrode on the exposed metal pad. The under-the-ball metal electrode has an electrode body and an electrode tail, the electrode body is located at a bottom portion of the under-the-ball metal electrode and is in contact with the metal pad, and the electrode tail is located at a top portion of the under-the-ball meal electrode. Further, the method includes forming a solder ball on the under-the-ball metal electrode.
摘要翻译： 提供IC封装方法。 该方法包括提供半导体衬底。 半导体衬底具有金属焊盘和绝缘层，并且绝缘层具有露出餐垫的开口。 该方法还包括在暴露的金属垫上形成球下餐具电极。 球下金属电极具有电极体和电极尾部，电极体位于球下金属电极的底部并与金属焊盘接触，电极尾部位于 在球粉末电极的顶部。 此外，该方法包括在球下金属电极上形成焊球。
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