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公开(公告)号：US6081998A
公开(公告)日：2000-07-04
申请号：US57660
申请日：1998-04-09
Applicant: Hideaki Terauchi , Fumio Aoki , Kazuhiko Ota , Yasuhiro Teshima
Inventor： Hideaki Terauchi , Fumio Aoki , Kazuhiko Ota , Yasuhiro Teshima
CPC classification number: H01R12/7058 , H01R12/7023 , H01R12/707 , H05K3/303 , H05K7/12 , H01R12/7047 , H01R12/716 , H05K2201/0308 , H05K2201/10189 , H05K2201/10598 , H05K3/306 , Y02P70/613 , Y10S439/943 , Y10T29/49147 , Y10T29/49149 , Y10T29/49153
Abstract: There is disclosed a method of surface mounting a connector which enables a connector to be automatically mounted while preserving reliability of soldered portions and without additionally providing a special apparatus. The connector is formed to be thick at a portion and thin at another portion with respect to an axis C.sub.1. In surface mounting the connector on the printed circuit board, a hook member is inserted into a through hole formed in advance through the printed circuit board. Then, the reflow process is carried out on the printed circuit board whereby terminals of the chips including the lead pins are soldered. The printed circuit board is reroved from a reflow furnace, and cooled, whereupon the hook member is bent toward a hooking portion side. This brings the hooking portion into engagement with the underside of the printed circuit board, whereby the connector is firmly fixed to the printed circuit board.
Abstract translation: 公开了一种表面安装连接器的方法，其能够使连接器自动安装，同时保持焊接部分的可靠性，而不需要额外提供专用设备。 连接器形成为在一部分处较厚并且在相对于轴线C1的另一部分处薄。 将连接器表面安装在印刷电路板上时，将钩构件插入到通过印刷电路板预先形成的通孔中。 然后，在印刷电路板上进行回流处理，由此焊接包括引线引脚的芯片的端子。 将印刷电路板从回流炉中取出并冷却，由此钩构件向钩部侧弯曲。 这使得钩挂部分与印刷电路板的下侧接合，由此连接器牢固地固定到印刷电路板上。
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公开(公告)号：US5783865A
公开(公告)日：1998-07-21
申请号：US602423
申请日：1996-02-16
Applicant: Yutaka Higashiguchi , Mitsuo Inagaki , Makoto Totani , Yasuhiro Teshima , Hiroshi Iimura
Inventor： Yutaka Higashiguchi , Mitsuo Inagaki , Makoto Totani , Yasuhiro Teshima , Hiroshi Iimura
IPC: H01L23/12 , H01L21/60 , H01L23/13 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/42 , H01L23/48 , H01L23/52 , H01L29/40
CPC classification number: H01L24/81 , H01L23/13 , H01L23/49827 , H01L24/97 , H05K1/112 , H01L2224/13111 , H01L2224/13147 , H01L2224/16235 , H01L2224/16237 , H01L2224/48091 , H01L2224/48227 , H01L2224/49109 , H01L2224/75251 , H01L2224/81136 , H01L2224/8114 , H01L2224/81801 , H01L2224/97 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H05K2201/09827 , H05K2201/09845 , H05K2201/10234 , H05K2201/10734 , H05K2203/0455 , H05K3/3431 , H05K3/42
Abstract: A wiring substrate has a semiconductor device mounted thereonto, the semiconductor device having ball-shaped externally connecting parts. The wiring substrate includes through holes at positions corresponding to the ball-shaped externally connecting parts and electric conductors provided inside and around the through holes. Land portions of the electric conductors, at which the electric conductors are engaged with the externally connecting parts, includes sectional tapering portions, respectively. Further, the through holes have sectional tapering portions at edge portions in proximity to the land portions, respectively. The ball-shaped externally connecting parts of the semiconductor device are engaged with the land portions provided around the through holes of the wiring substrate and having the sectional tapering portions, respectively.
Abstract translation: 布线基板具有安装在其上的半导体器件，该半导体器件具有球形的外部连接部分。 布线基板在对应于球形外部连接部分的位置和设置在通孔内部和周围的电导体之间包括通孔。 电导体与外部连接部分接合的电导体的陆部分别包括截面渐缩部分。 此外，通孔分别在接合部分的边缘部分具有截面渐缩部分。 半导体器件的球形外部连接部分分别与设置在布线基板的通孔周围的接合部分接合并具有截面锥形部分。
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公开(公告)号：US07375429B2
公开(公告)日：2008-05-20
申请号：US11321811
申请日：2005-12-29
Applicant: Yasuhiro Teshima , Noboru Nakama
Inventor： Yasuhiro Teshima , Noboru Nakama
CPC classification number: H05K1/0231 , H01L23/49838 , H01L23/50 , H01L23/66 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/16 , H01L2224/16105 , H01L2224/16106 , H01L2224/16235 , H01L2224/16265 , H01L2224/17104 , H01L2224/81193 , H01L2224/8121 , H01L2224/81815 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/19103 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H05K1/023 , H05K1/025 , H05K1/111 , H05K3/3436 , H05K3/3442 , H05K2201/10022 , H05K2201/10515 , H05K2201/10636 , H05K2201/10734 , Y02P70/611 , H01L2924/00012
Abstract: Disclosed are an integrated circuit component capable of simply mounting at low cost a chip part which adjusts impedance of wiring patterns as well as capable of effectively reducing switching noise from an integrated circuit, and a method for mounting the chip part. The integrated circuit component of the present invention has a constitution that a bypass capacitor is mounted on a wiring board side of a gap between the wiring board and an LSI chip. Therefore, as compared with a case where the capacitor is mounted on the LSI chip side, a transmission path through the capacitor can be extremely shortened. As a result, inductance components of the feeder line can be reduced, so that a response delay of power transmitted through the feeder line can be sufficiently suppressed.
Abstract translation: 公开了能够以低成本简单地安装芯片部分的集成电路部件，其调整布线图案的阻抗以及能够有效地降低集成电路的开关噪声，以及用于安装芯片部分的方法。 本发明的集成电路部件具有在布线基板和LSI芯片之间的间隙的布线基板侧安装旁路电容器的结构。 因此，与将电容器安装在LSI芯片侧的情况相比，可以极大地缩短通过电容器的传输路径。 结果，可以减少馈电线路的电感分量，从而可以充分抑制通过馈电线路传输的功率的响应延迟。
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公开(公告)号：US20060108607A1
公开(公告)日：2006-05-25
申请号：US11321811
申请日：2005-12-29
Applicant: Yasuhiro Teshima , Noboru Nakama
Inventor： Yasuhiro Teshima , Noboru Nakama
IPC: H01L27/10
CPC classification number: H05K1/0231 , H01L23/49838 , H01L23/50 , H01L23/66 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/16 , H01L2224/16105 , H01L2224/16106 , H01L2224/16235 , H01L2224/16265 , H01L2224/17104 , H01L2224/81193 , H01L2224/8121 , H01L2224/81815 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/19103 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H05K1/023 , H05K1/025 , H05K1/111 , H05K3/3436 , H05K3/3442 , H05K2201/10022 , H05K2201/10515 , H05K2201/10636 , H05K2201/10734 , Y02P70/611 , H01L2924/00012
Abstract: Disclosed are an integrated circuit component capable of simply mounting at low cost a chip part which adjusts impedance of wiring patterns as well as capable of effectively reducing switching noise from an integrated circuit, and a method for mounting the chip part. The integrated circuit component of the present invention has a constitution that a bypass capacitor is mounted on a wiring board side of a gap between the wiring board and an LSI chip. Therefore, as compared with a case where the capacitor is mounted on the LSI chip side, a transmission path through the capacitor can be extremely shortened. As a result, inductance components of the feeder line can be reduced, so that a response delay of power transmitted through the feeder line can be sufficiently suppressed.
Abstract translation: 公开了能够以低成本简单地安装芯片部分的集成电路部件，其调整布线图案的阻抗以及能够有效地降低集成电路的开关噪声，以及用于安装芯片部分的方法。 本发明的集成电路部件具有在布线基板和LSI芯片之间的间隙的布线基板侧安装旁路电容器的结构。 因此，与将电容器安装在LSI芯片侧的情况相比，可以极大地缩短通过电容器的传输路径。 结果，可以减少馈电线路的电感分量，从而可以充分抑制通过馈电线路传输的功率的响应延迟。
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公开(公告)号：US06883157B2
公开(公告)日：2005-04-19
申请号：US10299334
申请日：2002-11-19
Applicant: Hideaki Matsumoto , Yasuhiro Teshima , Akira Okada
Inventor： Hideaki Matsumoto , Yasuhiro Teshima , Akira Okada
CPC classification number: G06F17/5077 , H05K1/0237 , H05K3/0005
Abstract: The present invention relates to a BWB wiring design system, and provides a BWB transmission wiring design system capable of guaranteeing the super high-speed operation of a system composed of a BWB and a plurality of printed circuit boards mounted on the BWB. The BWB transmission wiring design system consists mainly of a manager system that manages the wiring in the entire BWB system composed of the plurality of printed circuit boards, and a designer system that designs the wiring on each of the plurality of printed circuit boards while communicating with the manager system. The manager system presents the designer system predetermined design target values relevant to the entire BWB system. Moreover, the manager system presents the designer system the result of judgment made from design information, which is sequentially distributed from the designer system, on whether the design target values can be attained. The designer system finishes a wiring design while referencing the presented design target values and the presented result of judgment.
Abstract translation: 本发明涉及一种BWB布线设计系统，并且提供一种BWB传输布线设计系统，其能够保证由BWB和安装在BWB上的多个印刷电路板构成的系统的超高速运行。 BWB传输接线设计系统主要由管理系统，管理由多个印刷电路板组成的整个BWB系统中的布线，以及设计者系统，其设计在多个印刷电路板中的每一个上的布线，同时与 经理制度。 管理系统呈现设计者系统与整个BWB系统相关的预定设计目标值。 此外，管理系统向设计者系统呈现设计信息的判断结果，该设计信息从设计者系统顺序分配，是否可以实现设计目标值。 设计者系统完成接线设计，同时参考所提出的设计目标值和所提出的判断结果。
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Patent Agency Ranking
公开(公告)号：US06655990B2
公开(公告)日：2003-12-02
申请号：US09557251
申请日：2000-04-24
Applicant: Hideaki Terauchi , Fumio Aoki , Kazuhiko Ota , Yasuhiro Teshima
Inventor： Hideaki Terauchi , Fumio Aoki , Kazuhiko Ota , Yasuhiro Teshima
IPC: H01R1360
CPC classification number: H01R12/7058 , H01R12/7023 , H01R12/7047 , H01R12/707 , H01R12/716 , H05K3/303 , H05K3/306 , H05K7/12 , H05K2201/0308 , H05K2201/10189 , H05K2201/10598 , Y02P70/613 , Y10S439/943 , Y10T29/49147 , Y10T29/49149 , Y10T29/49153
Abstract: There is disclosed a method of surface mounting a connector which enables a connector to be automatically mounted while preserving reliability of soldered portions and without additionally providing a special apparatus. The connector is formed to be thick at a portion and thin at another portion with respect to an axis C1. In surface mounting the connector on the printed circuit board, a hook member is inserted into a through hole formed in advance through the printed circuit board. Then, the reflow process is carried out on the printed circuit board whereby terminals of the chips including the lead pins are soldered. The printed circuit board is removed from a reflow furnace, and cooled, whereupon the hook member is bent toward a hooking portion side. This brings the hooking portion into engagement with the underside of the printed circuit board, whereby the connector is firmly fixed to the printed circuit board.
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7.发明授权Semiconductor device having a bump which is inspected from outside and a circuit board used with such a semiconductor device 失效具有从外部检查的凸块的半导体器件和与这种半导体器件一起使用的电路板
公开(公告)号：US5828128A
公开(公告)日：1998-10-27
申请号：US604429
申请日：1996-02-21
Applicant: Yutaka Higashiguchi , Toshio Kumai , Yasuhiro Teshima , Mamoru Niishiro , Yasushi Kobayashi , Yukio Sekiya , Shuzo Igarashi , Yasuhiro Ichihara
Inventor： Yutaka Higashiguchi , Toshio Kumai , Yasuhiro Teshima , Mamoru Niishiro , Yasushi Kobayashi , Yukio Sekiya , Shuzo Igarashi , Yasuhiro Ichihara
IPC: H01L23/12 , G01R31/04 , H01L21/60 , H01L21/66 , H01L23/498 , H05K1/02 , H05K1/11 , H05K3/34 , H01L23/48 , H01L23/52 , H01L29/40
CPC classification number: H05K3/3436 , H01L23/49816 , G01R31/046 , H01L22/12 , H01L2224/0401 , H01L2224/0603 , H01L2224/1403 , H01L2924/01322 , H01L2924/3011 , H05K1/0269 , H05K1/116 , H05K2201/0367 , H05K2201/094 , H05K2201/09745 , H05K2201/10666 , H05K2203/0455 , H05K2203/0465 , H05K2203/162 , H05K3/3431 , Y02P70/613
Abstract: A BGA-type semiconductor device has a soldering bump a soldered state of which can be easily checked by visual inspection. A package has a bottom surface which faces the wiring board when the semiconductor device is mounted on the wiring board. A plurality of soldering bumps are provided on the bottom surface of the package. The soldering bumps are in a plurality of different sizes, and are located in positions where the soldering bumps are observable from outside of the package when the semiconductor device is mounted on the wiring board.
Abstract translation: BGA型半导体器件具有焊接凸块，其焊接状态可以通过目视检查容易地检查。 当半导体器件安装在布线板上时，封装具有面向布线板的底表面。 多个焊接凸块设置在封装的底表面上。 焊接凸块具有多个不同的尺寸，并且当将半导体器件安装在布线板上时，位于从封装外部观察焊接凸块的位置。
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公开(公告)号：US5593080A
公开(公告)日：1997-01-14
申请号：US489616
申请日：1995-06-12
Applicant: Yasuhiro Teshima , Tetsuo Kurokawa
Inventor： Yasuhiro Teshima , Tetsuo Kurokawa
CPC classification number: B23K3/0638 , H05K3/1225 , H05K3/3484 , B23K2201/42 , H05K2201/09727 , H05K2201/10689 , H05K2203/0545 , H05K3/1216 , H05K3/3457 , Y10T29/49144
Abstract: A mask for printing solder paste includes a mask plate, and first mask holes which are formed in the mask plate and have a first size, and second mask holes which are formed in the mask plate and have a second size smaller than the first size. The mask plate has a first region having the first mask holes, and a second region having the second mask holes. The mask plate has a first thickness in the first region, and a second thickness in the second region. The second thickness is smaller than the first thickness.
Abstract translation: 用于印刷焊膏的掩模包括掩模板和形成在掩模板中并具有第一尺寸的第一掩模孔和形成在掩模板中并且具有小于第一尺寸的第二尺寸的第二掩模孔。 掩模板具有具有第一掩模孔的第一区域和具有第二掩模孔的第二区域。 掩模板在第一区域具有第一厚度，在第二区域具有第二厚度。 第二厚度小于第一厚度。
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公开(公告)号：US5413164A
公开(公告)日：1995-05-09
申请号：US751944
申请日：1991-08-29
Applicant: Yasuhiro Teshima , Mamoru Niishiro , Michinori Matsubayashi
Inventor： Yasuhiro Teshima , Mamoru Niishiro , Michinori Matsubayashi
IPC: F27B9/14 , B23K1/008 , G05D23/19 , H01L21/56 , H05K3/28 , H05K3/34 , F25B29/00 , B23K37/04 , B23K31/02 , F27B9/24
CPC classification number: G05D23/1934 , B23K1/008 , B23K2201/18
Abstract: For use in the fabrication of electronic circuit modules, there is provided a heating furnace which can be arbitrarily set in a desired temperature profile. The furnace includes a plural number of independently controllable heaters located in spaced positions to provide a plural number of heating zones in the furnace, and a plural number of cooling panels provided in the heating zones of the respective heaters. Each heater is independently controlled according to a specified type of substrate to establish a temperature profile for the specified substrate type in the furnace to carry out the curing of a sealing synthetic resin material of a semiconductor device and the reflow soldering of surface mounting devices in one and single furnace.
Abstract translation: 为了用于电子电路模块的制造，提供了可以任意设置在所需温度分布中的加热炉。 该炉包括位于间隔位置的多个可独立控制的加热器，以在炉中提供多个加热区，以及设置在各加热器的加热区中的多个冷却板。 每个加热器根据指定类型的基板独立地控制，以建立炉中指定基板类型的温度曲线，以执行半导体器件的密封合成树脂材料的固化和表面安装装置的回流焊接 和单炉。
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公开(公告)号：US07044763B1
公开(公告)日：2006-05-16
申请号：US11166222
申请日：2005-06-27
Applicant: Takashi Inoue , Hiroshi Takawa , Yasuhiro Teshima , Noboru Izuhara
Inventor： Takashi Inoue , Hiroshi Takawa , Yasuhiro Teshima , Noboru Izuhara
IPC: H01R13/62
CPC classification number: H05K3/301 , H01R12/7047 , H01R12/716 , H01R12/83 , H01R43/205 , H05K9/0058 , H05K2201/10189 , H05K2201/10484 , H05K2201/10606
Abstract: In an SFP module mounting structure where an SFP module connected to a connector mounted on a printed board is held by a holder, the holder has both side faces which hold the SFP module on the both sides, a flap which is provided on an upper edge of the both side faces so as to make the SFP module insertable and extractable in an oblique upper direction as well as to prevent the SFP module from being disengaged upward and a bottom face which supports the both side faces on the printed board. The connector may be provided with an electrode which is connected to the SFP module when the SFP module is inserted into the holder from the oblique upper direction and which has a returning elastic force enabling the SFP module to move pivotally down to a state that is parallel to the printed board.
Abstract translation: 在连接到安装在印刷电路板上的连接器的SFP模块由保持器保持的SFP模块安装结构中，保持器具有将SFP模块保持在两侧的两个侧面，设置在上边缘 以使得SFP模块能够在倾斜的上方向上插入和提取，并且防止SFP模块向上脱离，并且支撑底板上的两个侧面的底面。 连接器可以设置有当SFP模块从倾斜的上部方向插入到保持器中时连接到SFP模块的电极，并且具有使得SFP模块能够枢转地向下移动到平行状态的返回弹力 到印刷板。
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