公开(公告)号：US20110163823A1

公开(公告)日：2011-07-07

申请号：US12983073

申请日：2010-12-31

Applicant: Dae-Hyun PARK ,  Han Kim ,  Myung-Sam Kang

Inventor： Dae-Hyun PARK ,  Han Kim ,  Myung-Sam Kang

IPC: H04B3/28

CPC classification number: H05K1/0236 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09627 ,  H05K2201/097

Abstract: In an electromagnetic bandgap structure including a plurality of conductive plates and a stitching via part, in which the plurality of conductive plates are placed on a first planar surface, the stitching via part includes a first via having one end part connected to one of the two conductive plates, a second via having one end part connected to the other of the two conductive plates, a spiral connector forming a spirally-shaped serial link structure on at least one vertical planar surface that is perpendicular to the first planar surface, a first conductive pattern connecting one end part of the spiral connector and the other end part of the first via with each other and a second conductive connecting pattern connecting the other end part of the spiral connector and the other end part of the second via with each other.

Abstract translation: 在包括多个导电板和缝合通孔部分的电磁带隙结构中，其中多个导电板被放置在第一平坦表面上，该缝合通孔部分包括第一通孔，该第一通孔的一个端部连接到两个 导电板，具有连接到两个导电板中的另一个的一个端部的第二通孔，在垂直于第一平坦表面的至少一个垂直平面上形成螺旋形串联结构的螺旋形连接器，第一导电 螺旋连接器的一个端部和第一通孔的另一个端部彼此连接的图案，以及将螺旋形连接器的另一个端部和第二通孔的另一个端部彼此连接的第二导电连接图案。

公开(公告)号：US08124880B2

公开(公告)日：2012-02-28

申请号：US11976207

申请日：2007-10-22

Applicant: Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

Inventor： Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

IPC: H05K1/03

CPC classification number: H05K1/0265 ,  H05K1/116 ,  H05K3/107 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361

Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.

Abstract translation: 一种电路板的制造方法，其特征在于，包括：在堆叠在载体上的种子层上，形成导电消除图案，所述导电解像图案包括依次与第一电路图案对应地层叠的第一镀层，第一金属层和第二镀层 ; 将载体和绝缘体堆叠并压在一起，使得具有导电缓冲图案的载体的表面面向绝缘体; 通过移除载体将导电释放图案转印到绝缘体中; 在具有转印的导电消除图案的绝缘体的表面上形成包括与第二电路图案顺序堆叠的第三镀层和第二金属层的导电图案; 去除第一镀层和籽晶层; 并且去除第一和第二金属层可以提供具有高密度电路图案而不增加绝缘体量的电路板。

公开(公告)号：US20110221074A1

公开(公告)日：2011-09-15

申请号：US13067219

申请日：2011-05-17

Applicant: Myung-Sam Kang ,  Chang-Sup Ryu ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Ji-Eun Kim

Inventor： Myung-Sam Kang ,  Chang-Sup Ryu ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Ji-Eun Kim

IPC: H01L23/488

CPC classification number: H01L23/3128 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A board on chip package including a photo solder resist having a cavity and a pattern on one side, the pattern corresponding to a circuit wire; a solder ball pad accommodated in the cavity; a circuit wire electrically connected with the solder ball pad, and formed on the other side of the photo solder resist; a semiconductor chip mounted on the solder ball pad by a flip chip bonding; and a passivation material to mold the semiconductor chip.

Abstract translation: 一种片上封装，包括具有空腔和一侧图案的光阻焊剂，该图案对应于电路线; 容纳在腔中的焊球垫; 与焊锡球焊盘电连接并形成在光阻焊剂的另一侧上的电路线; 通过倒装芯片焊接安装在焊球垫上的半导体芯片; 以及用于模制半导体芯片的钝化材料。

公开(公告)号：US07562446B2

公开(公告)日：2009-07-21

申请号：US11524403

申请日：2006-09-21

Applicant: Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC: H05K3/02 ,  H05K3/10

CPC classification number: H05K3/4652 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/183 ,  H05K3/0097 ,  H05K3/205 ,  H05K3/4697 ,  H05K2201/09536 ,  H05K2203/0191 ,  H05K2203/063 ,  H05K2203/308 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit patter on both sides of a seed layer by use of a first dry film, the seed layer being for forming a circuit pattern on both sides; (b) laminating a second dry film on the first dry film on both sides of the seed layer, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed on both sides of the seed layer, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method for manufacturing a substrate with a cavity in accordance with the present invention can improve the efficiency of a substrate manufacturing process by using both sides of a seed layer to manufacture the substrate with a cavity.

Abstract translation: 公开了一种用于制造具有空腔的衬底的方法。 该方法包括：（a）通过使用第一干膜在种子层的两侧形成第一电路图案，种子层用于在两侧形成电路图案; （b）在种子层两侧的第一干膜上层叠第二干膜，第二干膜的厚度对应于待形成的空腔的深度; （c）在种子层的两侧上在要形成空腔的区域之外的区域层叠电介质层，电介质层的厚度对应于待形成的空腔的深度; （d）在种子层上层叠具有第二电路图案的铜箔层叠主板; 和（e）通过在去除种子层之后剥离第一干膜和第二干膜来形成空腔。 根据本发明的用于制造具有空腔的基板的方法可以通过使用种子层的两面来制造具有空腔的基板来提高基板制造工艺的效率。

公开(公告)号：US20090008143A1

公开(公告)日：2009-01-08

申请号：US12155838

申请日：2008-06-10

Applicant: Jin-Yong Ahn ,  Chang-Sup Ryu ,  Byung-Youl Min ,  Myung-Sam Kang

Inventor： Jin-Yong Ahn ,  Chang-Sup Ryu ,  Byung-Youl Min ,  Myung-Sam Kang

IPC: H01K3/22 ,  H01R12/04

CPC classification number: H05K3/107 ,  H05K3/205 ,  H05K3/465 ,  H05K3/4658 ,  H05K2201/0191 ,  H05K2201/0376 ,  Y10T29/49158

Abstract: A board having buried patterns is disclosed. The board may include an insulation panel, a first pattern buried in one side of the insulation panel, a second pattern buried in the other side of the insulation panel with a predetermined insulating thickness between the first pattern and the second pattern, and a via which electrically connects the first pattern and the second pattern. The board having buried patterns according to certain embodiments of the invention can have greater rigidity compared to a board having exposed patterns, for the same insulating thickness. Also, a carrier-insulation set having a particular amount of thickness can be utilized to satisfy the thickness requirement in employing an existing roller apparatus intended for thicker boards.

Abstract translation: 公开了具有掩埋图案的板。 板可以包括绝缘板，埋在绝缘板的一侧中的第一图案，在第一图案和第二图案之间以预定的绝缘厚度掩埋在绝缘板的另一侧中的第二图案，以及通孔， 电连接第一图案和第二图案。 对于相同的绝缘厚度，具有根据本发明的某些实施例的埋设图案的板可以具有比具有暴露图案的板更大的刚性。 此外，可以利用具有特定厚度的载体绝缘组件来满足使用用于较厚板的现有辊装置的厚度要求。

公开(公告)号：US07394249B2

公开(公告)日：2008-07-01

申请号：US10965613

申请日：2004-10-14

Applicant: Myung-Sam Kang ,  Chang-Sup Ryu ,  Won-Cheol Bae ,  Jae-Kul Lee ,  Doo-Hwan Lee

Inventor： Myung-Sam Kang ,  Chang-Sup Ryu ,  Won-Cheol Bae ,  Jae-Kul Lee ,  Doo-Hwan Lee

IPC: G01R33/04

CPC classification number: G01R33/04 ,  H05K1/165 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/086 ,  H05K2201/10151

Abstract: Disclosed is a printed circuit board with a weak magnetic field sensor according to the present invention, which includes a substrate having first excitation circuits and first detection circuits formed on both sides thereof. First laminates are layered on both sides of the substrate, and have soft magnetic cores with a predetermined shape formed thereon. Second laminates are layered on the first laminates, and have second excitation circuits and second detection circuits, connected through via holes to the first excitation circuits and first detection circuits, respectively, so that the first and second excitation circuits and first and second detection circuits are wound around the soft magnetic cores, formed thereon. The soft magnetic cores each include a magnetic core and non-magnetic metal layers formed on both sides of the magnetic core.

Abstract translation: 公开了根据本发明的具有弱磁场传感器的印刷电路板，其包括具有形成在其两侧上的第一激励电路和第一检测电路的基板。 第一层压体层叠在基板的两侧，并且具有形成在其上的预定形状的软磁芯。 第二层叠体层叠在第一层叠体上，并具有分别通过通孔与第一激励电路和第一检测电路连接的第二激励电路和第二检测电路，使得第一和第二激励电路以及第一和第二检测电路 缠绕在其上形成的软磁芯上。 软磁芯各自包括形成在磁芯两侧的磁芯和非磁性金属层。

公开(公告)号：US20080098597A1

公开(公告)日：2008-05-01

申请号：US11976072

申请日：2007-10-19

Applicant: Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

IPC: H05K3/02

CPC classification number: H05K3/20 ,  H05K3/0058 ,  H05K3/108 ,  H05K3/4611 ,  H05K3/4682 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method of manufacturing a circuit board is disclosed. A method of manufacturing a circuit board that includes forming a first circuit pattern on the insulation layer of a carrier, in which an insulation layer and a first seed layer are stacked in order; stacking and pressing the carrier and an insulation board with the side of the carrier having the first circuit pattern facing the insulation board; removing the carrier to transfer the first circuit pattern and the insulation layer onto the insulation board; and forming a second circuit pattern on the insulation layer transferred to the insulation board, allows fine pitch circuit patterns to enable the manufacture of fine circuit patterns of high density on the board, and allows the manufacture of a multi-layer circuit board with a simple process.

Abstract translation: 公开了一种制造电路板的方法。 一种制造电路板的方法，包括在载体的绝缘层上形成第一电路图案，其中绝缘层和第一种子层依次层叠; 堆叠并按压载体和绝缘板，其中载体侧具有面向绝缘板的第一电路图案; 移除载体以将第一电路图案和绝缘层转移到绝缘板上; 并且在转移到绝缘板的绝缘层上形成第二电路图案，允许精细的间距电路图案能够在板上制造高密度的精细电路图案，并且允许制造具有简单的多层电路板 处理。

公开(公告)号：US20070132536A1

公开(公告)日：2007-06-14

申请号：US11637664

申请日：2006-12-13

Applicant: Doo-Hwan Lee ,  Byoung-Youl Min ,  Myung-Sam Kang ,  Moon-Il Kim ,  Hyung-Tae Kim

Inventor： Doo-Hwan Lee ,  Byoung-Youl Min ,  Myung-Sam Kang ,  Moon-Il Kim ,  Hyung-Tae Kim

IPC: H01F5/00

CPC classification number: H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/10515 ,  Y10T29/4913 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: A printed circuit board having embedded electronic components and a manufacturing method thereof are disclosed. With the printed circuit board having embedded electronic components, including a core sheet, a first electronic component mounted on one side of the core sheet, a second electronic component mounted on the other side of the core sheet and overlapping the first electronic component, a first insulation layer stacked on one side of the core sheet and covering the first electronic component, a second insulation layer stacked on the other side of the core sheet and covering the second electronic component, and a circuit pattern formed on the surface of the first insulation layer or the second insulation layer, the density of the printed circuit board having embedded components is improved, as a plurality of electronic components are embedded simultaneously, and when a thin CCL substrate or a metal substrate is used as the core, a metal substrate in particular, the heat-releasing property and mechanical strength are improved, including increased bending strength in a thermal-stress environment, as electronic components are mounted on both sides of the core sheet.

Abstract translation: 公开了一种具有嵌入式电子部件的印刷电路板及其制造方法。 利用具有嵌入式电子部件的印刷电路板，包括芯片，安装在芯片的一侧的第一电子部件，安装在芯片的另一侧并与第一电子部件重叠的第二电子部件，第一电子部件 绝缘层，其堆叠在所述芯片的一侧并覆盖所述第一电子部件;堆叠在所述芯片的另一侧并覆盖所述第二电子部件的第二绝缘层，以及形成在所述第一绝缘层的表面上的电路图案 或第二绝缘层，随着多个电子部件被同时嵌入，具有嵌入部件的印刷电路板的密度得到改善，并且当使用薄CCL基板或金属基板作为芯时，特别是金属基板 ，提高了散热性能和机械强度，包括在热应力环境中增加弯曲强度 因为电子部件安装在芯片的两侧。

公开(公告)号：US20070065986A1

公开(公告)日：2007-03-22

申请号：US11524402

申请日：2006-09-21

Applicant: Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC: H01L21/00

CPC classification number: H05K3/4652 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/183 ,  H05K3/205 ,  H05K3/4697 ,  H05K2201/09536 ,  H05K2203/0574 ,  H05K2203/063 ,  H05K2203/308 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.

Abstract translation: 公开了一种用于制造具有空腔的衬底的方法。 该方法包括：（a）通过使用第一干膜在种子层的一侧上形成第一电路图案; （b）在第一干膜上层压第二干膜，第二干膜的厚度对应于待形成的空腔的深度; （c）在要形成空腔的区域外的区域上层叠电介质层，所述电介质层的厚度对应于待形成的空腔的深度; （d）在种子层上层叠具有第二电路图案的铜箔层叠主板; 和（e）通过在去除种子层之后剥离第一干膜和第二干膜来形成空腔。 根据本发明的方法可以通过减小封装上的封装上的衬底的厚度来安装多个集成电路。

公开(公告)号：US20060017435A1

公开(公告)日：2006-01-26

申请号：US10975736

申请日：2004-10-28

Applicant: Myung-Sam Kang ,  Chang-Sup Ryu ,  Won-Cheol Bae ,  Sang-Duck Kim ,  Doo-Hwan Lee

Inventor： Myung-Sam Kang ,  Chang-Sup Ryu ,  Won-Cheol Bae ,  Sang-Duck Kim ,  Doo-Hwan Lee

IPC: G01R33/02

CPC classification number: G01R33/04 ,  H05K1/165 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/086 ,  H05K2201/10151

Abstract: A Printed Circuit Board (PCB) having a weak magnetic field sensor of the present invention includes a base plate on which a first excitation circuit and a first detection circuit are formed on each of the sides thereof, soft magnetic core bodies laminated on the top and bottom of the base plate, respectively, and formed of a plurality of soft magnetic cores, and outer layers that are laminated on the soft magnetic core bodies, respectively, and on which a second excitation circuit and a second detection circuit connected to the first excitation circuit and the first detection circuit through via holes are formed so as to surround the soft magnetic cores, respectively. The present invention is characterized in that the soft magnetic cores, the excitation circuit and the detection circuit formed on one side of the base plate are perpendicular to the soft magnetic cores, the excitation circuit and the detection circuit formed on the other side of the base plate.

Abstract translation: 本发明的具有弱磁场传感器的印刷电路板（PCB）包括：基板，其基板在其基板上形成有第一激励电路和第一检测电路，软磁芯体层叠在顶板上， 底板分别由多个软磁芯和层叠在软磁体上的外层构成，第二激励电路和第二检测电路分别连接到第一激励 电路和通过通孔的第一检测电路分别形成为围绕软磁芯。 本发明的特征在于，形成在基板的一侧上的软磁芯，激励电路和检测电路垂直于软磁芯，激励电路和检测电路形成在基座的另一侧 盘子。