公开(公告)号：JP2012518282A

公开(公告)日：2012-08-09

申请号：JP2011550323

申请日：2010-02-17

申请人： アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated

发明人： ブラボー ジャメ ,  クーヘンマイスター フランク ,  スー マイケル

IPC分类号： H01L23/29 ,  H01L23/31

CPC分类号： H01L23/3142 ,  H01L21/563 ,  H01L23/3171 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： 【解決手段】
種々の半導体チップ補強構造及びそれを作製する方法が開示される。 １つの側面においては、サイド（４０）を有する半導体チップ（１５）を提供することとサイド（４０）上にポリマ層（６０）を形成することとを含む製造の方法が提供される。 ポリマ層（６０）は、第１のチャネル（８０）を画定するために中央部分（６５）及び中央部分（６５）から空間的に分離される第１のフレーム部分（７０）を有する。
【選択図】図４

公开(公告)号：JP4993893B2

公开(公告)日：2012-08-08

申请号：JP2005295103

申请日：2005-10-07

申请人： イーピーワークス カンパニー リミテッド

发明人： 金在俊

IPC分类号： H01L23/12 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/10 ,  H01L24/13 ,  H01L27/14618 ,  H01L27/14632 ,  H01L27/14687 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

公开(公告)号：JP2012025979A

公开(公告)日：2012-02-09

申请号：JP2010163128

申请日：2010-07-20

申请人： Tdk Corp ,  Tdk株式会社

发明人： YOSHIDA KENICHI ,  HORIKAWA YUHEI ,  SATO JUN ,  ABE TOSHIYUKI

IPC分类号： C23C18/44 ,  C23C18/31

CPC分类号： C23C18/1655 ,  C23C18/1637 ,  C23C18/1651 ,  C23C18/32 ,  C23C18/42 ,  C23C18/54 ,  C23C28/02 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05644 ,  H01L2924/01015 ,  H01L2924/14 ,  H01L2924/00

摘要： PROBLEM TO BE SOLVED: To provide a coating that has reduced manufacturing cost as well as sufficiently superior corrosion resistance.SOLUTION: The coating 10 is provided on a conductor 20. The coating 10 includes, from the conductor 20 side, a first layer 12 containing palladium and a second layer 14 containing gold. The first layer 12 has a first region 31 on the conductor 20 side and a second region 32 arranged closer to the second layer 14 than the first region 31. The second region 32 is the coating 10 which has a higher phosphorus concentration than the first region 31.

摘要翻译： 要解决的问题：提供降低制造成本以及足够优异的耐腐蚀性的涂层。 解决方案：涂层10设置在导体20上。涂层10从导体20侧包括含有钯的第一层12和含有金的第二层14。 第一层12在导体20侧具有第一区域31和比第一区域31更靠近第二层14布置的第二区域32.第二区域32是具有比第一区域更高的磷浓度的涂层10 31.版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP4853747B2

公开(公告)日：2012-01-11

申请号：JP2009507675

申请日：2007-01-29

申请人： マイクロン テクノロジー, インク.

发明人： ジー． ウッド，アラン ,  アール． ヘンブリー，デイビッド

IPC分类号： H01L25/065 ,  H01L21/3205 ,  H01L21/60 ,  H01L23/52 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L24/16 ,  G01R1/06716 ,  G01R1/07307 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02125 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45684 ,  H01L2224/45698 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45164 ,  H01L2924/013 ,  H01L2924/00013

摘要： A method for fabricating a stacked semiconductor system with encapsulated through wire interconnects includes providing a substrate having a first side, a second side and a substrate contact; forming a via in the substrate contact and the substrate to the second side; placing a wire in the via; forming a first contact on the wire proximate to the first side and a second contact on the wire proximate to the second side; and forming a polymer layer on the first side leaving the first contact exposed. The method also includes stacking two or more substrates and electrically connecting the through wire interconnects on the substrates.

公开(公告)号：JP4850392B2

公开(公告)日：2012-01-11

申请号：JP2004040403

申请日：2004-02-17

申请人： 三洋電機株式会社 ,  富士通セミコンダクター株式会社 ,  日本電気株式会社 ,  株式会社東芝

发明人： 工次郎 亀山 ,  博 寺尾 ,  芳央 岡山 ,  雅孝 星野 ,  光雄 梅本 ,  彰 鈴木 ,  健司 高橋

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05599

公开(公告)号：JP4817892B2

公开(公告)日：2011-11-16

申请号：JP2006061759

申请日：2006-03-07

申请人： 富士通セミコンダクター株式会社

发明人： 公一 中村 ,  和之 合葉 ,  欣一 熊谷 ,  隆雄 西村 ,  晃 高島

IPC分类号： H01L21/60 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1411 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17107 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2225/06558 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05541 ,  H01L2224/05005

摘要： A semiconductor device includes a semiconductor element having a main surface where an outside connection terminal pad is provided. The semiconductor element is connected to a conductive layer on a supporting board via a plurality of convex-shaped outside connection terminals provided on the outside connection terminal pad and a connection member; and the connection member commonly covers the convex-shaped outside connection terminals.

公开(公告)号：JP4809957B2

公开(公告)日：2011-11-09

申请号：JP4630199

申请日：1999-02-24

申请人： 日本テキサス・インスツルメンツ株式会社

发明人： 睦 升本 ,  健治 桝本

IPC分类号： H01L21/301 ,  H01L23/28 ,  H01L21/60 ,  H01L21/768 ,  H01L21/78 ,  H01L23/02 ,  H01L23/31 ,  H01L23/485 ,  H01L29/06

CPC分类号： H01L24/12 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/94 ,  H01L29/0657 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/013

公开(公告)号：JP4777644B2

公开(公告)日：2011-09-21

申请号：JP2004372615

申请日：2004-12-24

申请人： Okiセミコンダクタ株式会社

发明人： 潔敬 渡辺

IPC分类号： H01L23/12

CPC分类号： H01L23/49816 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/023 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/1191 ,  H01L2224/13 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/207 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device including a semiconductor substrate with circuit elements and electrode pads formed on one surface. The surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is included on the dielectric layer and patterned to form a conductive pattern with traces leading to the electrode pads. A protective layer is included as having openings exposing part of the conductive pattern. Each opening is covered by an electrode such as a solder bump, which is electrically connected through the conductive pattern to one of the electrode pads. The thickness of the protective layer, which may function as a package of the semiconductor device, is thus reduced. The protective layer may be formed from a photosensitive material, simplifying the formation of the openings for the electrodes.

公开(公告)号：JP4766725B2

公开(公告)日：2011-09-07

申请号：JP18733699

申请日：1999-07-01

申请人： セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー

发明人： ジェームス・ピー・レターマン，ジュニア ,  マイケル・ジェイ・セドン ,  ヨセフ・ケイ・ファウティ

IPC分类号： H01L21/60 ,  B23K20/00 ,  B23K20/16 ,  H01L21/607 ,  H01L23/485

CPC分类号： H01L24/85 ,  B23K20/004 ,  B23K20/16 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/43848 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/45647 ,  H01L2224/4847 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48866 ,  H01L2224/48871 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2224/85815 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/2076 ,  Y10T29/49149 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2224/48771 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/00015

摘要： A method of manufacturing an electronic component includes providing a substrate (101), forming a semiconductor device in the substrate (101), depositing a metal layer (107) over the substrate (101) and electrically coupled to the semiconductor device, depositing a layer (108) of solder over the metal layer, and wire bonding a wire (109) to the metal layer (107).

公开(公告)号：JP4759509B2

公开(公告)日：2011-08-31

申请号：JP2006511680

申请日：2005-03-29

申请人： 株式会社タムラ製作所 ,  独立行政法人科学技術振興機構

发明人： 雅彦 古野 ,  伊佐雄 坂本 ,  晴彦 安藤 ,  純一 小野崎 ,  篤志 平塚 ,  浩司 斉藤 ,  大 白井

IPC分类号： H01L21/60 ,  B23K1/012 ,  B23K3/06 ,  F27B17/00 ,  F27D7/02 ,  H01L21/48 ,  H01L23/12 ,  H05K3/34

CPC分类号： B23K1/012 ,  B23K1/0016 ,  B23K3/0623 ,  B23K3/08 ,  B23K2201/42 ,  F27B17/0025 ,  H01L21/4853 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/1131 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/3025 ,  H05K3/3436 ,  H05K3/3494 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01014

摘要： An apparatus characterized by a feature that in a stage on which a substrate or a jig holding a substrate is mounted, an opening closed when the substrate or the jig is mounted is provided and the substrate or the jig is heated by blowing hot air against the lower portion of the substrate or the jig and by a feature that a solder bump is formed on a pad electrode by heating or ref lowing a solder composition which is a mixture containing solder particles, a flux component, and a liquid material which is liquid at normal temperature or changing to liquid when heated, and the composition is heated from the substrate side. With the former feature, oxidization of the solder paste on the substrate where no hot air comes and adhesion of particles to the substrate can be prevented, and with the latter feature, solder particles near the pad electrode are melted earlier and wet and spread over the pad electrode, solder particles above and far from the pad electrode are not melted sufficiently, and an effect of reducing the possibility that solder particles join together can be expected.