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公开(公告)号:US12131985B2
公开(公告)日:2024-10-29
申请号:US17470519
申请日:2021-09-09
申请人: CORNING INCORPORATED
发明人: Mandakini Kanungo , Prantik Mazumder , Chukwudi Azubuike Okoro , Ah-Young Park , Scott Christopher Pollard , Rajesh Vaddi
IPC分类号: C25D3/38 , C03C3/06 , C03C15/00 , C03C17/06 , C03C17/10 , C03C23/00 , C23C14/18 , C23C18/38 , C23C28/02 , H01L21/48 , H01L21/768 , H01L23/15 , H01L23/48 , H01L23/498 , H05K1/02 , H05K1/03 , H05K1/11 , H05K3/38 , C03C3/076 , C25D7/12 , H01L23/00 , H01L23/492 , H05K3/00 , H05K3/42
CPC分类号: H01L23/49827 , C03C3/06 , C03C15/00 , C03C17/06 , C03C17/10 , C03C23/0025 , C23C14/18 , C23C18/38 , C23C28/02 , H01L21/76877 , H01L23/15 , H01L23/481 , H01L23/49838 , H05K1/0271 , H05K1/0306 , H05K1/115 , H05K3/388 , C03C3/076 , C03C2218/115 , C25D3/38 , C25D7/123 , H01L21/486 , H01L23/4924 , H01L23/49866 , H01L23/564 , H05K3/002 , H05K3/0029 , H05K3/0055 , H05K3/423 , H05K3/425 , H05K3/428 , H05K2201/068 , H05K2201/09545 , H05K2201/09563 , H05K2201/09609 , H05K2201/09827 , H05K2201/09854 , H05K2201/0989 , H05K2201/10378 , H05K2203/1194 , H05K2203/1361 , H05K2203/143 , H05K2203/1438 , H05K2203/162 , Y10T428/24273 , Y10T428/24479 , Y10T428/24851 , Y10T428/24917 , Y10T428/24926
摘要: According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.
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公开(公告)号:US12104269B2
公开(公告)日:2024-10-01
申请号:US18111487
申请日:2023-02-17
发明人: Paul R. McHugh , Gregory J. Wilson
CPC分类号: C25D21/10 , C25D5/08 , C25D7/12 , C25D17/001 , C25D17/02
摘要: Systems and methods for electroplating are described. The electroplating system may include a vessel configured to hold a first portion of a liquid electrolyte. The system may also include a substrate holder configured for holding a substrate in the vessel. The system may further include a first reservoir in fluid communication with the vessel. In addition, the system may include a second reservoir in fluid communication with the vessel. Furthermore, the system may include a first mechanism configured to expel a second portion of the liquid electrolyte from the first reservoir into the vessel. The system may also include a second mechanism configured to take in a third potion of the liquid electrolyte from the vessel into the second reservoir when the second portion of the liquid electrolyte is expelled from the first reservoir. Methods may include oscillating flow of the electrolyte within the vessel.
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公开(公告)号:US20240279835A1
公开(公告)日:2024-08-22
申请号:US18654247
申请日:2024-05-03
发明人: Nazila Dadvand
CPC分类号: C25D3/38 , C25D5/022 , C25D5/10 , C25D5/50 , C25D7/123 , H01L24/03 , H01L24/05 , H01L24/13 , C22C9/04 , H01L2224/03462 , H01L2224/0401 , H01L2224/05008 , H01L2224/05083 , H01L2224/05118 , H01L2224/05147 , H01L2224/05166 , H01L2224/05184 , H01L2224/13026 , H01L2224/13082
摘要: A microelectronic device is formed by forming a seed layer that contains primarily zinc. A plating mask is formed over the seed layer, and a copper strike layer is formed on the seed layer using a neutral pH copper plating bath. A main copper layer is formed on the copper strike layer by plating copper on the copper strike layer. The plating mask is subsequently removed. The main copper layer, the copper strike layer, and the seed layer are heated to diffuse copper and zinc, and form a brass layer under the main copper layer, consuming the seed layer between the main copper layer and the substrate. Remaining portions of the seed layer are removed by a wet etch process. The main copper layer and the underlying brass layer provide a conductor structure.
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公开(公告)号:US20240179848A1
公开(公告)日:2024-05-30
申请号:US18551955
申请日:2022-03-23
申请人: NAMICS CORPORATION
发明人: Naoki OBATA , Makiko SATO
IPC分类号: H05K3/10 , C23C18/16 , C23C18/38 , C23C28/02 , C25D3/38 , C25D5/02 , C25D7/12 , G03F7/00 , G03F7/16 , G03F7/26 , H05K3/18
CPC分类号: H05K3/108 , C23C18/1641 , C23C18/1653 , C23C18/38 , C23C28/023 , C25D3/38 , C25D5/022 , C25D7/123 , G03F7/0035 , G03F7/16 , G03F7/26 , H05K3/18 , H05K3/184 , H05K2203/072 , H05K2203/0723
摘要: The present invention is directed to provide novel methods for manufacturing laminates. The method includes the steps of: bonding the insulating substrate layer and a copper component having protrusions on a surface thereof; transferring the protrusions to a surface of the insulating substrate layer by peeling off the copper component to form a seed layer; forming a resist on a predetermined area of a surface of the seed layer; plating, with copper, the surface of the seed layer in an area where the resist has not been layered to laminate the copper; removing the resist; and removing the seed layer that has been exposed by the removal of the resist.
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5.
公开(公告)号:US20240106123A1
公开(公告)日:2024-03-28
申请号:US17899750
申请日:2022-08-31
发明人: Dah-Weih Duan , Elizabeth T Kunkee
IPC分类号: H01Q9/04 , C23C14/02 , C23C14/18 , C23C14/34 , C23C28/02 , C25D3/48 , C25D5/54 , C25D7/12 , H01Q1/48
CPC分类号: H01Q9/0407 , C23C14/022 , C23C14/185 , C23C14/34 , C23C28/023 , C25D3/48 , C25D5/54 , C25D7/123 , H01Q1/48
摘要: An exemplary RF module includes a dielectric substrate with metal traces on one surface that connect high frequency components and provide reference ground. Other metal traces on the other surface of the substrate also provide high frequency transmission lines and reference ground. An enclosure made using semiconductor manufacturing technology is mounted to the substrate and has conductive interior recesses defined by extending walls that are connected to the reference ground. The recesses surround the respective components and provide electromagnetic shielding. The dimensional precision in the location and smoothness of the walls and recesses due to the semiconductor manufacturing technology provides repeatable unit-to-unit RF characteristics of the RF module. One way of mounting the enclosure to the substrate uses a plurality of metal bonding bumps extending outwardly from the walls to engage reference ground metal traces on the substrate. Applied pressure deforms the bonding bumps to form a metal-to-metal bond.
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公开(公告)号:US11926920B2
公开(公告)日:2024-03-12
申请号:US17057981
申请日:2019-04-29
发明人: Zhaowei Jia , Jian Wang , Hui Wang , Hongchao Yang
IPC分类号: C25D5/18 , C25D7/12 , C25D17/00 , C25D17/06 , C25D17/12 , C25D21/12 , H01L21/288 , H01L21/687 , H01L23/544
CPC分类号: C25D5/18 , C25D7/12 , C25D17/001 , C25D17/06 , C25D17/12 , C25D21/12 , H01L21/2885 , H01L21/68764 , H01L23/544 , H01L2223/54493
摘要: Embodiments of the present invention provide an electroplating apparatus for electroplating on a surface of a wafer, which comprising a plurality of electrodes, for forming electric fields on the surface of the wafer, an independent electric field is formed in a designated area, when a notch of the wafer is positioned within the designated area, a total amount of power received by the notch is reduced. Embodiments of the present invention also provide an electroplating method for electroplating on a surface of a wafer, the method controlling the plurality of electrodes to form electric fields on the surface of the wafer, an independent electric field is formed in a designated area, when a notch of the wafer is positioned within the designated area, a total amount of power received by the notch is reduced. The present invention is more accurate and reliable, the electroplating efficiency is also increased.
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公开(公告)号:US11926918B2
公开(公告)日:2024-03-12
申请号:US16468467
申请日:2017-12-19
申请人: BASF SE
发明人: Marcel Patrik Kienle , Dieter Mayer , Marco Arnold , Alexandra Haag , Charlotte Emnet , Alexander Fluegel
IPC分类号: C25D3/32 , C25D3/02 , C25D3/38 , C25D7/12 , H01L21/288
CPC分类号: C25D3/32 , C25D3/02 , C25D3/38 , C25D7/123 , H01L21/2885
摘要: The invention relates to a polyamine-based or polyhydric alcohol-based suppressing agent. The suppressing agent is modified by reaction with a compound that introduces a branching group into the suppressing agent before they are reacted with an alkylene oxide. The suppressing agent shows extraordinary superfilling properties, particularly when used to fill in features having extremely small aperture sizes and/or high aspect ratios.
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8.
公开(公告)号:US20240063110A1
公开(公告)日:2024-02-22
申请号:US18492816
申请日:2023-10-24
申请人: CHUN-MING LIN
发明人: CHUN-MING LIN
CPC分类号: H01L23/49866 , H01L23/49822 , C25D7/12 , H01L21/4857 , C25D3/38 , H01L23/49827 , H05K1/112 , H05K1/09 , H05K1/115 , H05K2201/0364 , H05K2201/095 , H05K2201/09509 , H05K1/18
摘要: The present disclosure provides a method for forming a multilayer wiring structure, which includes: forming a patterned copper-phosphorous alloy layer over a carrier by performing a plating operation, and forming a dielectric layer over the patterned copper-phosphorous alloy layer. The forming the patterned copper-phosphorous alloy layer includes providing a plating solution having a copper source and a phosphorous source.
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公开(公告)号:US20240047235A1
公开(公告)日:2024-02-08
申请号:US17761841
申请日:2021-05-31
申请人: EBARA CORPORATION
发明人: Masaya SEKI
CPC分类号: H01L21/67051 , C25D7/12
摘要: Efficiency of a cleaning process and a degassing process for a surface to be processed of a substrate is improved.
A pre-wet module 200 includes a stage 220, a rotation mechanism 224, a pre-wet chamber 260, an elevating mechanism 230, a degassing liquid supply member 204, a nozzle 268, and a cleaning liquid supply member 202. The stage 220 is configured to hold a back surface of a substrate WF with a surface to be processed WF-a facing upward. The rotation mechanism 224 is configured to rotate the stage 220. The pre-wet chamber 260 includes a lid member 262 and a tubular member 264. The lid member 262 has an opposed surface 262a opposed to the surface to be processed WF-a of the substrate WF. The tubular member 264 is installed on an outer edge portion of the opposed surface 262a of the lid member 262. The elevating mechanism 230 is configured to move up and down the pre-wet chamber 260. The degassing liquid supply member 204 is configured to supply a degassing liquid to a pre-wet space 269 formed between the pre-wet chamber 260 and the surface to be processed WF-a of the substrate WF. The nozzle 268 is installed on the opposed surface 262a of the lid member 262. The cleaning liquid supply member 202 is configured to supply a cleaning liquid to the surface to be processed WF-a of the substrate WF via the nozzle 268.-
公开(公告)号:US11891713B2
公开(公告)日:2024-02-06
申请号:US17412173
申请日:2021-08-25
发明人: Takeyuki Suzuki
CPC分类号: C25D17/001 , C25D7/123 , C25D17/004 , C25D17/005 , C25D17/06
摘要: A semiconductor device manufacturing jig for electroplating a substrate includes a conductive member. The substrate includes an inner part including a first surface, and an outer rim part surrounding the inner part. The outer rim part has a ring shape that protrudes further than the first surface in a direction perpendicular to the first surface. The conductive member causes a current to flow in the inner part by contacting a portion of the first surface of the inner part without contacting the outer rim part.
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