公开(公告)号：US20120211901A1

公开(公告)日：2012-08-23

申请号：US13355792

申请日：2012-01-23

申请人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

发明人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/48 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/26175 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/29019 ,  H01L2224/29036 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32502 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/13064 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0132 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.

摘要翻译： 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后，形成与所述第一金属和所述第二金属合金的层，以将半导体芯片与半导体芯片安装区域接合。

公开(公告)号：US20060030071A1

公开(公告)日：2006-02-09

申请号：US11196487

申请日：2005-08-04

申请人： Masataka Mizukoshi ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki

发明人： Masataka Mizukoshi ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L24/02 ,  H01L24/06 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/06102 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13028 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13664 ,  H01L2224/13669 ,  H01L2224/16106 ,  H01L2224/16225 ,  H01L2224/2784 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81191 ,  H01L2224/83121 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/19041 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099

摘要： The present invention realizes a semiconductor device of high reliability which allows metal terminals which have a uniform height, are flat and smooth to be formed under low load and at low costs and to be mounted with low damage. The electrodes 5 and the insulating film 6 are both formed of materials having the property that they are solid and do not exhibit the adhesiveness at room temperature and exhibit the adhesiveness at a temperature not lower than a first temperature and cure at a temperature not lower than a second temperature higher than the first temperature. The surfaces of the electrodes 5 and the insulating film 6 of a semiconductor chip 1a are planarized in continuously flat with a hard cutting tool, as of diamond or others.

摘要翻译： 本发明实现了一种高可靠性的半导体器件，其允许在低负载和低成本下形成具有均匀高度，平坦和平滑的金属端子并且以低损伤安装。 电极5和绝缘膜6均由具有固体特性的材料形成，并且在室温下不显示粘合性，并且在不低于第一温度的温度下显示粘附性，并且在不低于 第二温度高于第一温度。 半导体芯片1a的电极5和绝缘膜6的表面与硬质切削工具一样平坦化，如金刚石等。

公开(公告)号：US5926010A

公开(公告)日：1999-07-20

申请号：US5797

申请日：1998-01-12

申请人： Kiyoshi Hosokawa ,  Nobuhiro Imaizumi

发明人： Kiyoshi Hosokawa ,  Nobuhiro Imaizumi

IPC分类号： B60R16/02 ,  H02H1/04 ,  H02H3/08 ,  H02H3/087 ,  H02H3/093 ,  G05F1/10

CPC分类号： H02H3/087 ,  H02H1/043 ,  Y10S323/908

摘要： An overcurrent breaking circuit includes a semiconductor switch inserted in a main current path; a current detector circuit for detecting a current passing through the main current path; a logic circuit for switching off the semiconductor switch when the current detector circuit detects a current exceeding a set value for an overcurrent level; a first unit for prohibiting the logic circuit from performing an operation for switching off the semiconductor switch even if the current detector circuit detects a current exceeding the set value for a first short time period immediately after the semiconductor switch is switched from a breaking state to a conductive state; and a second unit for prohibiting the logic circuit from performing an operation for switching off the semiconductor switch for a second short time period even if the current detector circuit detects a current exceeding the set value when the semiconductor switch remains in a conductive state.

摘要翻译： 过电流断路电路包括：插入主电流路径的半导体开关; 用于检测通过所述主电流路径的电流的电流检测器电路; 当电流检测器电路检测到超过设定值的电流为过电流电平时，切断半导体开关的逻辑电路; 第一单元，用于禁止逻辑电路执行关闭半导体开关的操作，即使电流检测器电路在半导体开关从断开状态切换到第一短时间段之后的第一短时间段内检测到超过设定值的电流 导电状态; 以及第二单元，用于在半导体开关保持导通状态时，即使电流检测器电路检测到超过设定值的电流，也禁止逻辑电路在第二短时间段内执行关闭半导体开关的操作。

公开(公告)号：US08674520B2

公开(公告)日：2014-03-18

申请号：US13355805

申请日：2012-01-23

申请人： Nobuhiro Imaizumi ,  Keishiro Okamoto ,  Keiji Watanabe

发明人： Nobuhiro Imaizumi ,  Keishiro Okamoto ,  Keiji Watanabe

IPC分类号： H01L29/40

CPC分类号： H01L23/49513 ,  H01L23/3107 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29 ,  H01L2224/29076 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10329 ,  H01L2924/13064 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/3512

摘要： A method for manufacturing a semiconductor device includes placing a sheet containing a fibrous material having at least one outer surface having a metal on a semiconductor chip-mounting region of a substrate; forming a bonding layer containing a fusible metal on the semiconductor chip-mounting region; placing a semiconductor chip on the semiconductor chip-mounting region; and bonding the semiconductor chip to the semiconductor chip-mounting region with the fusible metal-containing bonding layer by heating.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在衬底的半导体芯片安装区域上放置含有具有至少一个具有金属的外表面的纤维材料的片材; 在半导体芯片安装区域上形成含有可熔金属的接合层; 将半导体芯片放置在半导体芯片安装区域上; 并且通过加热将半导体芯片与可熔融金属键合层接合到半导体芯片安装区域。

公开(公告)号：US07852439B2

公开(公告)日：2010-12-14

申请号：US12561613

申请日：2009-09-17

申请人： Hisashi Yamaguchi ,  Fumio Yamagishi ,  Shigeo Matsunuma ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki ,  Taiji Sakai ,  Junji Tomita

发明人： Hisashi Yamaguchi ,  Fumio Yamagishi ,  Shigeo Matsunuma ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki ,  Taiji Sakai ,  Junji Tomita

IPC分类号： G02F1/1335

CPC分类号： G02F1/13476 ,  G02F1/133305 ,  G02F1/13452 ,  G02F2203/34

摘要： The invention relates to a multi-layer display element configured by a plurality of layers for use as a display section of electronic paper or others, and a manufacturing method for the multi-layer display element. The invention provides a multi-layer display element that allows a pixel area not being narrowed, a high yield of electrode formation, and interlayer connection with no need for a high-temperature process, and a manufacturing method for such a multi-layer display element. The multi-layer liquid crystal display element includes a data signal output terminal group from which data signals are provided, a scanning signal output terminal group from which scanning signals are provided, a data electrode connection wire rod group respectively connecting data electrodes to the data signal output terminal group, and a scanning electrode connection wire rod group respectively connecting scanning electrodes to the scanning signal output terminal group.

摘要翻译： 本发明涉及一种由多层构成的多层显示元件，用于电子纸等的显示部分，以及多层显示元件的制造方法。 本发明提供了一种多层显示元件，其可以使像素区域不变窄，高产率的电极形成和层间连接，而不需要高温处理，以及这种多层显示元件的制造方法 。 多层液晶显示元件包括提供数据信号的数据信号输出端子组，设置有扫描信号的扫描信号输出端子组，分别将数据电极连接到数据信号的数据电极连接线棒组 输出端子组和扫描电极连接线组，分别将扫描电极连接到扫描信号输出端子组。

公开(公告)号：US20100097550A1

公开(公告)日：2010-04-22

申请号：US12561613

申请日：2009-09-17

申请人： Hisashi Yamaguchi ,  Fumio Yamagishi ,  Shigeo Matsunuma ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki ,  Taiji Sakai ,  Junji Tomita

发明人： Hisashi Yamaguchi ,  Fumio Yamagishi ,  Shigeo Matsunuma ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki ,  Taiji Sakai ,  Junji Tomita

IPC分类号： G02F1/1335 ,  H01J9/20 ,  G09G5/00

CPC分类号： G02F1/13476 ,  G02F1/133305 ,  G02F1/13452 ,  G02F2203/34

摘要： The invention relates to a multi-layer display element configured by a plurality of layers for use as a display section of electronic paper or others, and a manufacturing method for the multi-layer display element. The invention provides a multi-layer display element that allows a pixel area not being narrowed, a high yield of electrode formation, and interlayer connection with no need for a high-temperature process, and a manufacturing method for such a multi-layer display element. The multi-layer liquid crystal display element includes a data signal output terminal group from which data signals are provided, a scanning signal output terminal group from which scanning signals are provided, a data electrode connection wire rod group respectively connecting data electrodes to the data signal output terminal group, and a scanning electrode connection wire rod group respectively connecting scanning electrodes to the scanning signal output terminal group.

摘要翻译： 本发明涉及一种由多层构成的多层显示元件，用于电子纸等的显示部分，以及多层显示元件的制造方法。 本发明提供了一种多层显示元件，其可以使像素区域不变窄，高产率的电极形成和层间连接，而不需要高温处理，以及这种多层显示元件的制造方法 。 多层液晶显示元件包括提供数据信号的数据信号输出端子组，设置有扫描信号的扫描信号输出端子组，分别将数据电极连接到数据信号的数据电极连接线棒组 输出端子组和扫描电极连接线组，分别将扫描电极连接到扫描信号输出端子组。

公开(公告)号：US20090176331A1

公开(公告)日：2009-07-09

申请号：US12403252

申请日：2009-03-12

申请人： Masataka MIZUKOSHI ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki

发明人： Masataka MIZUKOSHI ,  Nobuhiro Imaizumi ,  Yoshikatsu Ishizuki

IPC分类号： H01L21/98 ,  H01L21/50

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L24/02 ,  H01L24/06 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/06102 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13028 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13664 ,  H01L2224/13669 ,  H01L2224/16106 ,  H01L2224/16225 ,  H01L2224/2784 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81191 ,  H01L2224/83121 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/19041 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099

摘要： The present invention realizes a semiconductor device of high reliability which allows metal terminals which have a uniform height, are flat and smooth to be formed under low load and at low costs and to be mounted with low damage. The electrodes 5 and the insulating film 6 are both formed of materials having the property that they are solid and do not exhibit the adhesiveness at room temperature and exhibit the adhesiveness at a temperature not lower than a first temperature and cure at a temperature not lower than a second temperature higher than the first temperature. The surfaces of the electrodes 5 and the insulating film 6 of a semiconductor chip 1a are planarized in continuously flat with a hard cutting tool, as of diamond or others.

摘要翻译： 本发明实现了一种高可靠性的半导体器件，其允许在低负载和低成本下形成具有均匀高度，平坦和平滑的金属端子并且以低损伤安装。 电极5和绝缘膜6均由具有固体特性的材料形成，并且在室温下不显示粘合性，并且在不低于第一温度的温度下显示粘附性，并且在不低于 第二温度高于第一温度。 半导体芯片1a的电极5和绝缘膜6的表面与硬质切削工具一样平坦化，如金刚石等。

公开(公告)号：US06873056B2

公开(公告)日：2005-03-29

申请号：US10704553

申请日：2003-11-12

申请人： Seiki Sakuyama ,  Nobuhiro Imaizumi ,  Tomohisa Yagi

发明人： Seiki Sakuyama ,  Nobuhiro Imaizumi ,  Tomohisa Yagi

IPC分类号： H05K3/28 ,  H01L21/56 ,  H01L21/60 ,  H05K3/32 ,  H05K3/34 ,  H05K3/46 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/321 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/29011 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K3/3473 ,  H05K3/3484 ,  H05K2201/0209 ,  H05K2201/10977 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0568 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A process of making an electrode-to-electrode bond structure includes a step of forming a resin coating on a first bonding object having a first electrode portion in a manner such that the resin coating covers the first electrode portion. Then, an opening is formed in the resin coating to expose the first electrode portion. Then, the opening is filled with a metal paste containing a metal and a resin component. Then, the first bonding object is placed on a second bonding object having a second electrode portion in a manner such that the metal paste filled in the opening faces the second electrode portion while the resin coating contacts the second bonding object. Finally, heat-treatment is performed to cause the first electrode portion and the second electrode portion to be electrically connected with each other via the metal while causing the resin coating to harden.

摘要翻译： 制造电极对电极结合结构的工序包括在具有第一电极部的第一接合体上形成树脂被膜的工序，使树脂被覆覆盖第一电极部。 然后，在树脂涂层中形成开口以露出第一电极部分。 然后，用含有金属和树脂成分的金属膏填充开口。 然后，第一接合体被放置在具有第二电极部分的第二接合体上，使得填充在开口中的金属膏面向第二电极部分，同时树脂涂层接触第二接合物体。 最后，进行热处理，使第一电极部分和第二电极部分通过金属彼此电连接，同时使树脂涂层硬化。

公开(公告)号：US06869822B2

公开(公告)日：2005-03-22

申请号：US10105287

申请日：2002-03-26

申请人： Tomohisa Yagi ,  Nobuhiro Imaizumi ,  Yasuhiro Usui ,  Kenji Fukuzono

发明人： Tomohisa Yagi ,  Nobuhiro Imaizumi ,  Yasuhiro Usui ,  Kenji Fukuzono

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/498 ,  H01L21/44

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L24/29 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/3512

摘要： According to a method of making a semiconductor device, a semiconductor chip is bonded to a substrate via bumps by flip-chip bonding. Then, a sealing adhesive composition is loaded between the semiconductor chip and the substrate to provide an adhesive sealing. The sealing adhesive composition, which is capable of hardening in two stages, contains at least a first main resin ingredient, a second main resin ingredient and a hardening agent. Then, the adhesive sealing is heated for primary hardening. Then, the substrate is placed on a mother board with a solder material interposed between the substrate and the mother board. Finally, the adhesive sealing is heated for secondary hardening while the solder material is reflowed for bonding the substrate to the mother board.

摘要翻译： 根据制造半导体器件的方法，通过倒装芯片接合，半导体芯片通过凸块接合到基板。 然后，将密封粘合剂组合物装载在半导体芯片和基板之间以提供粘合剂密封。 能够两阶段硬化的密封粘合剂组合物至少含有第一主要树脂成分，第二主要树脂成分和硬化剂。 然后，加热粘合剂密封件进行一次硬化。 然后，将基板放置在母板上，其中焊料材料插入在基板和母板之间。 最后，将粘合剂密封加热以进行二次硬化，同时将焊料回流焊接到母板上。

公开(公告)号：US06576081B2

公开(公告)日：2003-06-10

申请号：US09438665

申请日：1999-11-12

申请人： Hiroaki Date ,  Yuko Motoyama ,  Hideshi Tokuhira ,  Makoto Usui ,  Nobuhiro Imaizumi

发明人： Hiroaki Date ,  Yuko Motoyama ,  Hideshi Tokuhira ,  Makoto Usui ,  Nobuhiro Imaizumi

IPC分类号： C09J902

CPC分类号： H01L24/28 ,  H01L21/563 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29373 ,  H01L2224/29386 ,  H01L2224/2949 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83097 ,  H01L2224/83099 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/303 ,  H05K3/386 ,  Y10T156/1011 ,  Y10T156/1018 ,  Y10T156/1026 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

摘要： The present invention is characterized by comprising a two-pack adhesive of an A agent selected from components, an acrylic monomer, a peroxide, a reducing agent, an epoxy resin precursor and a curing agent and containing at least one or two of the acrylic monomer, the peroxide and the reducing agent, and a B agent containing all of the remaining components which are not selected in the A agent. The use of this adhesive makes it possible to stably obtain the bonding free from a thermal stress with the excellent heat resistance and the good reliability.

摘要翻译： 本发明的特征在于包括选自组分，丙烯酸类单体，过氧化物，还原剂，环氧树脂前体和固化剂的A试剂的双组分粘合剂，并且含有至少一种或两种丙烯酸类单体 ，过氧化物和还原剂，以及含有在A剂中未选择的所有剩余成分的B剂。 通过使用这种粘合剂，可以稳定地获得没有热应力的结合，具有优异的耐热性和良好的可靠性。