公开(公告)号：US12063743B2

公开(公告)日：2024-08-13

申请号：US17873144

申请日：2022-07-26

Applicant: NICHIA CORPORATION

Inventor： Masakazu Sakamoto ,  Masaaki Katsumata ,  Tomohisa Kishimoto

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/10 ,  H05K3/32 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/184 ,  H05K1/0283 ,  H05K1/188 ,  H05K3/10 ,  H05K3/32 ,  H05K3/425 ,  H05K3/4611 ,  H05K2201/10106

Abstract: A printed circuit board includes a printed wiring board including an insulative substrate having a first surface and a second surface opposite to the first surface, and wiring provided on the second surface of the insulative substrate to face the through-holes. The insulative substrate has flexibility and through-holes passing through the insulative substrate from the first surface to the second surface. A semiconductor element is mounted on the first surface of the insulative substrate of the printed wiring board and has element terminals interposed between the printed wiring board and the semiconductor element. Conductive members filled in the through-holes connect the element terminals and the wiring. The insulative substrate has elasticity in which an elongation percentage of the insulative substrate is 20% or more. The wiring is formed from a conductive polymer or an elastic conductive paste in which conductive particles are mixed into a resin material.

公开(公告)号：US20240268034A1

公开(公告)日：2024-08-08

申请号：US18382278

申请日：2023-10-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jesang Park ,  Changgun Oh ,  Yangje Lee ,  Hyun Kyung Park

IPC: H05K3/10 ,  H05K1/03 ,  H05K3/46

CPC classification number: H05K3/103 ,  H05K1/0306 ,  H05K3/4697 ,  H05K2201/0212 ,  H05K2201/0753 ,  H05K2201/099 ,  H05K2201/10204 ,  H05K2203/0186 ,  H05K2203/1377

Abstract: A circuit board according to an embodiment includes: a first insulation layer, a first circuit wire that is disposed on the first insulation layer, a second insulation layer that covers the first insulation layer and the first circuit wire, and includes a material that is different from that of the first insulation layer, and a third insulation layer that is disposed on the second insulation layer and includes a cavity. A bottom surface of the cavity is a top surface of the second insulation layer.

公开(公告)号：US12056994B2

公开(公告)日：2024-08-06

申请号：US16929531

申请日：2020-07-15

Applicant: Xerox Corporation

Inventor： Ping Mei ,  Robert Anthony Street ,  Kent Evans

IPC: G08B13/14 ,  A41D31/04 ,  B32B5/02 ,  B32B25/10 ,  H01B1/22 ,  H01B5/14 ,  H05K1/18 ,  H05K3/10

CPC classification number: G08B13/1472 ,  A41D31/04 ,  B32B5/024 ,  B32B5/028 ,  B32B25/10 ,  H01B1/22 ,  H01B5/14 ,  H05K1/18 ,  H05K3/10 ,  B32B2307/202 ,  C09J2203/358

Abstract: Systems and methods are provided for monitoring object placement on a surface. The system includes a pressure-sensitive conductive sheet. The pressure-sensitive conductive sheet includes a stretchable fabric, having a plurality of fibers, and a conductive material positioned on a plurality of adjoining fibers of the stretchable fabric. The system further includes a 3-dimensional structure positioned under the pressure-sensitive conductive sheet. The 3-dimensional structure includes one or more depressions onto which the stretchable fabric can be stretched and the conductive material is positioned over the one or more depressions.

公开(公告)号：US12048102B2

公开(公告)日：2024-07-23

申请号：US17630860

申请日：2019-07-30

Applicant: FUJI CORPORATION

Inventor： Ryojiro Tominaga ,  Kenji Tsukada ,  Ryo Sakakibara ,  Tasuku Takeuchi

IPC: H05K3/00 ,  H05K3/10 ,  H05K3/40

CPC classification number: H05K3/10 ,  H05K3/40 ,  H05K2203/0776

Abstract: To provide an electronic circuit production method using 3D layer shaping capable of producing an electronic circuit having improved electrical properties and mechanical properties by utilizing characteristics of a fluid containing a metal particle by selectively using the fluid containing the metal particle. The electronic circuit production method using 3D layer shaping, the method including a wiring forming step of forming a wiring by applying a fluid containing a nano-sized metal nanoparticle on an insulating member and curing the applied fluid containing the metal nanoparticle; and a connection terminal forming step of forming a connection terminal electrically connected to the wiring by applying a fluid containing a micro-sized metal microparticle and curing the applied fluid containing the metal microparticle.

公开(公告)号：US20240215155A1

公开(公告)日：2024-06-27

申请号：US18557020

申请日：2022-01-26

Applicant: NITTO DENKO CORPORATION

Inventor： Makoto TSUNEKAWA

IPC: H05K1/02 ,  H05K1/05 ,  H05K3/00 ,  H05K3/10

CPC classification number: H05K1/0296 ,  H05K1/053 ,  H05K3/0044 ,  H05K3/10 ,  H05K2203/0228

Abstract: An assembly sheet includes a wiring circuit board, a frame, and a reinforcement portion. The wiring circuit board has a support layer, a base insulating layer, and a conductive pattern. The frame supports the wiring circuit board. The reinforcement portion is disposed on the frame and reinforces the frame. The reinforcement portion has a first layer made of a metal and a second layer made of a metal.

公开(公告)号：US12016118B2

公开(公告)日：2024-06-18

申请号：US17760079

申请日：2021-02-26

Applicant: KUPRION INC.

Inventor： Alfred A. Zinn ,  Khanh Nguyen

IPC: H05K1/09 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K3/30 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/0306 ,  H05K1/092 ,  H05K1/115 ,  H05K1/181 ,  H05K1/183 ,  H05K3/107 ,  H05K3/303 ,  H05K3/4038 ,  H05K3/46 ,  H05K2201/09227 ,  H05K2201/09563

Abstract: Printed circuit boards may be formed using ceramic substrates with high thermal conductivity to facilitate heat dissipation. Metal nanoparticles, such as copper nanoparticles, may be used to form conductive traces and fill through-plane vias upon the ceramic substrates. Multi-layer printed circuit boards may comprise two or more ceramic substrates adhered together, wherein each ceramic substrate has one or more conductive traces defined thereon and the one or more conductive traces are formed through consolidation of metal nanoparticles. The one or more conductive traces in a first ceramic substrate layer are in electrical communication with at least one second ceramic substrate layer adjacent thereto.

公开(公告)号：US20240196541A1

公开(公告)日：2024-06-13

申请号：US18425373

申请日：2024-01-29

Applicant: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd. ,  Avary Holding (Shenzhen) Co., Limited .

Inventor： CHENG-JIA LI ,  Mei Yang

IPC: H05K3/00 ,  H05K3/10 ,  H05K3/38 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/0097 ,  H05K3/0026 ,  H05K3/465 ,  H05K3/107 ,  H05K3/385 ,  H05K3/4038 ,  H05K3/4053 ,  H05K3/4076 ,  H05K2201/0108 ,  H05K2201/0323 ,  H05K2203/0152 ,  H05K2203/1572

Abstract: A transparent circuit board includes a conductive wiring, a transparent insulating layer, and a cover film stacked on the transparent insulating layer. The conductive wiring penetrates the transparent insulating layer along the stacking direction, and is at least partially embedded in the conductive wiring. A blackened layer is formed on a surface of the conductive wiring combined with the cover film, a carbon black layer is formed on a surface of the conductive wiring without the blackened layer, thereby improving a light transmittance of the transparent circuit board.

公开(公告)号：US11998982B2

公开(公告)日：2024-06-04

申请号：US17166475

申请日：2021-02-03

Applicant: Desktop Metal, Inc.

Inventor： George Hudelson ,  Emanuel M. Sachs ,  Glenn A. Jordan ,  Midnight Zero

IPC: B33Y30/00 ,  B22F1/10 ,  B22F3/00 ,  B22F3/16 ,  B22F3/18 ,  B22F3/24 ,  B22F10/00 ,  B22F10/14 ,  B22F10/37 ,  B22F12/52 ,  B22F12/57 ,  B22F12/63 ,  B29C64/194 ,  B29C64/214 ,  B29C64/218 ,  B29C64/236 ,  B29C64/329 ,  B29C64/343 ,  B33Y10/00 ,  B33Y40/00 ,  H05K3/10 ,  H05K3/12 ,  B22F10/28 ,  B22F12/00 ,  B29C64/165 ,  B33Y50/02

CPC classification number: B22F3/004 ,  B22F1/10 ,  B22F3/16 ,  B22F3/18 ,  B22F3/24 ,  B22F10/00 ,  B22F10/14 ,  B22F10/37 ,  B22F12/52 ,  B22F12/57 ,  B22F12/63 ,  B29C64/194 ,  B29C64/214 ,  B29C64/218 ,  B29C64/236 ,  B29C64/329 ,  B29C64/343 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y40/00 ,  H05K3/102 ,  H05K3/1275 ,  B22F2003/247 ,  B22F10/28 ,  B22F12/224 ,  B22F2998/10 ,  B22F2999/00 ,  B29C64/165 ,  B33Y50/02 ,  H05K2203/0126 ,  H05K2203/0143 ,  H05K2203/1131 ,  B22F2999/00 ,  B22F3/004 ,  B22F2201/20 ,  B22F2998/10 ,  B22F10/10 ,  B22F3/004 ,  B22F2203/00 ,  B22F3/02 ,  B22F1/145 ,  B22F10/20 ,  B22F2999/00 ,  B22F10/10 ,  B22F10/00 ,  B22F3/004 ,  B22F2998/10 ,  B22F10/00 ,  B22F3/004 ,  B22F2203/00 ,  B22F3/02 ,  B22F1/145 ,  B22F10/10 ,  B22F2999/00 ,  B22F10/10 ,  B22F3/004 ,  B22F2203/00 ,  B22F2998/10 ,  B22F10/14 ,  B22F3/004 ,  B22F2203/00 ,  B22F3/02 ,  B22F1/145 ,  B22F10/28 ,  B22F2998/10 ,  B22F10/14 ,  B22F3/004 ,  B22F2203/00 ,  B22F3/02 ,  B22F1/145 ,  B22F10/14 ,  B22F2999/00 ,  B22F12/52 ,  B22F3/004 ,  B22F2203/00 ,  B22F2999/00 ,  B22F10/14 ,  B22F3/004 ,  B22F2999/00 ,  B22F12/52 ,  B22F10/14 ,  B22F3/004 ,  B22F2999/00 ,  B22F10/14 ,  B22F3/004 ,  B22F2203/00 ,  B22F2998/10 ,  B22F2203/00 ,  B22F3/004 ,  B22F1/145 ,  B22F3/02 ,  B22F10/20 ,  B22F10/10 ,  B22F2998/10 ,  B22F10/00 ,  B22F2203/00 ,  B22F3/004 ,  B22F1/145 ,  B22F3/02 ,  B22F10/10

Abstract: A system and corresponding method for additive manufacturing of a three-dimensional (3D) object to improve packing density of a powder bed used in the manufacturing process. The system and corresponding method enable higher density packing of the powder. Such higher density packing leads to better mechanical interlocking of particles, leading to lower sintering temperatures and reduced deformation of the 3D object during sintering. An embodiment of the system comprises means for adjusting a volume of a powder metered onto a top surface of the powder bed to produce an adjusted metered volume and means for spreading the adjusted metered volume to produce a smooth volume for forming a smooth layer of the powder with controlled packing density across the top surface of the powder bed. The controlled packing density enables uniform shrinkage, without warping, of the 3D object during sintering to produce higher quality 3D printed objects.

公开(公告)号：US20240179830A1

公开(公告)日：2024-05-30

申请号：US18106129

申请日：2023-02-06

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Woong Choi ,  Jae Ho Shin

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/10 ,  H05K3/18

CPC classification number: H05K1/0224 ,  H05K1/115 ,  H05K3/107 ,  H05K3/188 ,  H05K2201/09036 ,  H05K2201/096

Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes a plurality of insulating layers each having a plurality of concave portions; a plurality of conductor pattern layers disposed in a plurality of concave portions of each of the plurality of insulating layers; first and second via holes connected to one of the plurality of concave portions independently of each other and penetrating through at least two of the plurality of insulating layers independently of each other; and first and second via conductors disposed in the first and second via holes, respectively, and connecting two of the plurality of conductor pattern layers independently of each other. An average width of the first via conductor is greater than that of the second via conductor on a cross-section.

公开(公告)号：US20240164024A1

公开(公告)日：2024-05-16

申请号：US18504725

申请日：2023-11-08

Applicant: NITTO DENKO CORPORATION

Inventor： Ikuya HASHIMOTO ,  Ryosuke SASAOKA ,  Naoki SHIBATA

IPC: H05K3/10 ,  H05K1/11 ,  H05K3/00 ,  H05K3/18

CPC classification number: H05K3/108 ,  H05K1/119 ,  H05K3/002 ,  H05K3/18 ,  H05K3/28 ,  H05K2203/0723

Abstract: A method for producing a wiring circuit board includes a region setting step of setting a pattern forming region and an opening forming region in a support layer; an insulating layer forming step of forming a base insulating layer on the support layer in the pattern forming region; a pattern step of forming a conductive pattern having a first conductive layer and a second conductive layer on the base insulating layer; and an etching step of etching the support layer in the opening forming region, and in the pattern step, a dummy pattern is formed in the opening forming region.