公开(公告)号：US09977074B2

公开(公告)日：2018-05-22

申请号：US14672611

申请日：2015-03-30

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Tomoharu Fujii

IPC: H05K7/10 ,  H05K7/12 ,  G01R31/28 ,  H05K1/02 ,  H05K3/00 ,  H01L23/00

CPC classification number: G01R31/2818 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/19105 ,  H05K1/0268 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/0989 ,  H05K2201/09972 ,  H05K2203/175

Abstract: A semiconductor device includes a board, an electronic component, an evaluation component, a wiring, and a groove portion. The board includes a product area, a non-product area, and a boundary area between the product area and the non-product area. The electronic component is mounted in the product area. The evaluation component is mounted in the non-product area. The wiring electrically connects the electronic component and the evaluation component. The groove portion is formed in the boundary area of the board so as to overlap at least a part of the wiring in a plan view. The non-product area is surrounded by the groove portion and at least a portion of sides of the board.

公开(公告)号：US09949359B2

公开(公告)日：2018-04-17

申请号：US14308463

申请日：2014-06-18

Applicant: Apple Inc.

Inventor： Yanfeng Chen ,  Shankar S. Pennathur

IPC: H05K1/18 ,  H05K9/00 ,  H05K1/02 ,  H05K3/28 ,  H05K3/30 ,  H05K7/00

CPC classification number: H05K1/0216 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/18 ,  H05K3/284 ,  H05K3/30 ,  H05K9/00 ,  H05K9/0081 ,  H05K2201/09972 ,  H05K2201/10371 ,  H05K2203/1322 ,  Y10T29/49146

Abstract: A portable electronic device packaged into a System-in-Package assembly is disclosed. The portable electronic device can include a substrate and a plurality of components mounted on the substrate and included in one or more subsystems. Interference between subsystems or from external sources can be reduced or eliminated by disposing an insulating layer over the components, forming narrow trenches between subsystems, and depositing one or more layers of a multi-layer thin film stack on the insulating layer and filling the trenches. In some examples, the multi-layer thin film stack can include an adhesion layer, a shielding layer, a protection layer, and a cosmetic layer. In some examples, the multi-layer thin film stack can include multi-functional layers such as a protection and cosmetic layer.

公开(公告)号：US20180098418A1

公开(公告)日：2018-04-05

申请号：US15796592

申请日：2017-10-27

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd

Inventor： Ah Ron Lee ,  Deog Soon Choi ,  Young Ho Lee ,  Boon Keat Tan ,  Jin Ho Choi

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K1/0216 ,  H05K1/023 ,  H05K1/111 ,  H05K1/181 ,  H05K2201/09972 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10287 ,  H05K2201/1056

Abstract: A compartment EMI shield is provided that is suitable for use in system module packages having thin form factors and/or smaller widths and/or lengths. The compartment EMI shield comprises a fence arranged along a compartment boundary at least in between first and second sets of electrical components of the system module package and a substantially horizontal conductive structure that is coupled to the conductive fence. The fence being configured to attenuate EMI of a frequency of interest traveling in at least one of a first direction and a second direction, where the first direction is from the first set of electrical components toward the second set of electrical components and the second direction is from the second set of electrical components toward the first set of electrical components.

公开(公告)号：US20180077795A1

公开(公告)日：2018-03-15

申请号：US15819857

申请日：2017-11-21

Applicant: SMR Patents S.à.r.l.

Inventor： Andreas Herrmann

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/36 ,  H05K3/00 ,  H05K3/34 ,  H05K1/14

CPC classification number: H05K1/0292 ,  B60R1/12 ,  H05K1/0201 ,  H05K1/028 ,  H05K1/0286 ,  H05K1/0306 ,  H05K1/0313 ,  H05K1/14 ,  H05K1/142 ,  H05K1/181 ,  H05K3/0014 ,  H05K3/105 ,  H05K3/341 ,  H05K3/361 ,  H05K2201/0187 ,  H05K2201/09027 ,  H05K2201/09118 ,  H05K2201/09963 ,  H05K2201/09972 ,  H05K2201/10386 ,  H05K2201/209 ,  H05K2203/107 ,  H05K2203/1453 ,  H05K2203/1461 ,  H05K2203/168 ,  Y10T29/49126

Abstract: A method of making a printed circuit board and a printed circuit board including a plurality of plastic substrate parts having one or more first substrate parts each having at least one coupling means, and one or more second substrate parts each having at least one receiving means to receive the coupling mean. At least one of the plurality of plastic substrate parts is formed with a further structural element, and at least two of the plurality of plastic substrate parts are connected to each other through the at least one coupling means and the at least one receiving means. The connected substrate parts include a circuit.

公开(公告)号：US09829915B2

公开(公告)日：2017-11-28

申请号：US14496876

申请日：2014-09-25

Applicant: Intel Corporation

Inventor： Kevin E. Wells ,  Richard C. Stamey

IPC: H05K1/11 ,  H05K3/42 ,  G06F1/16 ,  H05K3/36 ,  H05K1/02 ,  H05K7/02 ,  H05K3/34 ,  H05K1/14

CPC classification number: G06F1/16 ,  H01L2924/0002 ,  H05K1/115 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/421 ,  H05K3/4694 ,  H05K2201/041 ,  H05K2201/09972 ,  H05K2201/10159 ,  H05K2201/10719 ,  Y02P70/613 ,  Y10T29/49128 ,  H01L2924/00

Abstract: Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a first pattern of routing structures on one or more layers of the first PCB module. The apparatus may further include a second PCB module with a second pattern of routing structures on one or more layers of the second PCB module. The second pattern of routing structures may be aligned with and electrically coupled to the first pattern of routing structures without connectors. Other embodiments may be described and/or claimed.

公开(公告)号：US20170236810A1

公开(公告)日：2017-08-17

申请号：US15354484

申请日：2016-11-17

Applicant: Renesas Electronics Corporation

Inventor： Yoichiro KURITA ,  Masaya KAWANO ,  Koji SOEJIMA

IPC: H01L25/00 ,  H01L23/00 ,  H01L25/18 ,  H01L23/538 ,  H01L21/56 ,  H01L21/683

CPC classification number: H01L25/50 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/02 ,  H01L24/16 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2224/02319 ,  H01L2224/02331 ,  H01L2224/02333 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/16137 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/18161 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/0733 ,  H05K2203/1469 ,  H01L2924/00 ,  H01L2224/0401

Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.

公开(公告)号：US09664719B2

公开(公告)日：2017-05-30

申请号：US14350808

申请日：2012-11-19

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Masami Kishiro

IPC: G01R27/26 ,  G01P15/00 ,  H05K1/02 ,  G01D5/241 ,  G01P15/125 ,  H05K3/34 ,  G01P15/08

CPC classification number: G01R27/2605 ,  G01D5/2417 ,  G01P15/00 ,  G01P15/125 ,  G01P2015/082 ,  G01P2015/084 ,  H05K1/0256 ,  H05K3/3452 ,  H05K2201/09972 ,  H05K2201/10151

Abstract: A capacitance detection circuit has at least a carrier signal generating circuit that supplies a carrier signal to one of a movable or a fixed electrode of a sensor, an operational amplifier with one of the movable or fixed electrode as an input and ground as another input, and a printed circuit board on which the physical quantity sensor, the carrier signal generating circuit, and the operational amplifier are mounted. An insulation-secured area on the printed circuit board is configured as a moisture absorption reduction area, including at least an electrode connection part of the physical quantity sensor, an input-side connection part of the operational amplifier, and a connection part connected to the input side of the operational amplifier out of connection parts of input-side circuit components connected between the electrode connection part and the input-side connection part.

公开(公告)号：US20170142840A1

公开(公告)日：2017-05-18

申请号：US15353722

申请日：2016-11-16

Applicant: Aegex Technologies, LLC

Inventor： Endre Surinya

IPC: H05K1/18 ,  H05K5/00 ,  H05K1/02

CPC classification number: H05K1/186 ,  H05K1/0209 ,  H05K1/0213 ,  H05K1/0257 ,  H05K3/284 ,  H05K5/0086 ,  H05K2201/09972 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10166 ,  H05K2201/10181 ,  H05K2201/10356

Abstract: An intrinsically safe mobile device having a form factor, speed, and functionality comparable to a conventional non-intrinsically safe mobile device, includes non-intrinsically safe electronic components mounted on an unprotected part of a printed circuit board (PCB) contained within the mobile device, the non-intrinsically safe electronic components are encapsulated to reduce risk of sparking and to minimize surface heating to enable the encapsulated electronic components to be certified as intrinsically safe, wherein the encapsulated electronic components are connected using a trace with intrinsically safe electronic components mounted on a protected part of the PCB and are connected with user interface components using FPC cabling, wherein the trace and the FPC cabling are certified as intrinsically safe using one or more protection techniques chosen from a resistor, a double MOSFET clamping circuit, a capacitor, a fuse, and maintaining a minimum clearance space.

公开(公告)号：US20170125363A1

公开(公告)日：2017-05-04

申请号：US15408683

申请日：2017-01-18

Applicant: MEDIATEK INC.

Inventor： Chun-Wei CHANG ,  Shang-Pin CHEN

IPC: H01L23/66 ,  H01L25/065 ,  G06F13/40 ,  H01L23/538 ,  H01L23/552 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L23/66 ,  G06F13/4072 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/16 ,  H01L25/0655 ,  H01L27/12 ,  H01L2223/6688 ,  H01L2224/16227 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/3025 ,  H04B3/32 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/0243 ,  H05K1/181 ,  H05K3/46 ,  H05K2201/09972 ,  H05K2201/10159 ,  H05K2201/10318 ,  H05K2201/10522

Abstract: An integrated circuit is provided. The integrated circuit includes a control circuitry, a plurality of pins coupled to a plurality of conductive traces of a printed circuit board (PCB), and a plurality of driving units coupled to the pins. The control circuitry provides a plurality of control signals according to data to be transmitted. The driving units are divided into a plurality of first driving units and second driving units. According to the control signals, the first driving units provide the data to a memory device of the PCB via the corresponding pins and the corresponding conductive traces of PCB, and the second driving units provide a constant voltage to the corresponding conductive traces of PCB via the corresponding pins. The conductive traces corresponding to the second driving units are separated by the conductive traces corresponding to the first driving units on the PCB.

公开(公告)号：US20170124246A1

公开(公告)日：2017-05-04

申请号：US15316026

申请日：2014-07-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Melvin K. Benedict ,  Brian T. Purcell ,  Robert Allen Voss ,  Scott M. Kogut

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5072 ,  H05K3/0005 ,  H05K2201/09972

Abstract: A method is described in which a functional region on a printed circuit board (PCB) is defined, a regional circuit design to be inserted into the functional region on the PCB is selected, and the regional circuit design is pasted into the functional region.