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公开(公告)号：US08409980B2
公开(公告)日：2013-04-02
申请号：US13347087
申请日：2012-01-10
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Marie-Claude Paquet , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Marie-Claude Paquet , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L21/44
CPC分类号： H01L21/56 , H01L21/563 , H01L23/49816 , H01L24/743 , H01L24/97 , H01L29/0657 , H01L2224/73203 , H01L2224/73204 , H01L2224/97 , H01L2924/14 , H01L2924/15311 , H01L2224/83 , H01L2224/81 , H01L2924/00
摘要： Underfill flow guide structures and methods of using the same are provided with a module. The method includes mounting bumps on a substrate. The method also includes forming underfill flow guide structures on the substrate by patterning wires with an overlay of hard substance. The underfill flow guide structures are integrated with the substrate and formed between adjacent bumps. The underfill flow guide structures are further formed to uniformly guide underfill along the substrate during capillary underfill processing.
摘要翻译： 底部填充流动引导结构及其使用方法具有模块。 该方法包括在基板上安装凸块。 该方法还包括通过用硬质材料的覆盖图案化线来在基底上形成底部填充流动引导结构。 底部填充流动引导结构与基板集成并形成在相邻的凸块之间。 底部填充流动引导结构进一步形成为在毛细管底部填充处理期间沿着基底均匀地引导底部填充物。
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22.发明授权Undercut-repair of barrier layer metallurgy for solder bumps and methods thereof 有权用于焊料凸块的阻挡层冶金的底切修复及其方法公开(公告)号：US08298930B2
公开(公告)日：2012-10-30
申请号：US12959697
申请日：2010-12-03
申请人： Charles L. Arvin , Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter
发明人： Charles L. Arvin , Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter
IPC分类号： H01L23/488
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/02126 , H01L2224/0361 , H01L2224/0382 , H01L2224/03912 , H01L2224/10126 , H01L2224/1147 , H01L2224/1182 , H01L2224/11912 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01074 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A method of making a semiconductor structure includes patterning a barrier layer metallurgy (BLM) which forms an undercut beneath a solder material, and forming a repair material in the undercut and on the solder material. The method also includes removing the repair material from the solder material, and reflowing the solder material.
摘要翻译： 制造半导体结构的方法包括图案化在焊料材料下形成底切的阻挡层冶金（BLM），以及在底切和焊料材料上形成修复材料。 该方法还包括从焊料材料中去除修复材料，以及回流焊料。
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公开(公告)号：US20120220117A1
公开(公告)日：2012-08-30
申请号：US13463855
申请日：2012-05-04
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sulliwan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sulliwan
IPC分类号： H01L21/283
CPC分类号： H01L23/49816 , H01L23/49811 , H01L24/11 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/0401 , H01L2224/0603 , H01L2224/06505 , H01L2224/11822 , H01L2224/13082 , H01L2224/131 , H01L2224/1319 , H01L2224/1329 , H01L2224/133 , H01L2224/14 , H01L2224/1403 , H01L2224/14505 , H01L2224/16 , H01L2224/17051 , H01L2224/81136 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2224/83191 , H01L2224/83194 , H01L2224/838 , H01L2924/00013 , H01L2924/01013 , H01L2924/01022 , H01L2924/01033 , H01L2924/01074 , H01L2924/01076 , H01L2924/01082 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H05K3/303 , H05K3/3436 , H05K2201/0379 , H05K2201/10674 , H05K2201/2036 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2924/3512 , H01L2924/00
摘要： A method of connecting chips to chip carriers, ceramic packages, etc. (package substrates) forms smaller than usual first solder balls and polymer pillars on the surface of a semiconductor chip and applies adhesive to the distal ends of the polymer pillars. The method also forms second solder balls, which are similar in size to the first solder balls, on the corresponding surface of the package substrate to which the chip will be attached. Then, the method positions the surface of the semiconductor chip next to the corresponding surface of the package substrate. The adhesive bonds the distal ends of the polymer pillars to the corresponding surface of the package substrate. The method heats the first solder balls and the second solder balls to join the first solder balls and the second solder balls into solder pillars.
摘要翻译： 将芯片与芯片载体，陶瓷封装等（封装基板）连接的方法比半导体芯片表面上的通常的第一焊球和聚合物柱形成更小，并且将粘合剂施加到聚合物柱的远端。 该方法还形成与芯片将附接到的封装衬底的相应表面上尺寸相似的第二焊球。 然后，该方法将半导体芯片的表面定位在封装衬底的相应表面的旁边。 粘合剂将聚合物柱的末端粘合到包装基底的相应表面上。 该方法加热第一焊球和第二焊球以将第一焊球和第二焊球接合成焊料柱。
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公开(公告)号：US20120119362A1
公开(公告)日：2012-05-17
申请号：US12948092
申请日：2010-11-17
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/11 , H01L24/05 , H01L24/06 , H01L24/13 , H01L2224/0401 , H01L2224/05556 , H01L2224/061 , H01L2224/0613 , H01L2224/13006 , H01L2224/13111 , H01L2224/13116 , H01L2924/0001 , H01L2924/01005 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2224/13099 , H01L2924/00 , H01L2924/00012
摘要： A structure and a method of manufacturing a Pb-free Controlled Collapse Chip Connection (C4) with a Ball Limiting Metallurgy (BLM) structure for semiconductor chip packaging that reduce chip-level cracking during the Back End of Line (BEOL) processes of chip-join cool-down. An edge of the BLM structure that is subject to tensile stress during chip-join cool down is protected from undercut of a metal seed layer, caused by wet etch of the chip to remove metal layers from the chip's surface and solder reflow, by an electroplated barrier layer, which covers a corresponding edge of the metal seed layer.
摘要翻译： 用于半导体芯片封装的具有球限制冶金（BLM）结构的无铅控制崩溃芯片连接（C4）的结构和方法，其在芯片级后端（BEOL）工艺中减少芯片级开裂， 加入冷却。 在芯片连接冷却期间受到拉伸应力的BLM结构的边缘被保护以防止金属种子层的底切，由芯片的湿法蚀刻引起，以通过电镀从芯片的表面和焊料回流中去除金属层 阻挡层，其覆盖金属种子层的相应边缘。
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公开(公告)号：US08164188B2
公开(公告)日：2012-04-24
申请号：US12624065
申请日：2009-11-23
IPC分类号： H01L21/02 , H01L21/60 , H01L23/48 , H01L23/485
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/03462 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05027 , H01L2224/05073 , H01L2224/05166 , H01L2224/05184 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/11334 , H01L2224/1147 , H01L2224/11849 , H01L2224/11912 , H01L2224/13006 , H01L2224/131 , H01L2924/00013 , H01L2924/0002 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04953 , H01L2924/05042 , H01L2924/181 , H01L2924/00014 , H01L2224/13099 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00
摘要： A method comprises depositing a first metal containing layer into a trench structure, which contacts a metalized area of a semiconductor structure. The method further includes patterning at least one opening in a resist to the first metal containing layer. The opening should be in alignment with the trench structure. At least a pad metal containing layer is formed within the at least one opening (preferably by electroplating processes). The resist and the first metal layer underlying the resist are then etched (with the second metal layer acting as a mask, in embodiments). The method includes flowing solder material within the trench and on pad metal containing layer after the etching process. The structure is a controlled collapse chip connection (C4) structure comprising at least one electroplated metal layer formed in a resist pattern to form at least one ball limiting metallurgical layer. The structure further includes an underlying metal layer devoid of undercuts.
摘要翻译： 一种方法包括将第一含金属层沉积到与半导体结构的金属化区域接触的沟槽结构中。 该方法还包括将抗蚀剂中的至少一个开口图案化为第一含金属层。 开口应与沟槽结构对齐。 在至少一个开口内（优选通过电镀工艺）形成至少一垫层金属层。 然后蚀刻抗蚀剂和抗蚀剂下面的第一金属层（在实施例中第二金属层用作掩模）。 该方法包括在蚀刻工艺之后使沟槽内的焊料材料和含焊垫金属的层流动。 该结构是受控的崩溃芯片连接（C4）结构，包括至少一个以抗蚀剂图案形成的电镀金属层，以形成至少一个球限制冶金层。 该结构还包括没有底切的底层金属层。
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26.发明申请INTEGRATED CIRCUIT CHIP WITH PYRAMID OR CONE-SHAPED CONDUCTIVE PADS FOR FLEXIBLE C4 CONNECTIONS AND A METHOD OF FORMING THE INTEGRATED CIRCUIT CHIP 失效用于柔性C4连接的PYRAMID或CONE型导电垫片的集成电路芯片和形成集成电路芯片的方法公开(公告)号：US20110140271A1
公开(公告)日：2011-06-16
申请号：US12634741
申请日：2009-12-10
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/11 , H01L23/49816 , H01L24/13 , H01L24/81 , H01L2224/1147 , H01L2224/11901 , H01L2224/11902 , H01L2224/13018 , H01L2224/13019 , H01L2224/13023 , H01L2224/13076 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/13613 , H01L2224/13618 , H01L2224/1362 , H01L2224/13639 , H01L2224/13647 , H01L2224/1601 , H01L2224/16237 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2924/00013 , H01L2924/01005 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/01028 , H01L2224/13099 , H01L2924/00012
摘要： Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface of the chip, a vertex opposite the base and, optionally, mushroom-shaped cap atop the vertex. Each pad can include a single layer of conductive material or multiple layers of conductive material (e.g., a wetting layer stacked above a non-wetting layer). The pads can be left exposed to allow for subsequent connection to corresponding solder bumps on a chip carrier or a second chip. Alternatively, solder balls can be positioned on the conductive pads to allow for subsequent connection to corresponding solder-paste filled openings on a chip carrier or a second chip.
摘要翻译： 公开了一种用改进的导电焊盘形成芯片的芯片和方法，其允许与芯片载体或另一个集成电路芯片的柔性C4连接。 垫具有三维几何形状（例如，金字塔或锥形），其具有与芯片表面相邻的基部，与基部相对的顶点以及可选地在顶点顶部的蘑菇形帽。 每个焊盘可以包括单层导电材料或多层导电材料（例如，堆叠在非润湿层上方的润湿层）。 焊盘可以被暴露以允许随后连接到芯片载体或第二芯片上的相应焊料凸块。 或者，焊球可以定位在导电焊盘上，以允许随后连接到芯片载体或第二芯片上相应的焊膏填充的开口。
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公开(公告)号：US20110133307A1
公开(公告)日：2011-06-09
申请号：US13028332
申请日：2011-02-16
IPC分类号： H01L23/62
CPC分类号： H01L23/5258 , H01L23/5254 , H01L23/5256 , H01L23/562 , H01L2924/0002 , H01L2924/00
摘要： A conductor-filled damage propagation barrier is formed extending into a low-k dielectric layer between a fuse and an adjacent circuit element for preventing propagation of damage during a fuse blow operation. Conductor material filling the damage propagation barrier is formed from the same conductor layer as that used to form an interconnect structure.
摘要翻译： 导体填充的损伤传播屏障形成为延伸到保险丝和相邻电路元件之间的低k电介质层，以防止在保险丝熔断操作期间传播损坏。 填充损伤传播屏障的导体材料由与用于形成互连结构的导体层相同的导体层形成。
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28.发明授权Structures and methods for improving solder bump connections in semiconductor devices 有权用于改善半导体器件中焊料凸点连接的结构和方法公开(公告)号：US07871919B2
公开(公告)日：2011-01-18
申请号：US12344802
申请日：2008-12-29
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L21/00
CPC分类号： H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/02125 , H01L2224/0401 , H01L2224/05017 , H01L2224/05556 , H01L2224/0558 , H01L2224/05644 , H01L2224/114 , H01L2224/116 , H01L2224/13109 , H01L2224/13111 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2224/13099 , H01L2924/00012 , H01L2924/00014
摘要： Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The method includes forming a plurality of trenches in a dielectric layer extending to an underlying metal layer. The method further includes depositing metal in the plurality of trenches to form discrete metal line islands in contact with the underlying metal layer. The method also includes forming a solder bump in electrical connection to the plurality of metal line islands.
摘要翻译： 具有改善的焊料凸点连接的结构和制造这种结构的方法在本文中提供。 该方法包括在延伸到下面的金属层的电介质层中形成多个沟槽。 该方法还包括在多个沟槽中沉积金属以形成与下面的金属层接触的离散金属线岛。 该方法还包括形成与多个金属线岛电连接的焊料凸块。
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公开(公告)号：US07614147B2
公开(公告)日：2009-11-10
申请号：US12138531
申请日：2008-06-13
IPC分类号： H01K3/10
CPC分类号： H01L23/544 , H01L22/24 , H01L22/32 , H01L22/34 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/48 , H01L2223/5448 , H01L2224/02166 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05181 , H01L2224/05624 , H01L2224/05666 , H01L2224/05681 , H01L2224/13099 , H01L2224/48463 , H01L2224/85399 , H01L2924/00014 , H01L2924/01013 , H01L2924/01022 , H01L2924/01033 , H01L2924/01073 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204 , Y10T29/49227 , H01L2224/45099
摘要： An integrated circuit has a wiring layer below an insulator layer. A pad comprises a conductive material that is on the insulator layer. The pad has a wirebond connection region and a probe pad region. An inspection mark is between the wirebond connection region and the probe pad region. The inspection mark comprises an opening in the insulator layer that is filled with the conductive material. In addition, a contact that is through the insulator layer is adapted to electrically connect the conductor wire in the wiring layer to the pad. The contact is formed of the same conductive material used for the pad and the inspection mark.
摘要翻译： 集成电路在绝缘体层下方具有布线层。 衬垫包括位于绝缘体层上的导电材料。 焊盘具有引线连接区域和探针焊盘区域。 导线连接区域和探针焊盘区域之间的检查标记。 检查标记包括填充有导电材料的绝缘体层中的开口。 此外，穿过绝缘体层的接触件适于将布线层中的导线电连接到焊盘。 接触由用于垫和检查标记的相同的导电材料形成。
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30.发明申请PAD CUSHION STRUCTURE AND METHOD OF FABRICATION FOR Pb-FREE C4 INTEGRATED CIRCUIT CHIP JOINING 有权无铅C4集成电路芯片加工的垫片结构及其制造方法公开(公告)号：US20090273081A1
公开(公告)日：2009-11-05
申请号：US12113230
申请日：2008-05-01
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/02125 , H01L2224/0231 , H01L2224/0236 , H01L2224/024 , H01L2224/0401 , H01L2224/04042 , H01L2224/05569 , H01L2224/05624 , H01L2224/05647 , H01L2224/13022 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2224/45124 , H01L2224/48724 , H01L2224/48747 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01076 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： A controlled collapse chip connection (C4) method and integrated circuit structure for lead (Pb)-free solder balls with stress relief to the underlying insulating layers of the integrated circuit chip by deposing soft thick insulating cushions beneath the solder balls and connecting the metallization of the integrated circuit out-of-contact of the cushions but within the pitch of the solder balls.
摘要翻译： 一种控制崩溃芯片连接（C4）方法和用于无铅焊料球的集成电路结构，通过在焊球下方放置软厚的绝缘垫，并将焊料球的金属化 衬垫的集成电路不接触，但在焊球的间距内。
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