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    Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer
    34.
    发明授权
    Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer 有权

    公开(公告)号：US10163815B2

    公开(公告)日：2018-12-25

    申请号：US14090036

    申请日：2013-11-26

    Applicant: STATS ChipPAC, Ltd.

    Inventor： Yaojian Lin ,  Xia Feng ,  Kang Chen ,  Jianmin Fang

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/58

    Abstract: A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. A contact pad is formed over an active surface of the semiconductor die. A protective pattern is formed over the active surface of the semiconductor die between the contact pad and saw street of the semiconductor die. The protective pattern includes a segmented metal layer or plurality of parallel segmented metal layers. An insulating layer is formed over the active surface, contact pad, and protective pattern. A portion of the insulating layer is removed to expose the contact pad. The protective pattern reduces erosion of the insulating layer between the contact pad and saw street of the semiconductor die. The protective pattern can be angled at corners of the semiconductor die or follow a contour of the contact pad. The protective pattern can be formed at corners of the semiconductor die.

    Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP
    35.
    发明授权
    Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP 有权

    公开(公告)号：US10141222B2

    公开(公告)日：2018-11-27

    申请号：US14566870

    申请日：2014-12-11

    Applicant: STATS ChipPAC, Ltd.

    Inventor： Yaojian Lin ,  Pandi C. Marimuthu

    IPC: H01L21/768 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H05K1/18

    Abstract: A semiconductor device has a semiconductor die mounted over the carrier. An encapsulant is deposited over the carrier and semiconductor die. The carrier is removed. A first interconnect structure is formed over the encapsulant and a first surface of the die. A second interconnect structure is formed over the encapsulant and a second surface of the die. A first protective layer is formed over the first interconnect structure and second protective layer is formed over the second interconnect structure prior to forming the vias. A plurality of vias is formed through the second interconnect structure, encapsulant, and first interconnect structure. A first conductive layer is formed in the vias to electrically connect the first interconnect structure and second interconnect structure. An insulating layer is formed over the first interconnect structure and second interconnect structure and into the vias. A discrete semiconductor component can be mounted to the first interconnect structure.

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