公开(公告)号：US07732236B2

公开(公告)日：2010-06-08

申请号：US10598934

申请日：2005-05-13

申请人： Seiji Nakahata ,  Hideaki Nakahata ,  Koji Uematsu ,  Makoto Kiyama ,  Youichi Nagai ,  Takao Nakamura

发明人： Seiji Nakahata ,  Hideaki Nakahata ,  Koji Uematsu ,  Makoto Kiyama ,  Youichi Nagai ,  Takao Nakamura

IPC分类号： H01L21/0012

CPC分类号： H01L33/007 ,  H01L21/02389 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02645 ,  H01L33/0075 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12032 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention provides Group III nitride semiconductor crystals of a size appropriate for semiconductor devices and methods for manufacturing the same, Group III nitride semiconductor devices and methods for manufacturing the same, and light-emitting appliances. A method of manufacturing a Group III nitride semiconductor crystal includes a process of growing at least one Group III nitride semiconductor crystal substrate on a starting substrate, a process of growing at least one Group III nitride semiconductor crystal layer on the Group III nitride semiconductor crystal substrate, and a process of separating a Group III nitride semiconductor crystal, constituted by the Group III nitride semiconductor crystal substrate and the Group III nitride semiconductor crystal layer, from the starting substrate, and is characterized in that the Group III nitride semiconductor crystal is 10 μm or more but 600 μm or less in thickness, and is 0.2 mm or more but 50 mm or less in width.

摘要翻译： 本发明提供适合于半导体器件的尺寸的III族氮化物半导体晶体及其制造方法，III族氮化物半导体器件及其制造方法以及发光器具。 制造III族氮化物半导体晶体的方法包括在起始衬底上生长至少一种III族氮化物半导体晶体衬底的工艺，在III族氮化物半导体晶体衬底上生长至少一种III族氮化物半导体晶体层的工艺 以及从起始基板分离由III族氮化物半导体晶体基板和III族氮化物半导体晶体层构成的III族氮化物半导体晶体的工序，其特征在于，所述III族氮化物半导体晶体为10μm 以上且600μm以下，宽度为0.2mm以上且50mm以下。

公开(公告)号：US20050118736A1

公开(公告)日：2005-06-02

申请号：US10484001

申请日：2003-01-23

申请人： Katsushi Akita ,  Masashi Yamashita ,  Makoto Kiyama

发明人： Katsushi Akita ,  Masashi Yamashita ,  Makoto Kiyama

IPC分类号： G01R31/26 ,  H01L21/66 ,  H01L23/544 ,  H01L29/745 ,  H01L29/76

CPC分类号： H01L22/14 ,  H01L22/34

摘要： A measurement-facilitating method of measuring the breakdown voltage of a semiconductor epitaxial wafer, and a semiconductor epitaxial wafer whose breakdown voltage is superior are realized. In a method of measuring the breakdown voltage of a semiconductor epitaxial wafer having to do with the present invention, the breakdown voltage between contacts 12, 12 is measured only through the Schottky contacts, without need for ohmic contacts. Inasmuch as the manufacturing process of forming ohmic contacts is accordingly omitted, the semiconductor epitaxial wafer 10 may be readily used in a breakdown-voltage measurement test. The measurement of the wafer 10 breakdown voltage thus may be readily carried out. Likewise, because the inter-contact breakdown voltage V2 of a wafer 10 can be measured prior to manufacturing a working device from it, unsuitable wafers 10 can be excluded before they are cycled through the working-device fabrication process. Reduction in losses can accordingly be counted upon, in contrast to conventional measuring methods, by which inter-contact breakdown voltage V2 is measured following fabrication of the working devices.

摘要翻译： 实现了测量半导体外延晶片的击穿电压的测量方法和击穿电压优良的半导体外延晶片。 在测量与本发明有关的半导体外延晶片的击穿电压的方法中，仅通过肖特基触点测量触点12,12之间的击穿电压，而不需要欧姆接触。 因此省略了形成欧姆接触的制造工艺，因此半导体外延晶片10可以容易地用于击穿电压测量测试。 因此，可以容易地进行晶片10的击穿电压的测量。 同样，由于可以在从其制造工作装置之前测量晶片10的接触间击穿电压V 2 2，所以不适合的晶片10可以在它们循环通过工作装置制造之前被排除 处理。 因此，与传统的测量方法相比，可以减少损耗，通过这些测量方法，在工作装置制造之后测量接触间击穿电压V 2 2。

公开(公告)号：US08941174B2

公开(公告)日：2015-01-27

申请号：US13885131

申请日：2011-10-17

申请人： Masaya Okada ,  Makoto Kiyama ,  Yu Saitoh ,  Seiji Yaegashi ,  Mitsunori Yokoyama ,  Kazutaka Inoue

发明人： Masaya Okada ,  Makoto Kiyama ,  Yu Saitoh ,  Seiji Yaegashi ,  Mitsunori Yokoyama ,  Kazutaka Inoue

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L29/423

CPC分类号： H01L29/7813 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66462 ,  H01L29/66734 ,  H01L29/7788 ,  H01L29/7789 ,  H01L29/78

摘要： It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. A GaN-based stacked layer 15 includes n−-type GaN drift layer 4/p-type GaN barrier layer 6/n+-type GaN contact layer 7. An opening 28 extends from a top layer and reaches the n−-type GaN drift layer 4. The semiconductor device includes a regrown layer 27 located so as to cover a wall surface and a bottom portion of the opening, the regrown layer 27 including an electron drift layer 22 and an electron source layer 26, a source electrode S located around the opening, a gate electrode G located on the regrown layer in the opening, and a bottom insulating layer 37 located in the bottom portion of the opening.

摘要翻译： 本发明的目的是提高具有开口的垂直半导体器件的击穿电压特性，并且在开口中包括由二维电子气形成的沟道。 GaN基叠层15包括n型GaN漂移层4 / p型GaN势垒层6 / n +型GaN接触层7.开口28从顶层延伸并到达n型GaN漂移 该半导体器件包括重新生长层27，其被覆盖以覆盖开口的壁表面和底部，再生长层27包括电子漂移层22和电子源层26，源电极S位于 开口，位于开口中的再生长层上的栅极电极G和位于开口底部的底部绝缘层37。

公开(公告)号：US08896058B2

公开(公告)日：2014-11-25

申请号：US13884229

申请日：2011-10-05

申请人： Masaya Okada ,  Makoto Kiyama ,  Yu Saitoh ,  Seiji Yaegashi ,  Mitsunori Yokoyama ,  Kazutaka Inoue

发明人： Masaya Okada ,  Makoto Kiyama ,  Yu Saitoh ,  Seiji Yaegashi ,  Mitsunori Yokoyama ,  Kazutaka Inoue

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L29/417 ,  H01L29/20

CPC分类号： H01L29/7827 ,  H01L29/2003 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/66666 ,  H01L29/7788 ,  H01L29/7789

摘要： It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. The vertical semiconductor device includes a GaN-based stacked layer 15 having an opening 28 and the GaN-based stacked layer 15 includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. The vertical semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, and a gate electrode G located on the regrown layer. The gate electrode G covers a portion having a length corresponding to the thickness of the p-type GaN-based barrier layer and is terminated at a position on the wall surface, the position being away from the bottom portion of the opening.

摘要翻译： 本发明的目的是提高具有开口的垂直半导体器件的击穿电压特性，并且在开口中包括由二维电子气形成的沟道。 垂直半导体器件包括具有开口28的GaN基叠层15，GaN基叠层15包括n型GaN基漂移层4 / p型GaN基阻挡层6 / n型GaN- 垂直半导体器件包括覆盖开口的再生长层27，包含电子漂移层22和电子供给层26的再生长层27，源电极S和位于 在再生长层上。 栅电极G覆盖长度对应于p型GaN基阻挡层的厚度的部分，并且终止在壁表面上的位置，该位置远离开口的底部。

公开(公告)号：US20120181548A1

公开(公告)日：2012-07-19

申请号：US13498767

申请日：2010-06-24

申请人： Masaya Okada ,  Makoto Kiyama

发明人： Masaya Okada ,  Makoto Kiyama

IPC分类号： H01L29/778 ,  H01L21/20

CPC分类号： H01L29/7786 ,  H01L29/0891 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7788 ,  H01L29/7789

摘要： There are provided a high current semiconductor device that has low on-resistance, high mobility, and good pinch-off characteristics and in which a kink phenomenon is not easily caused even if a drain voltage is increased, and a method for producing the semiconductor device. The semiconductor device of the present invention includes a GaN-based layered body 15 having an opening 28, a regrown layer 27 including a channel, a gate electrode G, a source electrode S, and a drain electrode D. The regrown layer 27 includes an electron transit layer 22 and an electron supply layer 26. The GaN-based layered body includes a p-type GaN layer 6 whose end surface is covered by the regrown layer in the opening, and a p-side electrode 11 that is in ohmic contact with the p-type GaN layer is disposed.

摘要翻译： 提供了具有低导通电阻，高迁移率和良好的夹断特性的高电流半导体器件，并且即使漏极电压增加也不容易引起扭结现象，并且制造半导体器件的方法 。 本发明的半导体器件包括具有开口28的GaN基层叠体15，包括沟道的再生长层27，栅电极G，源电极S和漏电极D.再生层27包括： 电子转移层22和电子供给层26.该GaN基层叠体包括端面被开口部中的再生长层覆盖的p型GaN层6和与欧姆接触的p侧电极11 配置p型GaN层。

公开(公告)号：US20120037918A1

公开(公告)日：2012-02-16

申请号：US13266420

申请日：2009-12-25

申请人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

发明人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/20 ,  H01L21/28575 ,  H01L21/28581 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/452 ,  H01L29/475 ,  H01L29/4958 ,  H01L29/7813 ,  H01L29/872 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05026 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/2076

摘要： A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.

摘要翻译： 半导体器件包括含有GaN和电极的半导体层（1）。 所述电极包括电极主体（6），包含Al并形成在比所述电极主体（6）更远离所述半导体层（1）的位置处的连接用电极（8）和阻挡层（7） 形成在电极主体（6）和连接用电极（8）之间，阻挡层（7）含有选自W，TiW，WN，TiN，Ta和TaN中的至少一种。 阻挡层（7）的表面粗糙度RMS为3.0nm以下。

公开(公告)号：US20110198693A1

公开(公告)日：2011-08-18

申请号：US13124934

申请日：2009-10-20

申请人： Hiromu Shiomi ,  Kazuhide Sumiyoshu ,  Yu Saitoh ,  Makoto Kiyama

发明人： Hiromu Shiomi ,  Kazuhide Sumiyoshu ,  Yu Saitoh ,  Makoto Kiyama

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L21/205

CPC分类号： H01L29/7802 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0254 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/32 ,  H01L29/41741 ,  H01L29/4238 ,  H01L29/475 ,  H01L29/66712 ,  H01L29/861 ,  H01L29/872

摘要： Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm−3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle θ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle θ. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.

摘要翻译： 提供具有能够减少漏电流的结构的III族氮化物半导体电子器件。 层压体11包括基板13和III族氮化物半导体外延膜15.基板13由载流子浓度大于1×1018cm-3的III族氮化物半导体构成。 外延结构15包括III族氮化物半导体外延膜17.衬底13的第一面13a以角度倾斜; 相对于沿c轴方向延伸的轴线Cx大于5度。 法向量VN和c轴向量VC使得角度和角度。 III族氮化物半导体外延膜17包括沿着与第一面13a的法线方向依次排列的第一，第二和第三区域17a，17b和17c。 第三区域17c的位错密度小于第一区域17a的位错密度。 第二区域17b的位错密度小于基板13的位错密度。

公开(公告)号：US20080315209A1

公开(公告)日：2008-12-25

申请号：US11571990

申请日：2006-01-20

申请人： Kouhei Miura ,  Makoto Kiyama ,  Takashi Sakurada

发明人： Kouhei Miura ,  Makoto Kiyama ,  Takashi Sakurada

IPC分类号： H01L29/20

CPC分类号： H01L29/872 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/475

摘要： Affords a Group III nitride semiconductor device having a structure that can improve the breakdown voltage. A Schottky diode (11) consists of a Group III nitride support substrate (13), a gallium nitride region (15), and a Schottky electrode (17). The Group III nitride support substrate (13) has electrical conductivity. The Schottky electrode (17) forms a Schottky junction on the gallium nitride region (15). The gallium nitride region (15) is fabricated on a principal face (13a) of the Group III nitride support substrate (13). The gallium nitride region (15) has a (10 12)-plane XRD full-width-at-half-maximum of 100 sec or less.

摘要翻译： 提供具有能够提高击穿电压的结构的III族氮化物半导体器件。 肖特基二极管（11）由III族氮化物支撑衬底（13），氮化镓区域（15）和肖特基电极（17）组成。 III族氮化物支撑衬底（13）具有导电性。 肖特基电极（17）在氮化镓区域（15）上形成肖特基结。 氮化镓区域（15）制造在III族氮化物支撑衬底（13）的主面（13a）上。 氮化镓区域（15）具有100秒或更短的（10°=“12”）平面XRD全宽度半最大值。

公开(公告)号：US20050121688A1

公开(公告)日：2005-06-09

申请号：US11001414

申请日：2004-12-02

申请人： Youichi Nagai ,  Makoto Kiyama ,  Takao Nakamura ,  Takashi Sakurada ,  Katsushi Akita ,  Koji Uematsu ,  Ayako Ikeda ,  Koji Katayama ,  Susumu Yoshimoto

发明人： Youichi Nagai ,  Makoto Kiyama ,  Takao Nakamura ,  Takashi Sakurada ,  Katsushi Akita ,  Koji Uematsu ,  Ayako Ikeda ,  Koji Katayama ,  Susumu Yoshimoto

IPC分类号： H01L33/12 ,  H01L33/32 ,  H01L33/42 ,  H01L33/50 ,  H01L33/56 ,  H01L33/60 ,  H01L33/62 ,  H01L33/00

CPC分类号： H01L33/02 ,  H01L33/0075 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/38 ,  H01L33/58 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00014

摘要： A light emitting device includes a nitride semiconductor substrate with a resistivity of 0.5 Ω·cm or less, an n-type nitride semiconductor layer and a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at a first main surface side of the nitride semiconductor substrate, and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, wherein one of the nitride semiconductor substrate and the p-type nitride semiconductor layer is mounted at the top side which emits light and the other is placed at the down side, and a single electrode is placed at the top side. Therefore, there is provided a light emitting device which has a simple configuration thereby making it easy to fabricate, can provide a high light emission efficiency for a long time period, and can be easily miniaturized.

摘要翻译： 发光器件包括电阻率为0.5Ω·cm以下的氮化物半导体衬底，与氮化物半导体衬底相比，n型氮化物半导体层和p型氮化物半导体层比n型氮化物半导体 在氮化物半导体衬底的第一主表面侧的层和位于n型氮化物半导体层和p型氮化物半导体层之间的发光层，其中氮化物半导体衬底和p型氮化物半导体之一 层安装在发光的顶侧，而另一个放置在下侧，并且在顶侧放置单个电极。 因此，提供了一种发光装置，其具有简单的结构，从而易于制造，可以长时间提供高的发光效率，并且可以容易地小型化。

公开(公告)号：US06235543B1

公开(公告)日：2001-05-22

申请号：US09397383

申请日：1999-09-16

申请人： Makoto Kiyama

发明人： Makoto Kiyama

IPC分类号： H01L2100

CPC分类号： H01L22/20 ,  H01L21/324 ,  H01L22/12

摘要： In a method of evaluating a semiconductor wafer to provide an index as to whether slip generation is likely or not, the in-plane temperature distribution of the wafer is varied at a prescribed temperature and the condition of the temperature distribution at which slip line generation occurs is detected. The temperature distribution is varied using plural concentric heaters and is measured using a radiation thermometer. The temperature distribution is correlated to thermal stress in the wafer. In this manner, a range of tolerable thermal stress is specified, at which a slip line will not be generated. Dependent on the applied temperature distribution and the determination of whether a slip line has been generated in connection with that temperature distribution, it is determined whether the periphery of the wafer has a tangential residual stress that is compressive or tensile. This is achieved by varying the temperature distribution to first have a higher temperature at the center of the wafer and then have a higher temperature at the periphery of the wafer, while observing the resulting slip line generation states.

摘要翻译： 在评估半导体晶片以提供滑移生成是否可能的指标的方法中，晶片的面内温度分布在规定温度下变化，并且发生滑移线生成的温度分布的条件 被检测到。 使用多个同心加热器来改变温度分布，并使用辐射温度计测量温度分布。 温度分布与晶片中的热应力相关。 以这种方式，规定了不会产生滑移线的可耐受热应力的范围。 根据应用的温度分布和确定是否与该温度分布相关联地生成滑移线，确定晶片的周边是否具有压缩或拉伸的切向残余应力。 这通过改变温度分布来实现，首先在晶片的中心处具有较高的温度，然后在晶片的周边具有更高的温度，同时观察所得到的滑移线生成状态。