公开(公告)号：US11769746B2

公开(公告)日：2023-09-26

申请号：US17189405

申请日：2021-03-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Ae-Nee Jang ,  KyungSeon Hwang ,  SunWon Kang

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/48

CPC分类号： H01L24/14 ,  H01L21/563 ,  H01L23/481 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/73 ,  H01L24/03 ,  H01L24/06 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/0557 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10125 ,  H01L2224/1147 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/14104 ,  H01L2224/14515 ,  H01L2224/14517 ,  H01L2224/26145 ,  H01L2224/73104 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/11849 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2224/131 ,  H01L2924/014

摘要： A semiconductor package includes a substrate, through-electrodes penetrating the substrate, first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate and electrically connected to the through-electrodes, respectively, and at least one second bump disposed between the first bumps and electrically insulated from the through-electrodes. The first bumps and the at least one second bump constitute one row in the first direction. A level of a bottom surface of the at least one second bump from the top surface of the substrate is a substantially same as levels of bottom surfaces of the first bumps from the top surface of the substrate.

公开(公告)号：US20230299123A1

公开(公告)日：2023-09-21

申请号：US17698939

申请日：2022-03-18

申请人： Intel Corporation

发明人： Qiang Yu ,  Gwang-Soo Kim ,  Said Rami

IPC分类号： H01L49/02 ,  H01L23/00 ,  H01L23/522 ,  H01L25/065

CPC分类号： H01L28/10 ,  H01L24/08 ,  H01L23/5227 ,  H01L24/06 ,  H01L25/0657 ,  H01L2224/08145 ,  H01L2224/08121 ,  H01L2224/06051 ,  H01L2224/0603 ,  H01L2224/0615 ,  H01L2224/0613 ,  H01L25/0652

摘要： In one embodiment, an apparatus includes a first integrated circuit die with metal bonding pads that are co-planar with an external surface of the die and a second integrated circuit die with metal bonding pads that are co-planar with an external surface of the die. The first and second integrated circuit dies are coupled together such that their external surfaces are in contact and the metal pads of the first integrated circuit die are in direct contact with respective metal pads of the second integrated circuit die. The apparatus also includes an inductor formed at least partially by the metal pads of the first integrated circuit die and the metal pads of the second integrated circuit die.

公开(公告)号：US20230253412A1

公开(公告)日：2023-08-10

申请号：US17955813

申请日：2022-09-29

申请人： Samsung Display Co., LTD.

发明人： Jeong Su PARK ,  Jin Taek KIM ,  Hyun KIM ,  Sung Jin LEE ,  Jong Chan LEE ,  Woong Hee JEONG ,  Jung Eun HONG

IPC分类号： H01L27/12 ,  H01L25/16 ,  H01L33/38 ,  H01L23/00

CPC分类号： H01L27/124 ,  H01L25/167 ,  H01L27/1288 ,  H01L33/38 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L27/1248 ,  H01L2933/0016 ,  H01L2224/05022 ,  H01L2224/05018 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/0518 ,  H01L2224/05124 ,  H01L2224/05171 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05155 ,  H01L2224/05138 ,  H01L2924/0106 ,  H01L2224/05147 ,  H01L2224/05686 ,  H01L2924/0549 ,  H01L2224/05573 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/05566 ,  H01L2224/0362 ,  H01L2224/03019

摘要： A display device includes a substrate including a display area and a pad area; a first conductive layer including a first pad electrode in the pad area; and a second conductive layer the second conductive layer includes a second pad electrode on the first pad electrode in the pad area; the first pad electrode and the second pad electrode overlap in a first direction that is a thickness direction, and do not overlap in a second direction perpendicular to the first direction.

公开(公告)号：US11710682B2

公开(公告)日：2023-07-25

申请号：US17348973

申请日：2021-06-16

申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Hisato Michikoshi

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L23/49562 ,  H01L23/3107 ,  H01L24/06 ,  H01L24/48 ,  H01L25/07 ,  H01L25/18 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/13 ,  H01L2924/181

摘要： A semiconductor device includes: a first electrode terminal; a second electrode terminal; a semiconductor element having an electrode on one surface connected to one surface of the first electrode terminal; a wire that connects an electrode on the other surface of the semiconductor element and the second electrode terminal; and a resin portion formed of an insulator covering the semiconductor element, a part of the second electrode terminal, and the one surface of the first electrode terminal, wherein a chamfered portion is formed on at least one of end portions where the first electrode terminal and the second electrode terminal face each other.

公开(公告)号：US20230230945A1

公开(公告)日：2023-07-20

申请号：US17656104

申请日：2022-03-23

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： LING-YI CHUANG

IPC分类号： H01L23/00 ,  H01L25/10

CPC分类号： H01L24/08 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/16 ,  H01L24/80 ,  H01L25/105 ,  H01L2224/09505 ,  H01L2224/05688 ,  H01L24/13 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/06505 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/05541 ,  H01L2224/05557 ,  H01L2224/03614 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/08148 ,  H01L2224/80948 ,  H01L2224/80097 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1436 ,  H01L2924/1431 ,  H01L2225/1058

摘要： A package structure includes the following: a logic die; and a plurality of core dies sequentially stacked on the logic die along a vertical direction, in which the plurality of core dies include a first core die and a second core die interconnected through a hybrid bonding member; the hybrid bonding member includes: a first contact pad located on a surface of the first core die; and a second contact pad located on a surface of the second core die; the first contact pad is in contact bonding with the second contact pad.

公开(公告)号：US20230223750A1

公开(公告)日：2023-07-13

申请号：US18153726

申请日：2023-01-12

申请人： NEXPERIA B.V.

发明人： Hans-Martin Ritter ,  Steffen Holland ,  Markus Mergens

IPC分类号： H02H9/04 ,  H01L25/16 ,  H01L25/18 ,  H01L23/00 ,  H01L23/495

CPC分类号： H02H9/046 ,  H01L25/162 ,  H01L25/18 ,  H01L24/48 ,  H01L24/49 ,  H01L23/49575 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/49112 ,  H01L2224/0603 ,  H01L24/06 ,  H01L2924/13034

摘要： An electrostatic discharge (ESD), protection device is provided. In accordance with the present disclosure, an ESD protection device is provided that includes a series connection of a first unit having strong snapback and low series capacitance and a second high-voltage unit that displays a relatively high holding/trigger voltage to ensure latch up and improper triggering of the ESD protection device while at the same time providing high-voltage operation with low capacitive loading.

公开(公告)号：US11664364B2

公开(公告)日：2023-05-30

申请号：US17212620

申请日：2021-03-25

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Hsih-Yang Chiu

IPC分类号： H01L25/00 ,  H01L23/00 ,  H01L21/768 ,  H01L25/18 ,  H01L25/065

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/18 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L2224/0384 ,  H01L2224/03831 ,  H01L2224/05551 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2224/06517 ,  H01L2224/0801 ,  H01L2224/08146 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/32145 ,  H01L2224/8013 ,  H01L2224/8092 ,  H01L2224/80895 ,  H01L2224/80951 ,  H01L2224/8313 ,  H01L2224/83896 ,  H01L2224/9202 ,  H01L2224/9211 ,  H01L2225/06544

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, a through semiconductor via, and an insulation layer. The first semiconductor structure includes a first circuit layer and a first main bonding layer in the first circuit layer and substantially coplanar with a front face of the first circuit layer. The second semiconductor structure includes a second circuit layer on the first circuit layer and a second main bonding layer in the second circuit layer, and topologically aligned with and contacted to the first main bonding layer. The through semiconductor via is along the second semiconductor structure and the first and second main bonding layer, and extending to the first circuit layer. The insulation layer is positioned on a sidewall of the through semiconductor via.

公开(公告)号：US20230163085A1

公开(公告)日：2023-05-25

申请号：US17916858

申请日：2021-09-07

申请人： Sumitomo Electric Device Innovations, Inc.

发明人： Ayuhiko SAITOU

IPC分类号： H01L23/66 ,  H01L25/16 ,  H01L23/00

CPC分类号： H01L23/66 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L23/49838 ,  H01L2223/6611 ,  H01L2223/6661 ,  H01L2224/0603 ,  H01L2224/4903 ,  H01L2224/05644 ,  H01L2224/05686 ,  H01L2224/06155 ,  H01L2224/06181 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48101 ,  H01L2224/48157 ,  H01L2224/48195 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/0521 ,  H01L2924/10272 ,  H01L2924/13064 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/19105

摘要： A semiconductor device according to one embodiment includes: a semiconductor chip having a transistor and a drain pad provided on a board; a capacitor having an upper electrode and a lower electrode interposing a dielectric; a pad; and an empty pad provided on the board of the semiconductor chip. The semiconductor device further includes: a first wire connecting the pad and the drain pad of the semiconductor chip to each other; a second wire connecting the empty pad and the upper electrode of the capacitor to each other; and a third wire connecting the pad and the empty pad to each other.

公开(公告)号：US20230154877A1

公开(公告)日：2023-05-18

申请号：US17702812

申请日：2022-03-24

申请人： Industrial Technology Research Institute

发明人： Yu-Ming Peng ,  Chien-Chou Tseng ,  Chih-Chia Chang ,  Kuan-Chu Wu ,  Yu-Lin Hsu

IPC分类号： H01L23/00 ,  H01L33/62 ,  H01L23/13 ,  H01L21/66

CPC分类号： H01L24/06 ,  H01L33/62 ,  H01L24/05 ,  H01L23/13 ,  H01L24/08 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L22/20 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2924/0549 ,  H01L2224/0569 ,  H01L2224/05693 ,  H01L24/13 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13193 ,  H01L2224/0603 ,  H01L2224/08238 ,  H01L2224/16227 ,  H01L2224/80411 ,  H01L2224/80424 ,  H01L2224/80439 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80455 ,  H01L2224/80486 ,  H01L2224/8049 ,  H01L2224/80493 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L23/145

摘要： An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.

公开(公告)号：US11650465B2

公开(公告)日：2023-05-16

申请号：US17137283

申请日：2020-12-29

申请人： Samsung Display Co., Ltd.

发明人： Sujeong Kim ,  Hanho Park ,  Sangwon Yeo ,  Daegeun Lee ,  Joonsam Kim

IPC分类号： G02F1/1345 ,  H01L23/00 ,  H01L27/32 ,  H01L51/00 ,  H05K1/11 ,  G06F3/044

CPC分类号： G02F1/13458 ,  H01L24/06 ,  H01L27/323 ,  H01L27/3255 ,  H01L27/3276 ,  H01L51/0097 ,  G06F3/044 ,  H01L2224/0217 ,  H01L2224/0603 ,  H01L2224/0605 ,  H01L2224/06132 ,  H01L2251/5338 ,  H01L2924/12044 ,  H05K1/111 ,  H05K2201/09409 ,  H05K2201/10128

摘要： A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.