CIRCUIT BOARD ASSEMBLY
    52.
    发明申请
    CIRCUIT BOARD ASSEMBLY 审中-公开
    电路板总成

    公开(公告)号:US20100165185A1

    公开(公告)日:2010-07-01

    申请号:US12719942

    申请日:2010-03-09

    Applicant: FU-YEN TSENG

    Inventor: FU-YEN TSENG

    Abstract: A circuit board assembly includes a circuit board and at least one electrical element. The circuit board includes a dielectric substrate including a supporting surface, and at least one connecting part formed on the supporting surface. The at least one electrical element is electrically connected to the at least one connecting part via a connecting media. At least one air-exhaust hole extends through the connecting part and the dielectric substrate. The at least one air-exhaust hole is configured for exhausting air from the connecting media.

    Abstract translation: 电路板组件包括电路板和至少一个电气元件。 电路板包括包括支撑表面的电介质基底和形成在支撑表面上的至少一个连接部分。 所述至少一个电气元件经由连接介质电连接到所述至少一个连接部件。 至少一个排气孔延伸穿过连接部分和电介质基板。 至少一个排气孔构造成从连接介质排出空气。

    MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE
    54.
    发明申请
    MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE 有权
    多层印刷线路板,具有填充的结构

    公开(公告)号:US20100101852A1

    公开(公告)日:2010-04-29

    申请号:US12646517

    申请日:2009-12-23

    Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

    Abstract translation: 本发明提供了一种多层印刷线路板,其具有有利地用于在其上形成精细电路图案的填充通孔结构,并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层构成,层间绝缘树脂层各自形成有各自填充有镀层的孔,以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦,并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半,小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙,并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂,氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。

    Method of connecting printed circuit boards and corresponding arrangment
    55.
    发明申请
    Method of connecting printed circuit boards and corresponding arrangment 有权
    连接印刷电路板的方法和相应的布置

    公开(公告)号:US20100099276A1

    公开(公告)日:2010-04-22

    申请号:US12587978

    申请日:2009-10-15

    Abstract: Connecting a first (12) and a second (14) printed circuit board or PCB carrying a LED lighting source (10) and the associated drive circuitry involves providing board connection pads (12a, 14a) at said first (12) and second (14) PCBs, and arranging a flex PCB (16) in a bridge-like fashion between the first (12) and second (14) PCBs. The flex PCB (16) has connection pads (16a) for bonding with the board connection pads (12a, 14a) of the PCBs (12, 14). The connection pads (16a) in the flex PCB (16) arranged in a bridge-like fashion between the first (12) and second (14) PCBs are bonded with the connection pads (12a, 14a) of the first (12) and second (14) PCBs, so that the first (12) and second (14) PCBs are connected.

    Abstract translation: 连接携带LED照明源(10)的第一(12)和第二(14)印刷电路板或PCB以及相关联的驱动电路包括在所述第一(12)和第二(14)处提供板连接焊盘(12a,14a) )PCB,并且在第一(12)和第二(14)PCB之间布置以桥状形式的柔性PCB(16)。 柔性PCB(16)具有用于与PCB(12,14)的板连接焊盘(12a,14a)接合的连接焊盘(16a)。 在第一(12)和第二(14)PCB之间以桥状排列的柔性PCB(16)中的连接焊盘(16a)与第一(12)和第二(14)PCB的连接焊盘(12a,14a) 第二(14)个PCB,使得第一(12)和第二(14)个PCB连接。

    High-k thin film grain size control
    57.
    发明授权
    High-k thin film grain size control 有权
    高k薄膜晶粒尺寸控制

    公开(公告)号:US07629269B2

    公开(公告)日:2009-12-08

    申请号:US11096315

    申请日:2005-03-31

    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.

    Abstract translation: 一种方法,包括将包含一定量的陶瓷材料的纳米颗粒的胶体悬浮液沉积在基底上; 并对悬浮液进行热处理以形成薄膜。 一种方法,包括将陶瓷材料的多个纳米颗粒沉积在衬底的表面上的预定位置; 并对多个纳米颗粒进行热处理以形成薄膜。 一种包括计算设备的系统,包括微处理器,所述微处理器通过衬底耦合到印刷电路板,所述衬底包括形成在表面上的至少一个电容器结构,所述电容器结构包括第一电极,第二电极和陶瓷 设置在第一电极和第二电极之间的材料,其中陶瓷材料包括柱状晶粒。

    Differential trace profile for printed circult boards
    60.
    发明申请
    Differential trace profile for printed circult boards 有权
    打印回路板的微分曲线

    公开(公告)号:US20090107710A1

    公开(公告)日:2009-04-30

    申请号:US11977783

    申请日:2007-10-26

    Inventor: Joel R. Goergen

    Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.

    Abstract translation: 公开了电路板及其制造方法。 电路板使用形成为包括纵向通道的导体承载高速信号。 通道增加了导体的表面积,从而增强了导体承载高速信号的能力。 在至少一些实施例中,通道内的介电常数和通道之外的介质常数之间也存在不连续性,这被认为可减少信号损耗。

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