公开(公告)号：US20080003763A1

公开(公告)日：2008-01-03

申请号：US11853400

申请日：2007-09-11

申请人： Ivo Raaijmakers ,  Christophe Pomarede ,  Cornelius Jeugd ,  Alexander Gschwandtner ,  Andreas Grassi

发明人： Ivo Raaijmakers ,  Christophe Pomarede ,  Cornelius Jeugd ,  Alexander Gschwandtner ,  Andreas Grassi

IPC分类号： H01L21/334

CPC分类号： C23C16/45504 ,  C23C16/045 ,  C23C16/24 ,  C23C16/455 ,  C23C16/45502 ,  C23C16/45591 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/76877 ,  H01L29/66181 ,  H01L29/78

摘要： A method is disclosed for depositing silicon with high deposition rates and good step coverage. The process is performed at high pressures, including close to atmospheric pressures, at temperatures of greater than about 650° C. Silane and hydrogen are flowed over a substrate in a single-wafer chamber. Advantageously, the process maintains good step coverage and high deposition rates (e.g., greater that 50 nn/min) even when dopant gases are added to the process, resulting in commercially practicable rates of deposition for conductive silicon. Despite the high deposition rates, step coverage is sufficient to deposit polysilicon into extremely deep trenches and vias with aspect ratios as high as 40:1, filling such structures without forming voids or keyholes.

摘要翻译： 公开了一种用于沉积具有高沉积速率和良好的台阶覆盖率的硅的方法。 该方法在大于约650℃的温度下在高压（包括接近大气压）下进行。硅烷和氢气在单晶片室中流过衬底。 有利的是，即使将掺杂剂气体加入到该方法中，该方法保持良好的阶梯覆盖率和高的沉积速率（例如，大于50nn / min），从而导致商业上可行的导电硅沉积速率。 尽管沉积速率高，但步长覆盖足以将多晶硅沉积到具有高达40:1的纵横比的极深沟槽和通孔中，填充这种结构而不形成空隙或键孔。

公开(公告)号：US06232196B1

公开(公告)日：2001-05-15

申请号：US09264167

申请日：1999-03-05

申请人： Ivo Raaijmakers ,  Christopher François Lilian Pomarède ,  Cornelius Alexander van der Jengd ,  Alexander Gschwandtner ,  Andreas Grassl

发明人： Ivo Raaijmakers ,  Christopher François Lilian Pomarède ,  Cornelius Alexander van der Jengd ,  Alexander Gschwandtner ,  Andreas Grassl

IPC分类号： H01L2120

CPC分类号： C23C16/45504 ,  C23C16/045 ,  C23C16/24 ,  C23C16/455 ,  C23C16/45502 ,  C23C16/45591 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/76877 ,  H01L29/66181 ,  H01L29/78

摘要： A method is disclosed for depositing silicon with high deposition rates and good step coverage. The process is performed at high pressures, including close to atmospheric pressures, at temperatures of greater than about 650° C. Silane and hydrogen are flowed over a substrate in a single-wafer chamber. Advantageously, the process maintains good step coverage and high deposition rates (e.g., greater that 50 nn/min) even when dopant gases are added to the process, resulting in commercially practicable rates of deposition for conductive silicon. Despite the high deposition rates, step coverage is sufficient to deposit polysilicon into extremely deep trenches and vias with aspect ratios as high as 40:1, filling such structures without forming voids or keyholes.

摘要翻译： 公开了一种用于沉积具有高沉积速率和良好的台阶覆盖率的硅的方法。 该方法在大于约650℃的温度下在高压（包括接近大气压）下进行。硅烷和氢气在单晶片室中流过衬底。 有利的是，即使将掺杂剂气体加入到该方法中，该方法保持良好的阶梯覆盖率和高的沉积速率（例如，大于50nn / min），从而导致商业上可行的导电硅沉积速率。 尽管沉积速率高，但步长覆盖足以将多晶硅沉积到具有高达40:1的纵横比的极深沟槽和通孔中，填充这种结构而不形成空隙或键孔。

公开(公告)号：US20100155859A1

公开(公告)日：2010-06-24

申请号：US12339672

申请日：2008-12-19

申请人： Ivo Raaijmakers

发明人： Ivo Raaijmakers

IPC分类号： H01L29/772 ,  H01L21/441

CPC分类号： H01L21/76823 ,  C23C16/405 ,  C23C16/56 ,  H01L21/28518 ,  H01L21/28562 ,  H01L29/665 ,  H01L29/66568

摘要： A method of self-aligned silicidation on structures having high aspect ratios involves depositing a metal oxide film using atomic layer deposition (ALD) and converting the metal oxide film to metal film in order to obtain uniform step coverage. The substrate is then annealed such that the metal in regions directly overlying the patterned and exposed silicon reacts with the silicon to form uniform metal silicide at the desired locations.

摘要翻译： 在具有高纵横比的结构上的自对准硅化物的方法包括使用原子层沉积（ALD）沉积金属氧化物膜并将金属氧化物膜转化为金属膜以获得均匀的台阶覆盖。 然后将衬底退火，使得直接覆盖图案化和暴露的硅的区域中的金属与硅反应，以在期望的位置形成均匀的金属硅化物。

公开(公告)号：US20090068832A1

公开(公告)日：2009-03-12

申请号：US12202132

申请日：2008-08-29

申请人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey ,  Christrian J. Werkhoven

发明人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey ,  Christrian J. Werkhoven

IPC分类号： H01L21/4763

CPC分类号： C23C16/029 ,  C23C16/34 ,  C23C16/401 ,  C23C16/403 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45534 ,  C30B25/14 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/3185 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2221/1089

摘要： Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces. In some embodiments additional seed layers or additional transition layers are provided.

摘要翻译： 通过原子层沉积形成薄膜，由此膜的组成可以在包括自限制化学的交替脉冲的循环期间从单层变为单层。 在所示实施例中，在循环过程中引入了不同量的杂质源。 因此，即使对于非常薄的层也提供了梯度栅极电介质。 薄的2nm的栅极电介质可以从纯氧化硅到氧氮化物变化为氮化硅。 类似地，栅极电介质可以从氧化铝变化为氧化铝和较高电介质材料（例如，ZrO 2）到纯高k材料并返回到氧化铝的混合物。 在另一个实施例中，金属氮化物（例如，WN）首先形成为用于衬里双镶嵌沟槽和通孔的屏障。 在交替沉积工艺期间，铜可以被引入，例如分开的脉冲，并且铜源脉冲可以逐渐增加频率，形成过渡区域，直到在上表面形成纯铜。 有利的是，这些和各种其他情况下的分级组合物有助于避免诸如在尖锐材料界面处可能发生的蚀刻速率控制，电迁移和非欧姆电接触等问题。 在一些实施例中，提供了额外的种子层或附加的过渡层。

公开(公告)号：US07402504B2

公开(公告)日：2008-07-22

申请号：US11506320

申请日：2006-08-18

申请人： Paul D. Brabant ,  Joseph P. Italiano ,  Chantal J. Arena ,  Pierre Tomasini ,  Ivo Raaijmakers ,  Matthias Bauer

发明人： Paul D. Brabant ,  Joseph P. Italiano ,  Chantal J. Arena ,  Pierre Tomasini ,  Ivo Raaijmakers ,  Matthias Bauer

IPC分类号： H01L21/20

CPC分类号： C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02661

摘要： Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.

摘要翻译： 用于沉积诸如外延Ge和SiGe膜的外延膜的方法。 在从高温加工冷却到含Ge层的较低沉积温度时，向基板提供Si或Ge化合物。 导致平滑，薄，相对缺陷的Ge或SiGe层。 还提供了轻松，高Ge含量种子层和上覆应变层之间的退化弛豫SiGe。

公开(公告)号：US20080073645A1

公开(公告)日：2008-03-27

申请号：US11854163

申请日：2007-09-12

申请人： Michael Todd ,  Ivo Raaijmakers

发明人： Michael Todd ,  Ivo Raaijmakers

IPC分类号： H01L29/04

CPC分类号： C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

摘要： Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

摘要翻译： 通过使用含硅前体的沉积方法制备薄的，平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US07285500B2

公开(公告)日：2007-10-23

申请号：US11179256

申请日：2005-07-12

申请人： Michael A. Todd ,  Ivo Raaijmakers

发明人： Michael A. Todd ,  Ivo Raaijmakers

IPC分类号： H01L21/31

CPC分类号： C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

摘要： Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

摘要翻译： 通过使用含硅前体的沉积方法制备薄的，平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US07253084B2

公开(公告)日：2007-08-07

申请号：US10933978

申请日：2004-09-03

申请人： Michael A. Todd ,  Ivo Raaijmakers

发明人： Michael A. Todd ,  Ivo Raaijmakers

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/67253 ,  C23C16/4481 ,  C23C16/4483 ,  C23C16/4486 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/67115

摘要： A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.

摘要翻译： 在半导体制造过程中，使用液体注入器将硅前体汽化并注入到处理室中以形成含硅层。 注射器连接到硅前体源，其优选包括与一种或多种掺杂剂前体的混合物中的液体丙硅烷。 将混合物计量为液体并输送到注射器，然后将其蒸发并注入到处理室中。

公开(公告)号：US20060258150A1

公开(公告)日：2006-11-16

申请号：US11411430

申请日：2006-04-25

申请人： Ivo Raaijmakers ,  Pekka Soininen ,  Kai-Erik Elers

发明人： Ivo Raaijmakers ,  Pekka Soininen ,  Kai-Erik Elers

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76846 ,  C23C16/0272 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/76856 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.

公开(公告)号：US07102235B2

公开(公告)日：2006-09-05

申请号：US10737315

申请日：2003-12-15

申请人： Ivo Raaijmakers ,  Suvi P. Haukka ,  Yille A. Saanila ,  Pekka J. Soininen ,  Kai-Erik Elers ,  Ernst H. A. Granneman

发明人： Ivo Raaijmakers ,  Suvi P. Haukka ,  Yille A. Saanila ,  Pekka J. Soininen ,  Kai-Erik Elers ,  Ernst H. A. Granneman

IPC分类号： H01L23/52

CPC分类号： C23C16/45525 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/08 ,  C23C16/14 ,  C23C16/32 ,  C23C16/34 ,  C23C16/44 ,  C23C16/45534 ,  C23C16/45536 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.

摘要翻译： 提供了集成电路中双镶嵌结构的保形衬里的方法和结构。 沟槽和接触通孔形成在绝缘层中。 沟槽和通孔暴露于交替的化学物质以形成所需衬里材料的单层。 示例性工艺流程包括交替脉冲的金属卤化物和注入恒定载流子的氨气。 自身端接的金属层因此与氮气反应。 接近完美的台阶覆盖允许扩散阻挡功能的最小厚度，从而使任何给定沟槽和通孔尺寸的后续填充金属的体积最大化。