公开(公告)号：US20110304016A1

公开(公告)日：2011-12-15

申请号：US13154565

申请日：2011-06-07

申请人： Junichi NAKAMURA ,  Kentaro Kaneko ,  Shunichiro Matsumoto

发明人： Junichi NAKAMURA ,  Kentaro Kaneko ,  Shunichiro Matsumoto

IPC分类号： H01L29/02 ,  H01L23/48 ,  H01L21/28

CPC分类号： H01L23/13 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/642 ,  H01L24/16 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2924/1205 ,  H01L2924/1207 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2924/19101 ,  H01L2924/19105 ,  H05K1/111 ,  H05K3/244 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09072 ,  H05K2201/10015 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/308

摘要： A wiring board includes a structure in which a plurality of wiring layers are stacked with insulating layers interposed therebetween, a plurality of pads for mounting an electronic component, the pads being formed on an outermost insulating layer on one surface side of the structure and exposed to the surface of the outermost insulating layer, and a recessed portion formed at a place corresponding to a mounting area for the electronic component. The recessed portion is formed in the outermost insulating layer at an area between the pads to which electrode terminals of the electronic component to be mounted are to be connected, respectively.

摘要翻译： 布线基板包括多个布线层层叠有绝缘层的结构，多个用于安装电子部件的焊盘，该焊盘形成在该结构的一个表面侧上的最外侧的绝缘层上并暴露于 最外层绝缘层的表面和形成在与电子部件的安装区域对应的位置的凹部。 凹陷部分分别形成在要连接的电子部件的电极端子的焊盘之间的区域中的最外层绝缘层中。

公开(公告)号：US20080265398A1

公开(公告)日：2008-10-30

申请号：US12109919

申请日：2008-04-25

申请人： Shunichiro MATSUMOTO ,  Junichi NAKAMURA

发明人： Shunichiro MATSUMOTO ,  Junichi NAKAMURA

IPC分类号： H01L23/498 ,  H01R12/00

CPC分类号： H01R12/58 ,  H01L23/49811 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/023 ,  H05K3/303 ,  H05K3/3421 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/1059 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A substrate with pins comprises pins, and a holding substrate in which through holes to which the pins are attached are formed. Head parts of the pins are arranged in the through holes. The pins are attached by pressing the head parts in the through holes.

摘要翻译： 具有销的基板包括销和保持基板，其中形成有连接销的通孔。 销的头部布置在通孔中。 通过按压通孔中的头部部件来连接销。

公开(公告)号：US20120175153A1

公开(公告)日：2012-07-12

申请号：US13344864

申请日：2012-01-06

申请人： Kentaro KANEKO ,  Toshiaki AOKI ,  Kazuhiro KOBAYASHI ,  Kotaro KODANI ,  Junichi NAKAMURA

发明人： Kentaro KANEKO ,  Toshiaki AOKI ,  Kazuhiro KOBAYASHI ,  Kotaro KODANI ,  Junichi NAKAMURA

IPC分类号： H05K1/02 ,  H05K3/42

CPC分类号： H05K1/113 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15174 ,  H05K3/4682 ,  H05K2203/0152 ,  H05K2203/016 ,  Y10T29/49165 ,  H01L2924/00

摘要： A wiring substrate includes plural insulating layers including an outermost insulating layer; and plural wiring layers which are alternately laminated between the insulating layers and include outermost wiring layers exposed from the outermost insulating layer and through wirings having electrode pads on end portions of the through wirings and penetrating through the outermost insulating layer, wherein the electrode pads of the through wirings are exposed from the outermost insulating layer, and a part of the outermost wiring layers overlaps the end portions of the through wirings and is connected to the through wirings.

摘要翻译： 布线基板包括包括最外绝缘层的多个绝缘层; 以及多个布线层，交替层叠在绝缘层之间，并且包括从最外层绝缘层露出的最外面布线层，并且穿过在通孔布线的端部上穿过最外层绝缘层的电极焊盘的布线，其中， 通过布线从最外侧绝缘层露出，并且最外面的布线层的一部分与贯通配线的端部重叠，并与贯通布线连接。

公开(公告)号：US20110001688A1

公开(公告)日：2011-01-06

申请号：US12885052

申请日：2010-09-17

申请人： Osamu WADA ,  Junichi NAKAMURA

发明人： Osamu WADA ,  Junichi NAKAMURA

IPC分类号： G09G3/00

CPC分类号： G09G3/2003 ,  G09G3/20 ,  G09G3/34 ,  G09G3/3406 ,  G09G3/3413 ,  G09G3/346 ,  G09G3/3611 ,  G09G2310/0235 ,  G09G2320/0242 ,  G09G2320/0261 ,  G09G2360/18

摘要： The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.

摘要翻译： 彩色显示装置包括用于以预定频率以时间顺序重复产生多个彩色光的彩色光产生单元，以及用于处理所述多个彩色光的图像生成单元，以便产生与每个彩色光对应的图像 以时间顺序生成多个彩色光。 所述预定频率为180Hz以上。

公开(公告)号：US20100132993A1

公开(公告)日：2010-06-03

申请号：US12627096

申请日：2009-11-30

申请人： Junichi NAKAMURA ,  Kotaro Kodani ,  Michiro Ogawa

发明人： Junichi NAKAMURA ,  Kotaro Kodani ,  Michiro Ogawa

IPC分类号： H05K1/16 ,  H05K1/11

CPC分类号： H01L23/49544 ,  H01L23/49822 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/2009 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.

摘要翻译： 布线基板包括布线形成区域，其中堆叠多个布线层，同时夹着绝缘层;外周区域布置在布线形成区域周围，并且其中加强图案形成在与每个布线形成区域相同的层中 接线层。 增强图案与外周区域的面积比和布线层与布线形成区域的面积比在各层中基本相同，并且当外围区域中没有间隙时，增强图案在外周区域中不存在间隙 接线板以平面视角观看。

公开(公告)号：US20120293973A1

公开(公告)日：2012-11-22

申请号：US13482784

申请日：2012-05-29

申请人： Junichi NAKAMURA ,  Yuji Kobayashi ,  Mikio Yamagiwa

发明人： Junichi NAKAMURA ,  Yuji Kobayashi ,  Mikio Yamagiwa

IPC分类号： H05K1/02 ,  H05K3/10 ,  H01L21/58 ,  H05K1/18 ,  H05K1/11

CPC分类号： H05K1/0366 ,  H01L21/6835 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/036 ,  H05K3/205 ,  H05K3/423 ,  H05K3/4602 ,  H05K3/4655 ,  H05K3/4673 ,  H05K3/4682 ,  H05K3/4688 ,  H05K2203/0152 ,  H05K2203/0733 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49155

摘要： In a multilayered wiring board constituted by laminating to form pluralities of layers of wiring layers 105, 108, 110 and insulating layers 104, 106, 107, in the plurality of laminated insulating layers 104, 106, 107, the insulating layer 106 disposed at a laminating center in a laminating direction is made to constitute an insulating layer with a reinforcing member including a reinforcing member.

摘要翻译： 在层叠多层布线层105,108,110和绝缘层104,106,107的多层布线基板中，在多层叠绝缘层104,106,107中设置有绝缘层106,106,107 使层叠方向的层叠中心构成具有包括加强构件的加强构件的绝缘层。

公开(公告)号：US20120103675A1

公开(公告)日：2012-05-03

申请号：US13280734

申请日：2011-10-25

申请人： Kazunari KIMURA ,  Junichi NAKAMURA ,  Takeshi KIJIMA ,  Isao ABE ,  Takahiro SUZUKI ,  Toshiaki ARAKI

发明人： Kazunari KIMURA ,  Junichi NAKAMURA ,  Takeshi KIJIMA ,  Isao ABE ,  Takahiro SUZUKI ,  Toshiaki ARAKI

IPC分类号： H05K1/11 ,  H05K3/42 ,  H05K1/16

CPC分类号： H05K3/4061 ,  H01P1/20345 ,  H05K3/4629 ,  Y10T29/49165

摘要： A laminated electronic device comprises two or more wiring layers including a first wiring layer and a second wiring layer, an insulating layer interposed between the first wiring layer and second wiring layer, and a through conductor extending through the insulating layer for electrically connecting a first conductor disposed on the first wiring layer to a second conductor disposed on the second wiring layer. The through conductor includes divergent sections at both ends, which have a diameter gradually increased toward the first conductor or second conductor.

摘要翻译： 层叠电子器件包括两个或更多个布线层，包括第一布线层和第二布线层，插入在第一布线层和第二布线层之间的绝缘层，以及穿过绝缘层的贯通导体，用于将第一布线 布置在第一布线层上的布置在第二布线层上的第二导体。 贯通导体包括两端的发散部分，其具有朝向第一导体或第二导体逐渐增加的直径。

公开(公告)号：US20110169164A1

公开(公告)日：2011-07-14

申请号：US12968405

申请日：2010-12-15

申请人： Junichi NAKAMURA ,  Kazuhiro Kobayashi

发明人： Junichi NAKAMURA ,  Kazuhiro Kobayashi

IPC分类号： H01L23/498 ,  H05K1/00 ,  H05K3/10

CPC分类号： H05K3/10 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81132 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/82385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/351 ,  H05K1/0269 ,  H05K3/205 ,  H05K3/3436 ,  H05K3/4682 ,  H05K2201/09918 ,  H05K2203/025 ,  H05K2203/0361 ,  H05K2203/1152 ,  Y10T29/49155 ,  H01L2924/00

摘要： A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess.

摘要翻译： 所公开的布线基板包括绝缘层，形成在绝缘层的表面上的凹部和形成在凹部内部的对准标记，其中对准标记的表面被粗糙化，从绝缘层的表面凹陷， 从凹槽露出。

公开(公告)号：US20070103644A1

公开(公告)日：2007-05-10

申请号：US11552805

申请日：2006-10-25

申请人： Junichi NAKAMURA ,  Takashi NITTA ,  Shoichi UCHIYAMA ,  Tsunemori ASAHI

发明人： Junichi NAKAMURA ,  Takashi NITTA ,  Shoichi UCHIYAMA ,  Tsunemori ASAHI

IPC分类号： G03B21/00

CPC分类号： G03B21/20 ,  G02B13/22 ,  H04N9/3105

摘要： An image display device includes: a light source; a first optical modulator that modulates a plurality of color lights coming from the light source; a color combination member that combines the color lights provided by the first optical modulator; a second optical modulator that modulates a light provided by the color combination member as a result of the color light combination; a relay optical system that is disposed between the color combination member and the second optical modulators and guides the light provided by the color combination member to the second optical modulator; and a light transmissive member that is disposed between the relay optical system and the second optical modulator, and has a function of allowing optical path conditions from the first optical modulator to the relay optical system via the color combination member to be substantially the same as optical path conditions from the relay optical system to the second optical modulator.

摘要翻译： 一种图像显示装置，包括：光源; 调制来自所述光源的多个彩色光的第一光调制器; 组合由第一光调制器提供的彩色光的颜色组合构件; 第二光调制器，其由所述色光组合的结果调制由所述颜色组合构件提供的光; 中继光学系统，其设置在所述颜色组合构件和所述第二光学调制器之间，并且将由所述颜色组合构件提供的光引导到所述第二光学调制器; 以及设置在所述中继光学系统和所述第二光学调制器之间的透光构件，并且具有通过所述颜色组合构件允许从所述第一光学调制器到所述中继光学系统的光路条件与光学器件基本相同的功能 从中继光学系统到第二光学调制器的路径条件。

公开(公告)号：US20120096711A1

公开(公告)日：2012-04-26

申请号：US13340979

申请日：2011-12-30

申请人： Junichi NAKAMURA ,  Takaharu Miyamoto

发明人： Junichi NAKAMURA ,  Takaharu Miyamoto

IPC分类号： H05K3/10 ,  H05K3/42

CPC分类号： H01L23/49838 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49833 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/09136 ,  H05K2201/09354 ,  H05K2201/09781 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A wiring board 10 comprises a wiring board main body 21 having a dielectric layer 25 that is the first dielectric layer, an electronic component attaching pad 24 having a connection surface 24A with which an electronic component 11 is connected, and disposed inside the dielectric layer 25, a dielectric layer 31 that is the second dielectric layer laminated on the dielectric layer 25, and the via holes 27 and 33 and a wiring pattern 28 provided on the dielectric layers 25 and 31 and electrically connected with the electronic component attaching pad 24, wherein a warp reduction member 22 for reducing a warp of the wiring board main body 21 is disposed inside the dielectric layer 25.

摘要翻译： 配线基板10具有：具有作为第一电介质层的电介质层25的布线基板主体21，具有与电子部件11连接的连接面24A的电子部件安装焊盘24，配置在电介质层25的内部 作为层叠在电介质层25上的第二电介质层的电介质层31和设置在电介质层25,31上并与电子部件安装焊盘24电连接的通孔27,33和布线图案28， 用于减小布线板主体21的翘曲的翘曲构件22设置在电介质层25的内部。