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公开(公告)号：US20240266190A1
公开(公告)日：2024-08-08
申请号：US18642173
申请日：2024-04-22
发明人： Wen-Hsiung LU , Ming-Da CHENG , Su-Fei LIN , Hsu-Lun LIU , Chien-Pin CHAN , Yung-Sheng LIN
IPC分类号： H01L21/48 , C25D5/00 , H01L23/00 , H01L23/498 , H01L23/538
CPC分类号： H01L21/4853 , C25D5/60 , H01L21/486 , H01L23/49811 , H01L23/5384 , H01L24/14
摘要： In a method of manufacturing a semiconductor device first conductive layers are formed over a substrate. A first photoresist layer is formed over the first conductive layers. The first conductive layers are etched by using the first photoresist layer as an etching mask, to form an island pattern of the first conductive layers separated from a bus bar pattern of the first conductive layers by a ring shape groove. A connection pattern is formed to connect the island pattern and the bus bar pattern. A second photoresist layer is formed over the first conductive layers and the connection pattern. The second photoresist layer includes an opening over the island pattern. Second conductive layers are formed on the island pattern in the opening. The second photoresist layer is removed, and the connection pattern is removed, thereby forming a bump structure.
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公开(公告)号：US20240047403A1
公开(公告)日：2024-02-08
申请号：US18484609
申请日：2023-10-11
发明人： Neng-Chieh CHANG , Po-Hao TSAI , Ming-Da CHENG , Wen-Hsiung LU , Hsu-Lun LIU
CPC分类号： H01L24/20 , H01L24/19 , H01L24/24 , H01L24/82 , H01L21/561 , H01L25/105 , H01L24/96 , H01L2225/1058 , H01L2224/214 , H01L2224/215 , H01L2924/01029 , H01L2924/01013 , H01L24/13 , H01L2224/13024 , H01L24/04 , H01L24/05 , H01L2224/0401 , H01L2224/05569 , H01L2224/19 , H01L2224/24175 , H01L2224/821 , H01L2225/1035
摘要： A semiconductor package structure includes a conductive pad formed over a substrate. The semiconductor package structure also includes a passivation layer formed over the conductive pad. The semiconductor package structure further includes a first via structure formed through the passivation layer and in contact with the conductive pad. The semiconductor package structure also includes a first encapsulating material surrounding the first via structure. The semiconductor package structure further includes a redistribution layer structure formed over the first via structure. The first via structure has a lateral extending portion embedded in the first encapsulating material near a top surface of the first via structure, and the lateral extending portion has a width increasing in a direction toward the redistribution layer structure.
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公开(公告)号：US20230067826A1
公开(公告)日：2023-03-02
申请号：US17460647
申请日：2021-08-30
发明人： Neng-Chieh CHANG , Po-Hao TSAI , Ming-Da CHENG , Wen-Hsiung LU , Hsu-Lun LIU
摘要： A semiconductor package structure includes a conductive pad formed over a substrate. The structure also includes a passivation layer formed over the conductive pad. The structure also includes a first via structure formed through the passivation layer and in contact with the conductive pad. The structure also includes a first encapsulating material surrounding the first via structure. The structure also includes a redistribution layer structure formed over the first via structure. The first via structure has a lateral extending portion embedded in the first encapsulating material near a top surface of the first via structure.
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公开(公告)号：US20150249066A1
公开(公告)日：2015-09-03
申请号：US14713476
申请日：2015-05-15
发明人： Hung-Jen LIN , Tsung-Ding WANG , Chien-Hsiun LEE , Wen-Hsiung LU , Ming-Da CHENG , Chung-Shi LIU
IPC分类号： H01L23/00 , H01L21/768 , H01L21/56
CPC分类号： H01L24/81 , H01L21/563 , H01L21/565 , H01L21/566 , H01L21/768 , H01L23/3114 , H01L23/3171 , H01L23/525 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/83 , H01L24/92 , H01L24/94 , H01L2224/02311 , H01L2224/0239 , H01L2224/024 , H01L2224/0347 , H01L2224/03612 , H01L2224/03614 , H01L2224/0362 , H01L2224/0401 , H01L2224/05008 , H01L2224/05073 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05187 , H01L2224/05582 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/21 , H01L2224/27318 , H01L2224/27334 , H01L2224/27416 , H01L2224/2919 , H01L2224/73204 , H01L2224/81024 , H01L2224/81191 , H01L2224/81203 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83855 , H01L2224/92125 , H01L2224/94 , H01L2924/00014 , H01L2924/01013 , H01L2924/01047 , H01L2924/12042 , H01L2924/181 , H01L2924/2076 , H01L2224/81 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/014 , H01L2224/11 , H01L2924/00
摘要： A method of forming a package assembly includes forming a no-flow underfill layer on a substrate. The method further includes attaching a semiconductor die to the substrate. The semiconductor die comprises a bump and a molding compound layer in physical contact with a lower portion of the bump. An upper portion of the bump is in physical contact with the no-flow underfill layer.
摘要翻译： 形成封装组件的方法包括在衬底上形成无流动的底部填充层。 该方法还包括将半导体管芯附接到衬底。 半导体管芯包括与凸块的下部物理接触的凸起和模制化合物层。 凸块的上部与无流动底部填充层物理接触。
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公开(公告)号：US20240083742A1
公开(公告)日：2024-03-14
申请号：US18510628
申请日：2023-11-15
发明人： Ting-Li YANG , Kai-Di WU , Ming-Da CHENG , Wen-Hsiung LU , Cheng Jen LIN , Chin Wei KANG
CPC分类号： B81B3/0081 , B81C1/0069 , B81B2203/0127 , B81B2203/019 , B81B2203/0353 , B81B2207/015 , B81C2201/013 , B81C2201/0181 , B81C2203/032 , B81C2203/0735
摘要： A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.
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公开(公告)号：US20220351983A1
公开(公告)日：2022-11-03
申请号：US17865305
申请日：2022-07-14
发明人： Wen-Hsiung LU , Ming-Da CHENG , Su-Fei LIN , Hsu-Lun LIU , Chien-Pin CHAN , Yung-Sheng LIN
IPC分类号： H01L21/48 , C25D5/00 , H01L23/498 , H01L23/00 , H01L23/538
摘要： In a method of manufacturing a semiconductor device first conductive layers are formed over a substrate. A first photoresist layer is formed over the first conductive layers. The first conductive layers are etched by using the first photoresist layer as an etching mask, to form an island pattern of the first conductive layers separated from a bus bar pattern of the first conductive layers by a ring shape groove. A connection pattern is formed to connect the island pattern and the bus bar pattern. A second photoresist layer is formed over the first conductive layers and the connection pattern. The second photoresist layer includes an opening over the island pattern. Second conductive layers are formed on the island pattern in the opening. The second photoresist layer is removed, and the connection pattern is removed, thereby forming a bump structure.
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公开(公告)号：US20130295762A1
公开(公告)日：2013-11-07
申请号：US13927753
申请日：2013-06-26
发明人： Wen-Hsiung LU , Ming-Da CHENG , Chih-Wei LIN , Jacky CHANG , Chung-Shi LIU , Chen-Hua YU
IPC分类号： H01L23/00
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0346 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/11452 , H01L2224/11462 , H01L2224/1147 , H01L2224/11823 , H01L2224/11825 , H01L2224/11906 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13099 , H01L2224/13147 , H01L2224/13455 , H01L2224/13565 , H01L2224/1357 , H01L2224/13639 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： A method of forming a bump structure includes providing a semiconductor substrate and forming an under-bump-metallurgy (UBM) layer on the semiconductor substrate. The method further includes forming a mask layer on the UBM layer, wherein the mask layer has an opening exposing a portion of the UBM layer. The method further includes forming a copper layer in the opening of the mask layer and removing a portion of the mask layer to form a space between the copper layer and the mask layer. The method further includes performing an electrolytic process to fill the space with a metal layer and removing the mask layer.
摘要翻译： 形成凸块结构的方法包括提供半导体衬底并在半导体衬底上形成凸点下 - 冶金（UBM）层。 该方法还包括在UBM层上形成掩模层，其中掩模层具有露出UBM层的一部分的开口。 该方法还包括在掩模层的开口中形成铜层并去除掩模层的一部分以在铜层和掩模层之间形成空间。 该方法还包括执行电解处理以用金属层填充空间并去除掩模层。
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公开(公告)号：US20240153849A1
公开(公告)日：2024-05-09
申请号：US18401948
申请日：2024-01-02
发明人： Ting-Li YANG , Wen-Hsiung LU , Lung-Kai MAO , Fu-Wei LIU , Mirng-Ji LII
IPC分类号： H01L23/48 , H01L21/306 , H01L21/768
CPC分类号： H01L23/481 , H01L21/30608 , H01L21/76871
摘要： A semiconductor device structure is provided. The semiconductor device structure includes a chip structure including a substrate and a wiring structure over a first surface of the substrate. The semiconductor device structure includes a first seed layer over the wiring structure, a first inner wall of the first enlarged portion, and a second inner wall of the neck portion. The semiconductor device structure includes a second seed layer over a second surface of the substrate, a third inner wall of the second enlarged portion, and the first seed layer over the second inner wall of the neck portion. The second seed layer is in direct contact with the first seed layer.
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公开(公告)号：US20230060982A1
公开(公告)日：2023-03-02
申请号：US17460709
申请日：2021-08-30
发明人： Ting-Li YANG , Wen-Hsiung LU , Lung-Kai MAO , Fu-Wei LIU , Mirng-Ji LII
IPC分类号： H01L23/48 , H01L21/768 , H01L21/306
摘要： A method for forming a semiconductor device structure is provided. The method includes providing a chip structure including a substrate and a wiring structure over a first surface of the substrate. The method includes removing a first portion of the wiring structure adjacent to the hole to widen a second portion of the hole in the wiring structure. The second portion has a first width increasing in a first direction away from the substrate. The method includes forming a first seed layer over the wiring structure and in the hole. The method includes thinning the substrate from a second surface of the substrate until the first seed layer in the hole is exposed. The method includes forming a second seed layer over the second surface of the substrate and the first seed layer in the hole.
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公开(公告)号：US20210384152A1
公开(公告)日：2021-12-09
申请号：US17409138
申请日：2021-08-23
发明人： Chen-En YEN , Chin-Wei KANG , Kai-Jun ZHAN , Wen-Hsiung LU , Cheng-Jen LIN , Ming-Da CHENG , Mirng-Ji LII
IPC分类号： H01L23/00
摘要： A semiconductor device is provided. The semiconductor device includes a substrate having a surface. The semiconductor device includes a conductive pad over a portion of the surface. The conductive pad has a curved top surface, and a width of the conductive pad increases toward the substrate. The semiconductor device includes a device over the conductive pad. The semiconductor device includes a solder layer between the device and the conductive pad. The solder layer covers the curved top surface of the conductive pad, and the conductive pad extends into the solder layer.
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