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1.发明授权Integrated circuit system having different-size solder bumps and different-size bonding pads 有权集成电路系统具有不同尺寸的焊料凸块和不同尺寸的焊盘公开(公告)号：US08487438B2
公开(公告)日：2013-07-16
申请号：US12484099
申请日：2009-06-12
IPC分类号： H01L23/485
CPC分类号： H01L24/06 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/0231 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05647 , H01L2224/0603 , H01L2224/1132 , H01L2224/11334 , H01L2224/1147 , H01L2224/11849 , H01L2224/11903 , H01L2224/13027 , H01L2224/131 , H01L2224/1403 , H01L2224/14104 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/30107 , H01L2224/13099 , H01L2924/00014 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00012
摘要： An integrated circuit solder bumping system provides a substrate and forms a redistribution layer on the substrate. An insulation layer is formed on the redistribution layer. The insulation layer has a plurality of openings therethrough. A first UBM layer of titanium is deposited on the insulation layer and in the openings therethrough. A second UBM layer of chromium/copper alloy is deposited on the first UBM layer. A third UBM layer of copper is deposited on the second UBM layer. UBM pads of at least two different sizes are formed from the UBM layers. Solder paste is printed over at least some of the UBM pads. The solder paste is reflowed to form at least smaller solder bumps on at least some of the UBM pads. Bigger solder bumps are formed on at least some of the UBM pads.
摘要翻译： 集成电路焊料凸块系统提供衬底并在衬底上形成再分布层。 在再分布层上形成绝缘层。 绝缘层具有穿过其中的多个开口。 第一UBM层钛沉积在绝缘层上和通过其中的开口中。 第二UBM层的铬/铜合金沉积在第一UBM层上。 铜的第三UBM层沉积在第二UBM层上。 具有至少两种不同尺寸的UBM焊盘由UBM层形成。 至少一些UBM垫上印有焊膏。 焊膏被回流以在至少一些UBM焊盘上形成至少较小的焊料凸块。 在至少一些UBM垫上形成更大的焊料凸块。
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公开(公告)号：US07566650B2
公开(公告)日：2009-07-28
申请号：US11162822
申请日：2005-09-23
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L24/06 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/0231 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05647 , H01L2224/0603 , H01L2224/1132 , H01L2224/11334 , H01L2224/1147 , H01L2224/11849 , H01L2224/11903 , H01L2224/13027 , H01L2224/131 , H01L2224/1403 , H01L2224/14104 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/30107 , H01L2224/13099 , H01L2924/00014 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00012
摘要： An integrated circuit solder bumping system provides a substrate and forms a redistribution layer on the substrate. An insulation layer is formed on the redistribution layer. The insulation layer has a plurality of openings therethrough. A first UBM layer of titanium is deposited on the insulation layer and in the openings therethrough. A second UBM layer of chromium/copper alloy is deposited on the first UBM layer. A third UBM layer of copper is deposited on the second UBM layer. UBM pads of at least two different sizes are formed from the UBM layers. Solder paste is printed over at least some of the UBM pads. The solder paste is reflowed to form at least smaller solder bumps on at least some of the UBM pads. Bigger solder bumps are formed on at least some of the UBM pads.
摘要翻译： 集成电路焊料凸块系统提供衬底并在衬底上形成再分布层。 在再分布层上形成绝缘层。 绝缘层具有穿过其中的多个开口。 第一UBM层钛沉积在绝缘层上和通过其中的开口中。 第二UBM层的铬/铜合金沉积在第一UBM层上。 铜的第三UBM层沉积在第二UBM层上。 具有至少两种不同尺寸的UBM焊盘由UBM层形成。 至少一些UBM垫上印有焊膏。 焊膏被回流以在至少一些UBM焊盘上形成至少较小的焊料凸块。 在至少一些UBM垫上形成更大的焊料凸块。
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3.发明授权公开(公告)号：US07410824B2
公开(公告)日：2008-08-12
申请号：US11009436
申请日：2004-12-09
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L21/4763
CPC分类号： H05K3/3484 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05147 , H01L2224/05171 , H01L2224/05558 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/13021 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2924/0002 , H01L2924/01006 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H01L2924/30107 , H05K3/1216 , H05K3/3452 , H05K2203/043 , H05K2203/0568 , H01L2224/05552 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method for solder bumping provides a substrate and forms a film on the substrate. The film has openings therethrough. A stencil is aligned on the film. The stencil has openings therethrough over the openings through the film. Solder paste is printed onto the substrate and into the openings through the stencil and the openings through the film. The solder paste is reflowed to form solder balls therefrom. The stencil and the film are then removed.
摘要翻译： 焊接凸块的方法提供基板并在基板上形成膜。 该膜具有开口。 模板在电影上对齐。 模板在穿过薄膜的开口上方具有穿过其的开口。 焊膏通过模版印刷到基板上并通过薄膜印刷到开口中。 焊膏被回流以从其形成焊球。 然后去除模板和胶片。
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公开(公告)号：US20090250813A1
公开(公告)日：2009-10-08
申请号：US12484099
申请日：2009-06-12
IPC分类号： H01L23/498
CPC分类号： H01L24/06 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/0231 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05647 , H01L2224/0603 , H01L2224/1132 , H01L2224/11334 , H01L2224/1147 , H01L2224/11849 , H01L2224/11903 , H01L2224/13027 , H01L2224/131 , H01L2224/1403 , H01L2224/14104 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/30107 , H01L2224/13099 , H01L2924/00014 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00012
摘要： An integrated circuit solder bumping system provides a substrate and forms a redistribution layer on the substrate. An insulation layer is formed on the redistribution layer. The insulation layer has a plurality of openings therethrough. A first UBM layer of titanium is deposited on the insulation layer and in the openings therethrough. A second UBM layer of chromium/copper alloy is deposited on the first UBM layer. A third UBM layer of copper is deposited on the second UBM layer. UBM pads of at least two different sizes are formed from the UBM layers. Solder paste is printed over at least some of the UBM pads. The solder paste is reflowed to form at least smaller solder bumps on at least some of the UBM pads. Bigger solder bumps are formed on at least some of the UBM pads.
摘要翻译： 集成电路焊料凸块系统提供衬底并在衬底上形成再分布层。 在再分布层上形成绝缘层。 绝缘层具有穿过其中的多个开口。 第一UBM层钛沉积在绝缘层上和通过其中的开口中。 第二UBM层的铬/铜合金沉积在第一UBM层上。 铜的第三UBM层沉积在第二UBM层上。 具有至少两种不同尺寸的UBM焊盘由UBM层形成。 至少一些UBM垫上印有焊膏。 焊膏被回流以在至少一些UBM焊盘上形成至少较小的焊料凸块。 在至少一些UBM垫上形成更大的焊料凸块。
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公开(公告)号：US20080230925A1
公开(公告)日：2008-09-25
申请号：US12133026
申请日：2008-06-04
IPC分类号： H01L23/52
CPC分类号： H05K3/3484 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05147 , H01L2224/05171 , H01L2224/05558 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/13021 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2924/0002 , H01L2924/01006 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H01L2924/30107 , H05K3/1216 , H05K3/3452 , H05K2203/043 , H05K2203/0568 , H01L2224/05552 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method for solder bumping provides a substrate and forms a film on the substrate. The film has openings therethrough. A stencil is aligned on the film. The stencil has openings therethrough over the openings through the film. Solder paste is printed onto the substrate and into the openings through the stencil and the openings through the film. The solder paste is reflowed to form solder balls therefrom. The stencil and the film are then removed.
摘要翻译： 焊接凸块的方法提供基板并在基板上形成膜。 该膜具有开口。 模板在电影上对齐。 模板在穿过薄膜的开口上方具有穿过其的开口。 焊膏通过模版印刷到基板上并通过薄膜印刷到开口中。 焊膏被回流以从其形成焊球。 然后去除模板和胶片。
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公开(公告)号：US08008770B2
公开(公告)日：2011-08-30
申请号：US11556035
申请日：2006-11-02
IPC分类号： H01L23/48
CPC分类号： H01L24/10 , H01L23/3114 , H01L24/13 , H01L2224/05008 , H01L2224/05548 , H01L2224/05572 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要： An integrated circuit package system includes an integrated circuit, and forming a patterned redistribution pad over the integrated circuit.
摘要翻译： 集成电路封装系统包括集成电路，并在该集成电路上形成图案化再分配焊盘。
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7.发明申请Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution 审中-公开提供公共电压总线和引线接合再分配的半导体器件和方法公开(公告)号：US20120261817A1
公开(公告)日：2012-10-18
申请号：US13536120
申请日：2012-06-28
申请人： Byung Tai Do , Stephen A. Murphy , Yaojian Lin , Heap Hoe Kuan , Pandi Chelvam Marimuthu , Hin Hwa Goh
发明人： Byung Tai Do , Stephen A. Murphy , Yaojian Lin , Heap Hoe Kuan , Pandi Chelvam Marimuthu , Hin Hwa Goh
IPC分类号： H01L21/768 , H01L23/498
CPC分类号： H01L24/16 , H01L23/3171 , H01L23/3192 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2224/0231 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05022 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05187 , H01L2224/05552 , H01L2224/05569 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0603 , H01L2224/1147 , H01L2224/1148 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/1411 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48611 , H01L2224/48624 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48711 , H01L2224/48724 , H01L2224/48739 , H01L2224/48747 , H01L2224/48755 , H01L2224/48824 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/4911 , H01L2224/49175 , H01L2224/85 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/01007 , H01L2224/48811 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要： A semiconductor wafer contains a plurality of semiconductor die. The wafer has contact pads formed over its surface. A passivation layer is formed over the wafer. A stress buffer layer is formed over the passivation layer. The stress buffer layer is patterned to expose the contact pads. A metal layer is deposited over the stress buffer layer. The metal layer is a common voltage bus for the semiconductor device in electrical contact with the contact pads. An adhesion layer, barrier layer, and seed layer is formed over the wafer in electrical contact with the contact pads. The metal layer is mounted to the seed layer. Solder bumps or other interconnect structures are formed over the metal layer. A second passivation layer is formed over the metal layer. In an alternate embodiment, a wirebondable layer can be deposited over the metal layer and wirebonds connected to the metal layer.
摘要翻译： 半导体晶片包含多个半导体管芯。 晶片具有在其表面上形成的接触垫。 在晶片上形成钝化层。 在钝化层上形成应力缓冲层。 将应力缓冲层图案化以暴露接触焊盘。 金属层沉积在应力缓冲层上。 金属层是用于与接触焊盘电接触的半导体器件的公共电压总线。 在与接触垫电接触的晶片之上形成粘合层，阻挡层和种子层。 金属层安装到种子层。 焊料凸块或其它互连结构形成在金属层上。 在金属层上形成第二钝化层。 在替代实施例中，可以将金属层沉积在金属层上，并且连接到金属层的引线键。
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8.发明授权Semiconductor device and method of supporting a wafer during backgrinding and reflow of solder bumps 有权半导体器件和在焊料凸块的后研磨和回流期间支撑晶片的方法公开(公告)号：US08048776B2
公开(公告)日：2011-11-01
申请号：US12036000
申请日：2008-02-22
申请人： Byung Tai Do , Heap Hoe Kuan , Yaojian Lin , Rui Huang
发明人： Byung Tai Do , Heap Hoe Kuan , Yaojian Lin , Rui Huang
IPC分类号： H01L21/30
CPC分类号： H01L24/11 , H01L21/304 , H01L24/13 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/05655 , H01L2224/05666 , H01L2224/1131 , H01L2224/1147 , H01L2224/11472 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13155 , H01L2224/16 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014
摘要： A semiconductor device is made by providing a semiconductor wafer having an active surface, forming an under bump metallization layer on the active surface of the semiconductor wafer, forming a first photosensitive layer on the active surface of the semiconductor wafer, exposing a selected portion of the first photosensitive layer over the under bump metallization layer to light, removing a portion of a backside of the semiconductor wafer, opposite to the active surface, prior to developing the exposed portion of the first photosensitive layer, developing the exposed portion of the first photosensitive layer after removing the portion of the backside of the semiconductor wafer, and depositing solder material over the under bump metallization layer to form solder bumps. The remaining portion of the first photosensitive layer is then removed. A second photosensitive layer or metal stencil can be formed over the first photosensitive layer.
摘要翻译： 通过提供具有活性表面的半导体晶片制造半导体器件，在半导体晶片的有源表面上形成凸起下金属化层，在半导体晶片的有源表面上形成第一感光层，将所选择的部分 在凸起下金属化层之上的第一感光层进行光照射，在显影第一感光层的暴露部分之前，移除与有源表面相对的半导体晶片的背面的一部分，将第一感光层的暴露部分 在去除半导体晶片的背面的部分之后，并且将焊料材料沉积在凸块下金属化层上以形成焊料凸块。 然后除去第一感光层的剩余部分。 可以在第一感光层上形成第二感光层或金属模版。
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9.发明授权Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias 有权形成与通孔通孔互连的嵌入式无源电路元件的半导体器件和方法公开(公告)号：US07859085B2
公开(公告)日：2010-12-28
申请号：US12627884
申请日：2009-11-30
申请人： Reza A. Pagaila , Byung Tai Do , Yaojian Lin
发明人： Reza A. Pagaila , Byung Tai Do , Yaojian Lin
CPC分类号： H01L25/50 , H01L21/568 , H01L21/6835 , H01L21/78 , H01L23/481 , H01L24/19 , H01L24/82 , H01L24/97 , H01L25/16 , H01L2221/68345 , H01L2224/0401 , H01L2224/04105 , H01L2224/05611 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/12105 , H01L2224/24195 , H01L2224/32225 , H01L2224/48091 , H01L2224/48463 , H01L2224/73265 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19015 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/00014 , H01L2224/82 , H01L2924/00012
摘要： A semiconductor die has a first insulating material disposed around a periphery of the die. A portion of the first insulating material is removed to form a through hole via (THV). Conductive material is deposited in the THV. A second insulating layer is formed over an active surface of the die. A first passive circuit element is formed over the second insulating layer. A first passive via is formed over the THV. The first passive via is electrically connected to the conductive material in the THV. The first passive circuit element is electrically connected to the first passive via. A third insulating layer is formed over the first passive circuit element. A second passive circuit element is formed over the third insulating layer. A fourth insulating layer is formed over the second passive circuit element. A plurality of semiconductor die is stacked and electrically interconnected by the conductive via.
摘要翻译： 半导体管芯具有设置在管芯周围的第一绝缘材料。 去除第一绝缘材料的一部分以形成通孔（THV）。 导电材料沉积在THV中。 在模具的有效表面上形成第二绝缘层。 第一无源电路元件形成在第二绝缘层上。 第一个无源通孔形成在THV上。 第一个无源通孔与THV中的导电材料电连接。 第一无源电路元件电连接到第一无源通孔。 在第一无源电路元件上形成第三绝缘层。 在第三绝缘层上形成第二无源电路元件。 在第二无源电路元件上形成第四绝缘层。 多个半导体管芯通过导电通孔堆叠并电连接。
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10.发明申请Semiconductor Device Having Electrical Devices Mounted to IPD Structure and Method of Shielding Electromagnetic Interference 有权具有安装到IPD结构的电气设备的半导体器件和屏蔽电磁干扰的方法公开(公告)号：US20100270661A1
公开(公告)日：2010-10-28
申请号：US12830390
申请日：2010-07-05
申请人： Reza A. Pagaila , Byung Tai Do , Yaojian Lin , Rui Huang
发明人： Reza A. Pagaila , Byung Tai Do , Yaojian Lin , Rui Huang
IPC分类号： H01L23/52
CPC分类号： H01L23/3128 , H01L23/29 , H01L23/3121 , H01L23/552 , H01L24/48 , H01L25/165 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2924/01029 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/1433 , H01L2924/15192 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2224/05599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has an IPD structure formed over a substrate. First and second electrical devices are mounted to a first surface of the IPD structure. An encapsulant is deposited over the first and second electrical devices and IPD structure. A shielding layer is formed over the encapsulant and electrically connected to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.
摘要翻译： 半导体器件具有在衬底上形成的IPD结构。 第一和第二电气装置安装在IPD结构的第一表面上。 密封剂沉积在第一和第二电气设备和IPD结构上。 屏蔽层形成在密封剂之上并电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。
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