公开(公告)号：US07423221B2

公开(公告)日：2008-09-09

申请号：US11517786

申请日：2006-09-08

Applicant: Yoshinari Matsuda

Inventor： Yoshinari Matsuda

IPC: H05K1/16

CPC classification number: H05K3/3452 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09281 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A printed wiring board on which a pattern can be formed favorably by printing and soldering even where a small part of the 1005 size or less is mounted. The printed wiring board includes a substrate; a pair of soldering lands on the substrate, the soldering lands being spaced from one another with a first side of one land opposing a first side of another land; and a mounted part having a pair of electrodes on opposite ends thereof soldered to the respective lands. A wiring line is connected to each soldering land, and an insulating element overlies the wiring lines. The insulating element has openings formed so as to expose the soldering lands therethrough. Wiring line connection elements are individually connected to only the first sides of the lands. Each insulating element opening has an edge positioned outside of the corresponding land and on the inner side of the corresponding wiring line connection element.

Abstract translation: 即使安装有小于1005的小部分，也可以通过印刷和焊接而形成图案的印刷电路板。 印刷线路板包括基板; 在基板上的一对焊接区域，所述焊接区域彼此间隔开，其中一个焊盘的第一面与另一焊盘的第一面相对; 以及其相对端上具有一对电极的安装部分焊接到相应的焊盘。 布线与每个焊接区连接，绝缘元件覆盖在布线上。 绝缘元件具有形成为暴露焊接区域的开口。 连接线连接元件仅分别连接到焊盘的第一侧。 每个绝缘元件开口具有位于对应的焊盘外侧和相应的布线连接元件的内侧的边缘。

公开(公告)号：US20080170378A1

公开(公告)日：2008-07-17

申请号：US11769711

申请日：2007-06-28

Applicant: Cheng-Yi Ou-Yang

Inventor： Cheng-Yi Ou-Yang

IPC: H05K1/02

CPC classification number: H05K1/0237 ,  H05K1/0201 ,  H05K1/0243 ,  H05K1/0298 ,  H05K2201/062 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09972 ,  H05K2203/304

Abstract: A circuit structure includes a circuit board, a first circuit component mounted on the circuit board, and a second circuit component mounted on the circuit board. The first circuit board has a first ground plane layout including at least one ground plane, and a second ground plane layout including at least one ground plane, where the first ground plane layout is not electrically connected to the second ground plane layout within the circuit board. The first circuit component is electrically connected to the first ground plane layout, and the second circuit component is electrically connected to the second ground plane layout.

Abstract translation: 电路结构包括电路板，安装在电路板上的第一电路部件和安装在电路板上的第二电路部件。 第一电路板具有包括至少一个接地平面的第一接地平面布局和包括至少一个接地平面的第二接地平面布局，其中第一接地平面布局不电连接到电路板内的第二接地平面布局 。 第一电路部件电连接到第一接地平面布局，并且第二电路部件电连接到第二接地平面布局。

公开(公告)号：US20080156521A1

公开(公告)日：2008-07-03

申请号：US11960979

申请日：2007-12-20

Applicant: Jun Karasawa ,  Syuji Hiramoto

Inventor： Jun Karasawa ,  Syuji Hiramoto

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/82385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0949 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/0989 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: According to one embodiment, a printed wiring board includes a plurality of pads to which bumps are to be bonded respectively. The pads are each formed with a plurality of conductors, the conductors are separate from each other and correspond to one of the bumps, and the plurality of conductors define a gap therebetween, the gap being capable of receiving part of the one of the bumps.

Abstract translation: 根据一个实施例，印刷布线板包括分别焊接凸块的多个焊盘。 焊盘各自形成有多个导体，导体彼此分离并对应于凸块之一，并且多个导体在其间限定间隙，该间隙能够容纳一个凸块中的一个。

公开(公告)号：US07377033B2

公开(公告)日：2008-05-27

申请号：US11641810

申请日：2006-12-20

Applicant: John M. Lauffer ,  James M. Larnerd ,  Voya R. Markovich

Inventor： John M. Lauffer ,  James M. Larnerd ,  Voya R. Markovich

IPC: H01K3/10

CPC classification number: H01L23/49811 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0256 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4641 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09481 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165 ,  Y10T29/49176 ,  H01L2224/0401

Abstract: A method of making circuitized substrate which includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within a product (e.g., electrical assembly) which includes the substrate as part thereof. An information handling system, e.g., a mainframe computer, which represents one of the products in which the substrate may be utilized, is also provided.

Abstract translation: 一种制造电路化衬底的方法，其包括多个邻接的开放段，其限定导电层内的相对边缘部分以隔离导电层的分离部分，使得该层可用于不同的功能，例如电力和地面 元件，在包括基板作为其一部分的产品（例如，电气组件）内。 还提供了代表其中可以使用衬底的产品之一的信息处理系统，例如主机计算机。

公开(公告)号：US07355125B2

公开(公告)日：2008-04-08

申请号：US11281688

申请日：2005-11-17

Applicant: Wiren D. Becker ,  Bruce J. Chamberlin ,  Roland Frech ,  Andreas Huber ,  George Katopis ,  Erich Klink ,  Andreas Rebmann ,  Thomas-Michael Winkel

Inventor： Wiren D. Becker ,  Bruce J. Chamberlin ,  Roland Frech ,  Andreas Huber ,  George Katopis ,  Erich Klink ,  Andreas Rebmann ,  Thomas-Michael Winkel

IPC: H05K1/03

CPC classification number: H05K1/0262 ,  H05K1/0298 ,  H05K1/141 ,  H05K2201/093 ,  H05K2201/09327 ,  H05K2201/09663

Abstract: The present invention relates to computer hardware design and in particular to a printed circuit board comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In order to provide a printed circuit board having an improved signal return path for basically all relevant signal layers at transitions between card, connector, module and chip while still holding the cross-section structure simple, it is proposed to establish a layer structure whereina) a split voltage plane is located adjacent to one side of one of said reference planes and comprises conducting portions for all of said at least three different voltage levels in respective plane parts, andb) a signal layer being located adjacent to said reference planes.

Abstract translation: 本发明涉及计算机硬件设计，特别是涉及一种印刷电路板，其中印刷电路板包括专用于提供诸如具有至少三个不同参考平面的集成电路的电路板部件的布线。 为了提供一种印刷电路板，其具有改进的信号返回路径，用于基本上在卡，连接器，模块和芯片之间的转变处的所有相关信号层，同时仍然保持横截面结构简单，因此建议建立层结构，其中 ）分裂电压平面位于所述参考平面中的一个的一侧附近，并且包括用于各平面部分中的所有所述至少三个不同电压电平的导电部分，以及b）位于所述参考平面附近的信号层。

公开(公告)号：US20080066951A1

公开(公告)日：2008-03-20

申请号：US11978808

申请日：2007-10-30

Applicant: Joel Goergen

Inventor： Joel Goergen

IPC: H05K1/02

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: A circuit board comprises a center segment distributing power and low-speed signaling, and outer segments for high-speed signaling. The segments use dielectric materials with different dielectric constants, with the outer segments supporting higher-speed signal transmission.

Abstract translation: 电路板包括分配功率和低速信号的中心段，以及用于高速信令的外部段。 这些段使用具有不同介电常数的介电材料，外部段支持更高速度的信号传输。

公开(公告)号：US20080030666A1

公开(公告)日：2008-02-07

申请号：US11833270

申请日：2007-08-03

Applicant: Hideaki Abe ,  Shinji Tanabe ,  Kouichi Inoue ,  Yasuaki Kondo

Inventor： Hideaki Abe ,  Shinji Tanabe ,  Kouichi Inoue ,  Yasuaki Kondo

IPC: H05K1/02 ,  H05K5/02

CPC classification number: H05K3/381 ,  G02F1/13452 ,  G02F2001/133354 ,  H05K1/0269 ,  H05K1/0286 ,  H05K2201/055 ,  H05K2201/09663 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/166 ,  H05K2203/168

Abstract: The present invention can perform, at the time of mounting flexible printed circuit boards on a display substrate, the accurate alignment without wrong mounting. A first alignment mark and a second alignment mark for performing the alignment of a flexible printed circuit board with a display substrate are attached to left and right sides of a group of lines which are formed on the flexible printed circuit board. Further, when at least one of the first alignment mark and the second alignment mark is equally divided into four areas, a shape of the alignment mark in at least one area is a shape obtained by folding back the shape of the alignment mark in other areas.

Abstract translation: 本发明可以在将柔性印刷电路板安装在显示基板上时进行准确的对准而不会错误地安装。 用于执行柔性印刷电路板与显示基板的对准的第一对准标记和第二对准标记被附接到形成在柔性印刷电路板上的一组线的左侧和右侧。 此外，当第一对准标记和第二对准标记中的至少一个被等分成四个区域时，至少一个区域中的对准标记的形状是通过在其它区域中折回对准标记的形状而获得的形状 。

公开(公告)号：US20080002337A1

公开(公告)日：2008-01-03

申请号：US11563158

申请日：2006-11-25

Applicant: SHOU-KUO HSU ,  CHENG-HONG LIU

Inventor： SHOU-KUO HSU ,  CHENG-HONG LIU

IPC: H02B1/00

CPC classification number: H05K1/0216 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09345 ,  H05K2201/09663

Abstract: A printed circuit board includes a first layer including a first power portion and a first ground portion isolated from each other, and a second layer including a second power portion and a second ground portion isolated from each other. The second layer is spaced from the first layer. The second ground portion is arranged below the first power portion. The second power portion is arranged below the first ground portion. One portion of the first power portion overlaps one portion of the second power portion, and one portion of the first ground portion overlaps one portion of the second ground portion to provide a zero-intensity electric field between the first layer and the second layer. The first power portion is coupled to the second power portion via a first via. The first ground portion is coupled to the second ground portion via a second via.

Abstract translation: 印刷电路板包括第一层，第一层包括彼此隔离的第一电力部分和第一接地部分，以及包括彼此隔离的第二电力部分和第二接地部分的第二层。 第二层与第一层间隔开。 第二接地部分布置在第一电力部分的下方。 第二动力部分布置在第一接地部分的下方。 第一功率部分的一部分与第二功率部分的一部分重叠，并且第一接地部分的一部分与第二接地部分的一部分重叠，以在第一层和第二层之间提供零强度电场。 第一功率部分经由第一通孔耦合到第二功率部分。 第一接地部分经由第二通孔耦合到第二接地部分。

公开(公告)号：US20070284727A1

公开(公告)日：2007-12-13

申请号：US11449493

申请日：2006-06-08

Applicant: Chih-Chin Liao ,  Han-Shiao Chen ,  Chin-Tien Chiu ,  Ken Jian Ming Wang ,  Cheemen Yu ,  Hem Takiar

Inventor： Chih-Chin Liao ,  Han-Shiao Chen ,  Chin-Tien Chiu ,  Ken Jian Ming Wang ,  Cheemen Yu ,  Hem Takiar

IPC: H01L23/12 ,  H01L23/48

CPC classification number: H05K1/111 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/181 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/0195 ,  H05K2201/0338 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/10159 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2924/00

Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.

Abstract translation: 公开了具有共同的电连接器和接触焊盘区域的印刷电路板。 迹线和/或通孔所在接触焊盘区域可被蚀刻掉，以确保迹线，通孔和接触焊盘之间的电气隔离。

公开(公告)号：US20070268441A1

公开(公告)日：2007-11-22

申请号：US11650469

申请日：2007-01-08

Applicant: Po-Yuan Liu ,  Chuan-Mau Wei ,  Kuo-Chih Lee

Inventor： Po-Yuan Liu ,  Chuan-Mau Wei ,  Kuo-Chih Lee

IPC: G02F1/1345

CPC classification number: G02F1/13452 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09663 ,  H05K2201/0969

Abstract: A signal transmission assembly includes first and second substrates respectively having first and second electrodes, and a conductive layer disposed between the electrodes. The second electrode has a trench. The conductive layer includes an adhesive and conductive particles distributed therein. The second electrode is electrically connected to the first electrode through the conductive layer, and a portion of the adhesive is filled into the trench. When the assembly is applied to a display device, the first electrode electrically connects a non-display area to a display area of a display panel. When the second electrode and a third electrode at two ends of the second substrate are electrically connected to the first electrode and a third substrate (e.g., a PCB), respectively, a signal may be transmitted from the third substrate to the display area through the second substrate, the second electrode and the first electrode to control the display.

Abstract translation: 信号传输组件包括分别具有第一和第二电极的第一和第二基板以及设置在电极之间的导电层。 第二电极具有沟槽。 导电层包括粘合剂和分布在其中的导电颗粒。 第二电极通过导电层电连接到第一电极，并且一部分粘合剂被填充到沟槽中。 当将组件应用于显示装置时，第一电极将非显示区域电连接到显示面板的显示区域。 当第二电极和第二基板的两端的第三电极分别电连接到第一电极和第三基板（例如，PCB）时，信号可以从第三基板传送到显示区域 第二基板，第二电极和第一电极以控制显示器。