公开(公告)号：US20070039171A1

公开(公告)日：2007-02-22

申请号：US11537754

申请日：2006-10-02

Applicant: Joel Goergen

Inventor： Joel Goergen

IPC: H01R43/00

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: Method and apparatus are disclosed for flow control over Point-to-Point Protocol (PPP) data links. A method of negotiating such flow control between two PPP peers is disclosed, along with methods for operating flow control across a PPP link. In one embodiment, flow control frames carry an IEEE802.3x MAC control frame payload—the PPP implementation repackages such frames as MAC control frames and passes them to a MAC, which performs flow control. In another embodiment, flow control frames allow flow control commands to be applied differently to different service classes such that PPP flow can be controlled on a per-class basis.

Abstract translation: 公开了用于在点对点协议（PPP）数据链路上的流控制的方法和装置。 公开了一种在两个PPP对等体之间协商这种流量控制的方法，以及用于在PPP链路上操作流量控制的方法。 在一个实施例中，流控制帧携带IEEE802.3x MAC控制帧有效载荷 - PPP实现将诸如MAC控制帧的帧重新封装，并将其传递给执行流控制的MAC。 在另一个实施例中，流控制帧允许流控制命令被不同地应用于不同的服务类，使得PPP流可以基于每个级别进行控制。

公开(公告)号：US20060284697A1

公开(公告)日：2006-12-21

申请号：US11446950

申请日：2006-06-05

Applicant: Yu-Hsu Lin ,  Shang-Tsang Yeh ,  Chuan-Bing Li

Inventor： Yu-Hsu Lin ,  Shang-Tsang Yeh ,  Chuan-Bing Li

IPC: H01P5/00

CPC classification number: H01P3/081 ,  H01P3/088 ,  H05K1/0245 ,  H05K1/115 ,  H05K2201/09236 ,  H05K2201/09636

Abstract: A layout configuration of a differential pair for a printed circuit board (PCB) having a signal plane is provided. In a preferred embodiment, the layout configuration comprises: a differential pair on the signal plane; a pair of vias abutting the differential pair, and the pair of vias being mutually dissymmetrical about the differential pair; and a distance between the pair of vias along the differential pair being equal to ½ TV, wherein T is a signal rise time, V is a speed of the signal. Therefore, the layout configuration can meet with the requirements of impedance matching, reduce reflection, and improve signal integrity.

Abstract translation: 提供了具有信号面的印刷电路板（PCB）的差动对的配置结构。 在优选实施例中，布局配置包括：信号平面上的差分对; 邻接差分对的一对通孔，并且该对通孔围绕差动对相互不对称; 并且沿着差分对的一对通孔之间的距离等于1/2电视，其中T是信号上升时间，V是信号的速度。 因此，布局配置可以满足阻抗匹配的要求，减少反射，提高信号完整性。

公开(公告)号：US20060219431A1

公开(公告)日：2006-10-05

申请号：US11341590

申请日：2006-01-30

Applicant: Manabu Yamazaki

Inventor： Manabu Yamazaki

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K1/0251 ,  H05K1/0298 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/09636

Abstract: An electronic circuit in which a return current path can be acquired effectively, in order to realize high speed signal transmission. The electronic circuit has a first signal layer and a second signal layer, connected with a first via, and at least first and second power supply layers and a grounding layer. A second via, which is electrically connected with only one of the power supply layers or the grounding layer, is located adjacent the first via.

Abstract translation: 为了实现高速信号传输，可以有效地获取返回电流路径的电子电路。 电子电路具有与第一通孔连接的第一信号层和第二信号层以及至少第一和第二电源层和接地层。 与仅电源层或接地层中的一个电连接的第二通孔位于第一通孔附近。

公开(公告)号：US06988162B2

公开(公告)日：2006-01-17

申请号：US10068418

申请日：2002-02-05

Applicant: Joel R. Goergen

Inventor： Joel R. Goergen

IPC: G06F13/00

CPC classification number: H05K1/0245 ,  H04Q1/03 ,  H04Q1/10 ,  H04Q1/155 ,  H04Q2201/12 ,  H05K3/4641 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09354 ,  H05K2201/09636

Abstract: A high-speed, high-power modular router is disclosed. As opposed to conventional designs using optical backplane signaling and/or bus bars for power distribution, the disclosed embodiments combine high-power, low-noise power distribution with high-speed signal routing in a common backplane. Disclosed backplane features allow backplane signaling at 2.5 Gbps or greater on electrical differential pairs distributed on multiple high-speed signaling layers. Relatively thick power distribution layers are embedded within the backplane, shielded from the high-speed signaling layers by digital ground layers and other shielding features. A router using such a backplane provides a level of performance and economy that is believed to be unattainable by the prior art.

公开(公告)号：US06787710B2

公开(公告)日：2004-09-07

申请号：US09986282

申请日：2001-11-08

Applicant: Yoshiaki Uematsu ,  Shinji Manabe

Inventor： Yoshiaki Uematsu ,  Shinji Manabe

IPC: H05K111

CPC classification number: H05K1/115 ,  H05K1/0237 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09809 ,  Y10T29/49165

Abstract: In holes formed in a multi-layer wiring board for transmitting differential signals, a first hole is formed, an insulating portion is formed by filling the first hole with an insulating resin, a pair of second holes is formed for transmitting the differential signals to the formed insulating portion, and the pair of second holes is arranged symmetrically each other with respect to a center axis of the first hole for forming a coaxial structure.

Abstract translation: 在形成在用于传输差分信号的多层布线板中的孔中，形成第一孔，通过用绝缘树脂填充第一孔形成绝缘部分，形成一对第二孔，用于将差分信号传输到 形成绝缘部分，并且一对第二孔相对于用于形成同轴结构的第一孔的中心轴线彼此对称地布置。

公开(公告)号：US20040090760A1

公开(公告)日：2004-05-13

申请号：US10239732

申请日：2002-11-13

Inventor： Walter Schmidt

IPC: H05K001/11 ,  H05K001/14

CPC classification number: H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K1/0268 ,  H05K1/0272 ,  H05K1/0274 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K1/144 ,  H05K1/162 ,  H05K1/185 ,  H05K3/005 ,  H05K3/0055 ,  H05K3/0061 ,  H05K3/041 ,  H05K3/046 ,  H05K3/3436 ,  H05K3/368 ,  H05K3/4084 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09636 ,  H05K2201/0969 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2201/10598 ,  H05K2203/0108 ,  H05K2203/0195 ,  H05K2203/0285 ,  H05K2203/095 ,  H05K2203/1189 ,  H05K2203/163 ,  Y02P70/613 ,  H01L2924/00

Abstract: The electrical connecting element includes an essentially stiff core, essentially mechanically stiff and printed circuit boards and/or high density interconnects with conductor paths serving as interconnects. The core includes two parts (1, 3) that can be fixed to each other. Between the two parts, a cavity (101) can be formed. Components (103) producing a lot of heat or requiring protection from environmental influences can be placed in the cavity.

Abstract translation: 电连接元件包括基本上刚性的芯，基本上机械刚性的印刷电路板和/或具有用作互连的导体路径的高密度互连。 核心包括可以彼此固定的两个部分（1,3）。 在两个部分之间，可以形成空腔（101）。 产生大量热量或需要防止环境影响的部件（103）可以放置在空腔中。

公开(公告)号：US06586274B2

公开(公告)日：2003-07-01

申请号：US09944218

申请日：2001-09-04

Applicant: Akihiro Murata

Inventor： Akihiro Murata

IPC: H01L2144

CPC classification number: H01L24/48 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H05K1/056 ,  H05K3/427 ,  H05K3/445 ,  H05K2201/0195 ,  H05K2201/09636 ,  H05K2201/09645 ,  H05K2203/1438 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85399

Abstract: A semiconductor device comprising a substrate including a metal portion and a resin portion and having a plurality of through holes formed in the resin portion, conductive members formed within the through holes, a semiconductor chip attached to one surface of the substrate, and a plurality of solder balls attached to the other surface of the substrate. The semiconductor chip and solder balls are electrically connected through the conductive members.

公开(公告)号：US06506982B1

公开(公告)日：2003-01-14

申请号：US09501596

申请日：2000-02-10

Applicant: Hidetaka Shigi ,  Naoya Kitamura ,  Masashi Nishiki ,  Tetsuya Yamazaki ,  Takehiko Hasebe ,  Masayuki Kyooi ,  Yukio Maeda

Inventor： Hidetaka Shigi ,  Naoya Kitamura ,  Masashi Nishiki ,  Tetsuya Yamazaki ,  Takehiko Hasebe ,  Masayuki Kyooi ,  Yukio Maeda

IPC: H05K111

CPC classification number: H05K3/403 ,  H01L2224/16237 ,  H05K1/056 ,  H05K3/045 ,  H05K3/42 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/09636 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/09854

Abstract: A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows. Subsequently, second windows of a particular shape are provided in regions of layers of the insulating resin filled in the windows, and independent conducting paths are formed through the second windows to extend from front sides of the second windows to back sides thereof. The conducting paths are formed radially to be spaced a substantially equal distance from centers of the respective second windows.

公开(公告)号：US20020187681A1

公开(公告)日：2002-12-12

申请号：US10096087

申请日：2002-03-11

Inventor： Salvatore Brancaleone

IPC: H01R025/00

CPC classification number: H05K1/0245 ,  H01R12/523 ,  H01R13/622 ,  H01R13/746 ,  H01R24/44 ,  H01R24/542 ,  H01R24/56 ,  H01R25/003 ,  H01R2103/00 ,  H01R2107/00 ,  H05K1/0298 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09636 ,  H05K2201/10356

Abstract: A Quadrax to Twinax conversion apparatus includes stacked trace layers of transmission line with a ground plane between the trace layers. Embodiments include trace layers of stripline or microstrip. Orthogonal plated through holes include a diagonal pair of through holes in electrical contact with traces on one of the trace layers and another diagonal pair of through holes in electrical contact with another trace layer. Contact pins extend through these orthogonal plated through holes with one pair of pins making electrical contact with one trace layer and the other pair of pins making electrical contact with another trace layer. The conversion apparatus electrically connects Twinax cables to respectively different trace layers without crossing over or disturbing the relative positions of the Quadrax diagonal pairs for very efficient high-speed data transfer from four wire Quadrax to two wire Twinax cables.

Abstract translation: Quadrax至Twinax转换装置包括在迹线层之间具有接地平面的传输线的堆叠迹线层。 实施例包括带状线或微带的迹线层。 正交电镀通孔包括与其中一个迹线层上的迹线电接触的对角对对的通孔，以及与另一个迹线层电接触的另一对角线对通孔。 接触销通过这些正交电镀通孔延伸，一对引脚与一个迹线层电接触，另一对引脚与另一个迹线层电接触。 转换装置将Twinax电缆电连接到不同的迹线层，而不会跨越或干扰Quadrax对角线对的相对位置，从而从四线Quadrax到两线双绞线电缆进行非常有效的高速数据传输。

公开(公告)号：US20020179332A1

公开(公告)日：2002-12-05

申请号：US09986282

申请日：2001-11-08

Applicant: Mitsubishi Denki Kabushiki Kaisha

Inventor： Yoshiaki Uematsu ,  Shinji Manabe

IPC: H05K003/42

CPC classification number: H05K1/115 ,  H05K1/0237 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09809 ,  Y10T29/49165

Abstract: In holes formed in a multi-layer wiring board for transmitting differential signals, a first hole is formed, an insulating portion is formed by filling the first hole with an insulating resin, a pair of second holes is formed for transmitting the differential signals to the formed insulating portion, and the pair of second holes is arranged symmetrically each other with respect to a center axis of the first hole for forming a coaxial structure.

Abstract translation: 在形成在用于传输差分信号的多层布线板中的孔中，形成第一孔，通过用绝缘树脂填充第一孔形成绝缘部分，形成一对第二孔，用于将差分信号传输到 形成绝缘部分，并且一对第二孔相对于用于形成同轴结构的第一孔的中心轴线彼此对称地布置。