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    RESIN-SEALED ELECTRONIC CONTROLLER AND METHOD OF FABRICATING THE SAME
    181.
    发明申请
    RESIN-SEALED ELECTRONIC CONTROLLER AND METHOD OF FABRICATING THE SAME 有权
    树脂密封电子控制器及其制造方法

    公开(公告)号：US20120300404A1

    公开(公告)日：2012-11-29

    申请号：US13326531

    申请日：2011-12-15

    Applicant: Fumiaki ARIMAI ,  Hiroyoshi NISHIZAKI ,  Shozo KANZAKI

    Inventor： Fumiaki ARIMAI ,  Hiroyoshi NISHIZAKI ,  Shozo KANZAKI

    IPC: H05K7/20 ,  H05K3/30

    CPC classification number: H01L25/165 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49531 ,  H01L23/49575 ,  H01L2224/45124 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K3/284 ,  H05K2201/09972 ,  H05K2201/10924 ,  H05K2203/1316 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/00012

    Abstract: A resin-sealed electronic controller obtained by bonding and fixing a circuit board to a thermally-conductive base plate, and integrating circuit components with a molding resin so as to reduce the size. A base plate includes a first exposed portion, a second exposed portion, and an adjacent flat portion adjacent to a central window hole. First circuit components which are low-heat-generating components with large height are located in the central window hole. Second circuit components which are high-heat-generating components with small height are provided on an area corresponding to the adjacent flat portion. A height dimension of the first circuit components at least partially overlaps a thickness dimension of the base plate, to reduce a total thickness dimension. The high-heat-generating components and the low-heat-generating components being provided separately from each other permits increased mounting density of low-heat-generating components, reducing an area of the circuit board.

    Abstract translation: 一种树脂密封电子控制器，其通过将电路板接合并固定到导热基板，并将电路部件与模制树脂集成以减小尺寸而获得。 基板包括第一暴露部分，第二暴露部分和与中心窗孔相邻的相邻平坦部分。 作为具有高高度的低发热部件的第一电路部件位于中心窗孔中。 在与相邻的平坦部分对应的区域上设置有具有小高度的高发热部件的第二电路部件。 第一电路部件的高度尺寸至少部分地与基板的厚度尺寸重叠，以减小总厚度尺寸。 彼此分开设置的高发热部件和低发热部件允许增加低发热部件的安装密度，减小电路板的面积。

    Electrical junction box for vehicle
    182.
    发明授权
    Electrical junction box for vehicle 有权
    汽车电气接线盒

    公开(公告)号：US08310085B2

    公开(公告)日：2012-11-13

    申请号：US12734230

    申请日：2008-05-27

    Applicant: Yoshiaki Sugimura ,  Tsuyoshi Hosono

    Inventor： Yoshiaki Sugimura ,  Tsuyoshi Hosono

    IPC: B60L1/00 ,  B60L3/00 ,  H02G3/00

    CPC classification number: H05K1/0263 ,  B60R16/0238 ,  B60R16/0239 ,  H05K2201/09972 ,  H05K2201/10053 ,  H05K2201/10303

    Abstract: An object of this invention is to provide an electrical junction box for a vehicle that can effectively restrain a control circuit from being subject to heat adverse effect from to a power distribution circuit, can downsize the whole structure, and can reduce the number of terminals for connecting the circuits to each other. The electrical junction box for a vehicle comprises a power distribution unit for constituting a part of the power distribution circuit, and a circuit board. A board body of the circuit board is divided into a power distribution circuit region Ap and a control circuit region Ac by a border line BL across the circuit board body. The control circuit is incorporated in the control circuit region Ac. The power distribution circuit region Ap is provided with a power distribution circuit having a current specification smaller than that of the power distribution circuit on the power distribution unit.

    Abstract translation: 本发明的目的是提供一种车辆用电接线盒，其能够有效地抑制控制电路受到配电电路的热不利影响，能够实现整体结构的小型化，并且可以减少端子数量 将电路相互连接。 用于车辆的电接线盒包括用于构成配电电路的一部分的配电单元和电路板。 电路板的电路板主体通过跨越电路板主体的边界线BL被分成功率分配电路区域Ap和控制电路区域Ac。 控制电路并入控制电路区域Ac。 配电电路区域Ap具有电力规格小于配电单元上的配电电路的配电电路。

    Circuit Layout of Image Capturing Device
    183.
    发明申请
    Circuit Layout of Image Capturing Device 审中-公开
    图像捕获设备的电路布局

    公开(公告)号：US20120257359A1

    公开(公告)日：2012-10-11

    申请号：US13118056

    申请日：2011-05-27

    Applicant: Yu-Bang Fu

    Inventor： Yu-Bang Fu

    IPC: H05K1/18

    CPC classification number: H05K1/0227 ,  H05K1/0254 ,  H05K2201/09063 ,  H05K2201/09663 ,  H05K2201/09972 ,  H05K2201/10113 ,  H05K2201/10121

    Abstract: A circuit layout of an image capturing device comprises a circuit board, an image capturing circuit, a flashlight circuit and a groove. The circuit board is a multilayered structure. The image capturing circuit is built on the circuit board. The flashlight circuit is built on the circuit board. The groove is formed on the multilayered structure of the circuit board and divides the circuit board into two areas where the image capturing circuit and the flashlight circuit are respectively disposed. The image capturing circuit is located at a first area, and the flash circuit is located at a second area. Therefore, the groove can prevent the interference between the image capturing circuit and the flashlight circuit.

    Abstract translation: 图像捕获装置的电路布局包括电路板，图像捕获电路，手电筒电路和凹槽。 电路板是多层结构。 图像捕获电路构建在电路板上。 手电筒电路内置在电路板上。 凹槽形成在电路板的多层结构上，并将电路板分成两个分别设置有摄像电路和手电筒电路的区域。 图像捕获电路位于第一区域，闪光电路位于第二区域。 因此，凹槽可以防止图像捕获电路和手电筒电路之间的干扰。

    ELECTRICAL ISOLATORS
    184.
    发明申请
    ELECTRICAL ISOLATORS 有权
    电隔离器

    公开(公告)号：US20120230074A1

    公开(公告)日：2012-09-13

    申请号：US13498086

    申请日：2010-09-23

    Applicant: Iain Barnett ,  Jonathan Ephraim David Hurwitz ,  William Michael James Holland

    Inventor： Iain Barnett ,  Jonathan Ephraim David Hurwitz ,  William Michael James Holland

    IPC: H02M7/06

    CPC classification number: H04B3/56 ,  H05K1/0256 ,  H05K1/162 ,  H05K2201/09309 ,  H05K2201/09972

    Abstract: Disclosed is an electrical isolator circuit comprising an input stage comprising first and second inputs, the input stage being configured to receive an input voltage signal; an output stage comprising first and second outputs electrically connected across a load capacitor; and a DC isolator comprising a first capacitor between said first input and said first output and second capacitor between said second input and said second output. The first and second plates of each of the first, second and load capacitors are defined by conductive layers of a printed circuit board and the dielectric of each of the first, second and load capacitors are defined by a non-conducting part of the printed circuit board.

    Abstract translation: 公开了一种电气隔离器电路，包括具有第一和第二输入的输入级，输入级被配置为接收输入电压信号; 输出级包括跨过负载电容器电连接的第一和第二输出; 以及直流隔离器，其包括在所述第一输入和所述第一输出之间的第一电容器和在所述第二输入和所述第二输出之间的第二电容器。 第一，第二和负载电容器中的每一个的第一和第二板由印刷电路板的导电层限定，并且第一，第二和负载电容器中的每一个的电介质由印刷电路的不导电部分限定 板。

    Package having an inner shield and method for making the same
    185.
    发明授权
    Package having an inner shield and method for making the same 有权
    具有内屏蔽的封装及其制造方法

    公开(公告)号：US08247889B2

    公开(公告)日：2012-08-21

    申请号：US12856389

    申请日：2010-08-13

    Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen

    Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen

    IPC: H01L23/552 ,  H01L23/58

    CPC classification number: H05K9/0022 ,  H01L23/552 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/09972 ,  H05K2203/1316 ,  Y10T29/49146 ,  H01L2224/81

    Abstract: The present invention relates to a package having an inner shield and a method for making the same. The package includes a substrate, a plurality of electrical elements, a molding compound, an inner shield and a conformal shield. The electrical elements are disposed on the substrate. The molding compound is disposed on a surface of the substrate, encapsulates the electrical elements, and includes at least one groove. The groove penetrates a top surface and a bottom surface of the molding compound and is disposed between the electrical elements, and there is a gap between a short side of the groove and a side surface of the molding compound. The inner shield is disposed in the groove and electrically connected to the substrate. The conformal shield covers the molding compound and a side surface of the substrate, and electrically connects the substrate and the inner shield. Therefore, the inner shield enables the electrical elements to have low electromagnetic interference and high electromagnetic compatibility.

    Abstract translation: 本发明涉及具有内屏蔽的封装及其制造方法。 封装包括基板，多个电气元件，模塑料，内护罩和保形罩。 电气元件设置在基板上。 模塑料被设置在基板的表面上，封装电气元件，并且包括至少一个凹槽。 凹槽穿过模制化合物的顶表面和底表面并且设置在电气元件之间，并且在凹槽的短边和模塑料的侧表面之间存在间隙。 内屏蔽件设置在凹槽中并电连接到基板。 共形屏蔽覆盖模塑料和基板的侧表面，并且电连接基板和内屏蔽。 因此，内部屏蔽使得电气元件具有低电磁干扰和高电磁兼容性。

    MULTICHIP PACKAGE STRUCTURE USING A CONSTANT VOLTAGE POWER SUPPLY
    187.
    发明申请
    MULTICHIP PACKAGE STRUCTURE USING A CONSTANT VOLTAGE POWER SUPPLY 有权
    使用恒压电源的多芯片封装结构

    公开(公告)号：US20120097997A1

    公开(公告)日：2012-04-26

    申请号：US12979201

    申请日：2010-12-27

    Applicant: Chia-Tin CHUNG ,  Shih-Neng Dai

    Inventor： Chia-Tin CHUNG ,  Shih-Neng Dai

    IPC: H01L27/15

    CPC classification number: H01L33/48 ,  F21K9/00 ,  F21V23/005 ,  F21V29/15 ,  F21Y2105/10 ,  F21Y2113/13 ,  F21Y2115/10 ,  H01L25/167 ,  H01L33/52 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/3025 ,  H05K1/0201 ,  H05K1/0209 ,  H05K2201/09063 ,  H05K2201/09972 ,  H05K2201/10106 ,  H01L2924/00 ,  H01L2924/00014

    Abstract: A multichip package structure includes a substrate unit, a light-emitting unit, a current-limiting unit, a frame unit and a package unit. The substrate unit includes a first chip-placing region and a second chip-placing region. The light-emitting unit includes a plurality of light-emitting chips electrically connected to the first chip-placing region. The current-limiting unit includes at least one current-limiting chip electrically connected to the second chip-placing region and the light-emitting unit. The frame unit includes a first annular colloid frame surrounding the light-emitting chips and a second annular colloid frame surrounding the current-limiting chip. The package unit includes a first package colloid body surrounded by the first annular colloid frame to cover the light-emitting chips and a second package colloid body surrounded by the second annular colloid frame to cover the current-limiting chip.

    Abstract translation: 多芯片封装结构包括基板单元，发光单元，限流单元，框架单元和封装单元。 基板单元包括第一芯片放置区域和第二芯片放置区域。 发光单元包括电连接到第一芯片放置区的多个发光芯片。 限流单元包括电连接到第二芯片放置区域和发光单元的至少一个限流芯片。 框架单元包括围绕发光芯片的第一环形胶体框架和围绕限流芯片的第二环形胶体框架。 封装单元包括由第一环形胶体框架包围以覆盖发光芯片的第一封装胶体体和由第二环形胶体框架包围以覆盖限流芯片的第二封装胶体体。

    OPTICAL-ELECTRICAL WIRING BOARD AND OPTICAL MODULE
    189.
    发明申请
    OPTICAL-ELECTRICAL WIRING BOARD AND OPTICAL MODULE 有权
    光电接线板和光模块

    公开(公告)号：US20120014641A1

    公开(公告)日：2012-01-19

    申请号：US13259460

    申请日：2010-03-30

    Applicant: Maraki Maetani ,  Masahiko Hirose

    Inventor： Maraki Maetani ,  Masahiko Hirose

    IPC: G02B6/12

    CPC classification number: G02B6/43 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01S5/02292 ,  H01S5/183 ,  H05K1/0245 ,  H05K1/0274 ,  H05K3/4644 ,  H05K2201/09672 ,  H05K2201/09972

    Abstract: The invention relates to an optical-electrical wiring board (2) and an optical module (1). The optical-electrical wiring board (2) includes a substrate (8), a dielectric layer (11), first conductive layers (16a) and second conductive layers (16b). The dielectric layer (11) includes a first region (B) and a second region (C). The first region (B) constitutes a plurality of light transmission portions (11B). The second region (C) has a plurality of pairs of conductive layers each having an overlap portion (10) in which one of the plurality of second conductive layers (16b) and one of the plurality of first conductive layers (16a) overlap each other when seen through in a laminated direction (a) of the dielectric layer (11) and the substrate (8).

    Abstract translation: 本发明涉及光电布线板（2）和光模块（1）。 光电布线板（2）包括基板（8），电介质层（11），第一导电层（16a）和第二导电层（16b）。 电介质层（11）包括第一区域（B）和第二区域（C）。 第一区域（B）构成多个光透射部分（11B）。 第二区域（C）具有多个导电层，每对导电层具有重叠部分（10），多个第二导电层（16b）中的一个与多个第一导电层（16a）中的一个彼此重叠 当通过介电层（11）和基板（8）的层叠方向（a）观察时。

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