公开(公告)号：US08975150B2

公开(公告)日：2015-03-10

申请号：US13190052

申请日：2011-07-25

申请人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

发明人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

IPC分类号： H01L21/76 ,  H01L21/683 ,  H01L23/538 ,  H01L23/544 ,  H01L23/00

CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  Y10S438/977 ,  H01L2924/00

摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。

公开(公告)号：US20130237055A1

公开(公告)日：2013-09-12

申请号：US13703430

申请日：2011-06-10

申请人： Takuo Funaya ,  Francois Iker ,  Eric Beyne

发明人： Takuo Funaya ,  Francois Iker ,  Eric Beyne

IPC分类号： H01L21/48

CPC分类号： H01L21/486 ,  H01L21/76802 ,  H01L21/76819 ,  H01L23/522 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02317 ,  H01L2224/02321 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/21 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/24246 ,  H01L2224/245 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/32147 ,  H01L2224/32227 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/3512 ,  H01L2924/00

摘要： According to a method of redistributing a functional element of the present invention, an insulating resin layer is supplied onto a functional element wafer such as an LSI. A portion to be a via hole on an electrode pad of the functional element is filled with a sacrificial layer. The top of the sacrificial layer filled in the via hole is exposed from the insulating layer by grinding or polishing. Therefore, it is possible to prevent breakage of a brittle material such as a low-k material in the functional element, which would be caused by transmission of shearing stress when a conventional pillar or a conventional gold projecting electrode is used. The reliability, the yield, and the level of flatness can be improved by forming an interconnection conductive layer after the flattening process of grinding or polishing. Accordingly, a fine conductive interconnection can be formed.

摘要翻译： 根据本发明的功能元件的再分配方法，将绝缘树脂层供给到诸如LSI的功能元件晶片上。 在功能元件的电极焊盘上作为通孔的部分填充有牺牲层。 填充在通孔中的牺牲层的顶部通过研磨或抛光从绝缘层暴露出来。 因此，可以防止当使用传统的支柱或传统的金投射电极时由功能元件中的低k材料形成的脆性材料的断裂，这是由剪切应力的传递引起的。 通过在研磨或抛光的平坦化处理之后形成互连导电层可以提高可靠性，产量和平坦度。 因此，可以形成精细的导电互连。

公开(公告)号：US20120156453A1

公开(公告)日：2012-06-21

申请号：US13329109

申请日：2011-12-16

申请人： Mario GONZALEZ ,  François Iker ,  Takuo Funaya

发明人： Mario GONZALEZ ,  François Iker ,  Takuo Funaya

IPC分类号： B32B7/02 ,  H01R43/00

CPC分类号： H01L23/5329 ,  H01L21/76829 ,  H01L21/76885 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02321 ,  H01L2224/02331 ,  H01L2224/02333 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03462 ,  H01L2224/03616 ,  H01L2224/05024 ,  H01L2224/05073 ,  H01L2224/05548 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/30105 ,  Y10T29/49117 ,  Y10T428/24942 ,  H01L2924/01022 ,  H01L2924/00

摘要： A method of providing a metal interconnect to second structures embedded in organic dielectric material is disclosed. In one aspect, the method includes obtaining a first structure with second structures, e.g., metal pillars, embedded in organic dielectric material. The method further includes, at least at some locations of the first structure, providing a stiffening layer on top of the organic dielectric material, the stiffening layer having a stiffness higher than the stiffness of the organic dielectric material. The method provides an interconnect structure free from cracks at the interface between the second structures and the organic dielectric material.

摘要翻译： 公开了一种向埋在有机电介质材料中的第二结构提供金属互连的方法。 在一个方面，该方法包括获得嵌入有机电介质材料中的第二结构，例如金属柱。 该方法还包括至少在第一结构的某些位置处，在有机电介质材料的顶部上提供加强层，该加强层的刚度高于有机介电材料的刚度。 该方法提供了在第二结构和有机介电材料之间的界面处没有裂纹的互连结构。

公开(公告)号：US20100237492A1

公开(公告)日：2010-09-23

申请号：US12682369

申请日：2008-10-14

申请人： Hideki Sasaki ,  Daisuke Ohshima ,  Takuo Funaya

发明人： Hideki Sasaki ,  Daisuke Ohshima ,  Takuo Funaya

IPC分类号： H01L23/538 ,  G06F17/50

CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49838 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K3/3436 ,  H01L2224/0401

摘要： The semiconductor device comprises a semiconductor chip and a printed wiring board having a recess in which the semiconductor chip is housed face-down, wherein the printed wiring board comprises multiple wiring layers below a circuit surface of the semiconductor chip on which connection terminals are formed, and the multiple wiring layers include a first wiring layer for forming signal wires, a second wiring layer for forming a ground plane, and a third wiring layer for forming power wires and power BGA and ground BGA pads in sequence from the circuit surface.

摘要翻译： 半导体器件包括半导体芯片和印刷电路板，其具有半导体芯片正面朝下地容纳的凹部，其中印刷布线板包括在其上形成有连接端子的半导体芯片的电路表面下方的多个布线层， 并且多个布线层包括用于形成信号线的第一布线层，用于形成接地面的第二布线层和用于形成电源线的第三布线层，并且从电路表面依次施加电力BGA和接地BGA焊盘。

公开(公告)号：US08450843B2

公开(公告)日：2013-05-28

申请号：US12682369

申请日：2008-10-14

申请人： Hideki Sasaki ,  Daisuke Ohshima ,  Takuo Funaya

发明人： Hideki Sasaki ,  Daisuke Ohshima ,  Takuo Funaya

IPC分类号： H01L23/04 ,  H01L21/00

CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49838 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K3/3436 ,  H01L2224/0401

摘要： The semiconductor device comprises a semiconductor chip and a printed wiring board having a recess in which the semiconductor chip is housed face-down, wherein the printed wiring board comprises multiple wiring layers below a circuit surface of the semiconductor chip on which connection terminals are formed, and the multiple wiring layers include a first wiring layer for forming signal wires, a second wiring layer for forming a ground plane, and a third wiring layer for forming power wires and power BGA and ground BGA pads in sequence from the circuit surface.

摘要翻译： 半导体器件包括半导体芯片和印刷电路板，其具有半导体芯片正面朝下地容纳的凹部，其中印刷布线板包括在其上形成有连接端子的半导体芯片的电路表面下方的多个布线层， 并且多个布线层包括用于形成信号线的第一布线层，用于形成接地面的第二布线层和用于形成电源线的第三布线层，并且从电路表面依次施加电力BGA和接地BGA焊盘。

公开(公告)号：US20090046441A1

公开(公告)日：2009-02-19

申请号：US12160132

申请日：2006-12-20

申请人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

发明人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

IPC分类号： H05K1/11 ,  H05K1/18

CPC分类号： H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49866 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/19041 ,  H05K1/115 ,  H05K1/117 ,  H05K3/20 ,  H05K3/4614 ,  H05K3/4682 ,  H05K3/4694 ,  H05K2201/0272 ,  H05K2201/0352 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2203/0425 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/05599

摘要： A wiring board for mounting semiconductor device, includes at least a dielectric film 1; wirings formed in the dielectric film 1; a plurality of electrode pads provided at front and back surfaces of the dielectric film with their surfaces exposed and at least portions of lateral sides of them buried into the dielectric film; vias connecting the wirings and the electrode pads. At least one via connecting each other the wirings formed in the dielectric film includes second material different from first material forming the vias connecting the wirings and the electrode pads. The wiring board for mounting semiconductor device, is effective for an increase in terminals and finer pitch of terminal intervals due to an improvement in integration, performance or multi-function of semiconductor devices, can mount semiconductor devices especially on both sides of the board at a high density and high accuracy, and furthermore, is excellent in reliability as well.

摘要翻译： 一种用于安装半导体器件的布线板，至少包括电介质膜1; 电介质膜1中形成的布线; 多个电极焊盘，其设置在电介质膜的前表面和后表面，其表面暴露，并且其侧面的至少一部分埋入电介质膜中; 连接布线和电极垫的通孔。 至少一个彼此连接的通孔形成在电介质膜中的布线包括与形成连接布线和电极焊盘的通孔的第一材料不同的第二材料。 用于安装半导体器件的布线板，由于半导体器件的集成度，性能或多功能性的提高，端子间距的增加和端子间隔的更细的间距是有效的，所以可以在半导体器件的两侧特别地安装半导体器件 高密度和高精度，此外，也具有优异的可靠性。

公开(公告)号：US6078123A

公开(公告)日：2000-06-20

申请号：US129539

申请日：1998-08-05

申请人： Kei Tanaka ,  Eiichi Fukiharu ,  Yasunori Tanaka ,  Michinobu Tanioka ,  Kenichi Otake ,  Takuo Funaya

发明人： Kei Tanaka ,  Eiichi Fukiharu ,  Yasunori Tanaka ,  Michinobu Tanioka ,  Kenichi Otake ,  Takuo Funaya

IPC分类号： H01L21/60 ,  G01N29/02 ,  G01N29/24 ,  H01L23/12 ,  H03H9/05 ,  H03H9/64 ,  H01L41/08

CPC分类号： H03H9/059 ,  G01N29/022 ,  G01N29/2462 ,  G01N2291/0423 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701

摘要： A structure for mounting a SAW (Surface Acoustic Wave) device includes photosensitive resin filling a gap between the SAW device and a mounting substrate in the peripheral portion of the SAW device. The entire structure is substantially as small in size as the SAW device and light weight. The photosensitive resin is formed in a region including pads for connection in order to absorb thermal stresses and extraneous forces apt to act on the pads. Second resin may surround the photosensitive resin or may be provided in a laminate structure together with the photosensitive resin so as to enhance a sealing ability. A method of mounting a SAW device is also disclosed.

摘要翻译： 用于安装SAW（表面声波）器件的结构包括在SAW器件的周边部分填充SAW器件和安装衬底之间的间隙的感光树脂。 整个结构的尺寸基本上与SAW器件的尺寸一样小巧且重量轻。 感光性树脂形成在包括用于连接的焊盘的区域中，以便吸收热应力和易于作用在焊盘上的外来力。 第二树脂可以包围感光性树脂，或者可以与感光性树脂一起设置在层叠结构中，从而提高密封性。 还公开了一种安装SAW器件的方法。

公开(公告)号：US08035217B2

公开(公告)日：2011-10-11

申请号：US12135355

申请日：2008-06-09

申请人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

发明人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

IPC分类号： H01L23/12

CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  Y10S438/977 ,  H01L2924/00

摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。

公开(公告)号：US20110155433A1

公开(公告)日：2011-06-30

申请号：US13060990

申请日：2009-08-25

申请人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

发明人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

IPC分类号： H05K1/00 ,  H01K3/10

CPC分类号： H05K1/115 ,  H01L23/145 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/3511 ,  H05K1/0366 ,  H05K1/185 ,  H05K3/4069 ,  H05K3/421 ,  H05K3/424 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09563 ,  H05K2201/09854 ,  H05K2201/2072 ,  Y10T29/49165 ,  H01L2924/00

摘要： A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.

摘要翻译： 布线板通过层叠一个或多个导体布线层和一个或多个绝缘树脂层而构成，并且包括被配置为穿透绝缘树脂层的一个或多个金属通孔，其中金属孔和绝缘树脂层之间的边界面具有 金属通孔和绝缘树脂层彼此接合的凹凸边界横截面结构。

公开(公告)号：US07692297B2

公开(公告)日：2010-04-06

申请号：US11172783

申请日：2005-07-05

申请人： Takashi Miyazaki ,  Takuo Funaya

发明人： Takashi Miyazaki ,  Takuo Funaya

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L21/563 ,  H01L24/13 ,  H01L24/28 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A reliable semiconductor device including support bumps so as to adequately seal the region between the chips is to be provided. The semiconductor device includes a semiconductor chip; a bump formed on an upper face of the semiconductor chip; and a plurality of support bumps formed along a circumference of the region where the bump is provided, formed on the upper face of the semiconductor chip; and a flow path for a sealing resin is provided between the plurality of support bumps, so as to connect the region where the bump is provided and a periphery region of the semiconductor chip.

摘要翻译： 提供包括支撑凸块以便充分密封芯片之间的区域的可靠的半导体器件。 半导体器件包括半导体芯片; 形成在所述半导体芯片的上表面上的凸块; 以及形成在所述半导体芯片的上表面上的沿着设置所述凸块的区域的圆周形成的多个支撑凸块; 并且在多个支撑凸块之间设置用于密封树脂的流动路径，以便连接设置凸点的区域和半导体芯片的外围区域。