公开(公告)号：US20170125513A1

公开(公告)日：2017-05-04

申请号：US15403403

申请日：2017-01-11

申请人： Texas Instruments Incorporated

发明人： Marie DENISON ,  Sameer PENDHARKAR ,  Guru MATHUR

IPC分类号： H01L29/06 ,  H01L21/283 ,  H01L21/324 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L21/225 ,  H01L29/08

CPC分类号： H01L29/7813 ,  H01L21/225 ,  H01L21/283 ,  H01L21/324 ,  H01L21/823487 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/51 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734 ,  H01L29/7809

摘要： A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

公开(公告)号：US09601578B2

公开(公告)日：2017-03-21

申请号：US14511769

申请日：2014-10-10

申请人： GLOBALFOUNDRIES Inc.

发明人： Jerome Ciavatti ,  Yanxiang Liu ,  Vara Govindeswara Reddy Vakada

IPC分类号： H01L29/66 ,  H01L27/108 ,  H01L21/70 ,  H01L29/10 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06

CPC分类号： H01L29/1095 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/66545 ,  H01L29/66712 ,  H01L29/7809 ,  H01L29/7835

摘要： A non-planar lateral drift MOS device eliminates the need for a field plate extension, which reduces gate width. In one example, two sources and two comparatively small gates in a raised structure allow for two channels and a dual current with mirrored flows, each traveling into and downward through a center region of a connecting well that connects the substrate with the drain areas and shallow wells containing the source areas, the current then traveling in opposite directions within the substrate region of the connecting well toward the two drains. The source and drain areas may be separate raised structures or isolated areas of a continuous raised structure.

公开(公告)号：US09570545B2

公开(公告)日：2017-02-14

申请号：US14692768

申请日：2015-04-22

申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

发明人： Yemin Dong ,  Liang Yi ,  Zhanfeng Liu ,  Purakh Raj Verma ,  Ramadas Nambatyathu

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/40 ,  H01L29/08

CPC分类号： H01L29/063 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66704 ,  H01L29/66719 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7813 ,  H01L29/7825

摘要： A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is formed in the trench. First and second diffusion regions are formed. The gate is displaced from the second diffusion region.

摘要翻译： 公开了一种形成装置的方法。 提供了用设备区域定义的衬底。 在沟槽中形成具有栅极电极，第一和第二栅极电介质层的栅极。 沟槽具有上沟槽部分和下沟槽部分。 在沟槽中形成场板。 形成第一和第二扩散区。 栅极从第二扩散区域移位。

公开(公告)号：US09570544B2

公开(公告)日：2017-02-14

申请号：US14975825

申请日：2015-12-20

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Katsushige Yamashita ,  Kenichi Nishimura ,  Atsuya Yamamoto ,  Shigetaka Aoki

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/417 ,  H01L29/732 ,  H01L29/861 ,  H01L29/872 ,  H01L29/08 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H01L29/735

CPC分类号： H01L29/0623 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41708 ,  H01L29/66128 ,  H01L29/66143 ,  H01L29/66272 ,  H01L29/66734 ,  H01L29/732 ,  H01L29/7322 ,  H01L29/735 ,  H01L29/7809 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/8611 ,  H01L29/8725

摘要： A semiconductor device includes: a silicon substrate that includes a high-concentration layer containing first conductivity type impurities; a low-concentration layer formed on the high-concentration layer and containing first conductivity type impurities; a first electrode and a second electrode formed on the low-concentration layer; a vertical semiconductor element that allows current to flow between the second electrode and the high-concentration layer; and a first trench unit that realizes electric connection between the first electrode and the high-concentration layer. The first trench unit consists of first polysilicon containing first conductivity type impurities, and a diffusion layer configured to surround the first polysilicon in a plan view and to contain first conductivity type impurities. The first polysilicon is configured to reach the high-concentration layer by penetrating the low-concentration layer. Respective concentrations of the first conductivity type impurities contained in the first polysilicon and in the diffusion layer are kept constant in a direction from the low-concentration layer to the high-concentration layer.

摘要翻译： 半导体器件包括：硅衬底，其包括含有第一导电型杂质的高浓度层; 形成在高浓度层上并含有第一导电型杂质的低浓度层; 形成在低浓度层上的第一电极和第二电极; 允许电流在第二电极和高浓度层之间流动的垂直半导体元件; 以及实现第一电极和高浓度层之间的电连接的第一沟槽单元。 第一沟槽单元由包含第一导电类型杂质的第一多晶硅和在俯视图中包围第一多晶硅并且包含第一导电类型杂质的扩散层组成。 第一多晶硅被配置为通过穿透低浓度层到达高浓度层。 包含在第一多晶硅中和扩散层中的第一导电类型杂质的各自浓度在从低浓度层到高浓度层的方向上保持恒定。

公开(公告)号：US09525037B2

公开(公告)日：2016-12-20

申请号：US14754636

申请日：2015-06-29

申请人： UNITED MICROELECTRONICS CORPORATION

发明人： Chun-Hong Peng ,  Yu-Hsi Lai

IPC分类号： H01L21/3205 ,  H01L29/423 ,  H01L21/308 ,  H01L21/306 ,  H01L21/311 ,  H01L21/321 ,  H01L21/28 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/4236 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/28035 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/31105 ,  H01L21/32115 ,  H01L29/0653 ,  H01L29/42376 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7813

摘要： A trench gate metal oxide semiconductor field effect transistor includes a substrate and a gate. The substrate has a trench. The trench is extended downwardly from a surface of the substrate. The gate includes an insertion portion and a symmetrical protrusion portion. The insertion portion is embedded in the trench. The symmetrical protrusion portion is symmetrically protruded over the surface of the substrate.

摘要翻译： 沟槽栅极金属氧化物半导体场效应晶体管包括基板和栅极。 衬底具有沟槽。 沟槽从衬底的表面向下延伸。 门包括插入部分和对称的突出部分。 插入部分嵌入沟槽中。 对称的突出部分在衬底的表面上对称地突出。

公开(公告)号：US20160307889A1

公开(公告)日：2016-10-20

申请号：US15197930

申请日：2016-06-30

申请人： Infineon Technologies AG

发明人： Markus Zundel ,  Franz Hirler ,  Norbert Krischke

IPC分类号： H01L27/07 ,  H01L29/66 ,  H01L49/02 ,  H01L29/40 ,  H01L29/78 ,  H01L29/08 ,  H01L21/02 ,  H01L27/06 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/10

CPC分类号： H01L27/0733 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/32105 ,  H01L21/743 ,  H01L21/823437 ,  H01L27/0629 ,  H01L28/40 ,  H01L28/60 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66704 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7823 ,  H01L29/7825 ,  H01L29/945

摘要： A semiconductor component arrangement method includes producing a trench transistor structure including at least one trench disposed in the semiconductor body and at least one gate electrode disposed in the at least one trench. The method also includes producing a capacitor structure comprising an electrode structure disposed in at least one further trench, the electrode structure comprising at least one electrode. The gate electrode and the at least one electrode of the electrode structure are produced by common process steps.

公开(公告)号：US09431491B2

公开(公告)日：2016-08-30

申请号：US14282863

申请日：2014-05-20

申请人： Renesas Electronics Corporation

发明人： Takashi Aoki ,  Takahiro Korenari

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L23/482 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10

CPC分类号： H01L29/41741 ,  H01L23/4824 ,  H01L29/0638 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/42372 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2924/014

摘要： A semiconductor device including an active cell region formed over the surface of a silicon substrate and including a vertical MOSFET, a drain electrode formed over the surface of the silicon substrate and leading out the drain of the vertical MOSFET from the back surface of the silicon substrate, an external drain terminal formed over the drain electrode, and a source electrode formed over the active cell region so as to be opposed to the drain electrode at least along three sides at the periphery of the external drain terminal over the active cell region and connected to the source of the vertical MOSFET.

摘要翻译： 一种半导体器件，包括在硅衬底的表面上形成并包括垂直MOSFET的有源电池区，在硅衬底的表面上形成的漏电极，并从硅衬底的背面导出垂直MOSFET的漏极 形成在漏电极上的外部漏极端子和形成在有源电池区域上的源电极，以便在有源电池区域上至少沿着外部漏极端子周围的三边与漏极电极相对并连接 到垂直MOSFET的源极。

公开(公告)号：US09397163B2

公开(公告)日：2016-07-19

申请号：US14882809

申请日：2015-10-14

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John B. Campi, Jr. ,  Robert J. Gauthier, Jr. ,  Rahul Mishra ,  Souvick Mitra ,  Mujahid Muhammad

IPC分类号： H01L29/78 ,  H01L29/08

CPC分类号： H01L29/7856 ,  B29C37/0025 ,  B29C47/065 ,  B29C47/56 ,  B29K2023/12 ,  B29K2105/16 ,  B29K2507/04 ,  B29K2995/0005 ,  B29K2995/0007 ,  B29L2009/003 ,  B29L2009/005 ,  B29L2031/34 ,  B32B3/08 ,  B32B7/02 ,  B32B27/00 ,  B32B27/08 ,  B32B27/28 ,  B32B27/306 ,  B32B27/308 ,  B32B27/32 ,  B32B27/34 ,  B32B27/36 ,  B32B2262/106 ,  B32B2264/105 ,  B32B2264/12 ,  B32B2270/00 ,  B32B2274/00 ,  B32B2307/202 ,  B32B2307/204 ,  B32B2307/206 ,  B32B2307/518 ,  B32B2307/732 ,  B32B2457/16 ,  H01G4/005 ,  H01G4/14 ,  H01G4/228 ,  H01G4/30 ,  H01G4/33 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823481 ,  H01L21/823493 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/0882 ,  H01L29/0886 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/42392 ,  H01L29/66681 ,  H01L29/66704 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/66795 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7816 ,  H01L29/7825 ,  H01L29/7851 ,  H01L2029/7858

摘要： A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.

摘要翻译： 公开了一种围绕翅片双扩散金属氧化物半导体（DMOS）的器件和制造方法。 该方法包括从衬底形成多个翅片结构。 该方法还包括在衬底内形成第一导电类型和第二导电类型的阱以及多个翅片结构中相应的翅片结构。 该方法还包括在第一鳍片结构的暴露部分上形成源极接触。 该方法还包括在相邻鳍片结构的暴露部分上形成到第一鳍片结构的漏极接触。 该方法还包括在介电填充材料周围形成围绕第一鳍结构并在第一导电类型的阱上延伸的栅极结构。

公开(公告)号：US20160204210A1

公开(公告)日：2016-07-14

申请号：US14993624

申请日：2016-01-12

申请人： Infineon Technologies Austria AG

发明人： Martin Poelzl

IPC分类号： H01L29/40 ,  H01L29/10 ,  H01L29/06 ,  H01L21/02 ,  H01L23/535 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417

CPC分类号： H01L29/404 ,  H01L21/02636 ,  H01L23/535 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/781 ,  H01L29/7816 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a field effect transistor in a semiconductor substrate having a first surface. The field effect transistor includes a first field plate structure and a second field plate structure, each extending in a first direction parallel to the first surface, and gate electrode structures disposed over the first surface and extending in a second direction parallel to the first surface, the gate electrode structures being disposed between the first and the second field plate structures.

摘要翻译： 半导体器件包括具有第一表面的半导体衬底中的场效应晶体管。 场效应晶体管包括第一场板结构和第二场板结构，每个第一场板结构在平行于第一表面的第一方向上延伸，并且栅电极结构设置在第一表面上并且沿平行于第一表面的第二方向延伸， 栅电极结构设置在第一和第二场板结构之间。

公开(公告)号：US09385227B2

公开(公告)日：2016-07-05

申请号：US14027873

申请日：2013-09-16

申请人： MaxPower Semiconductor, Inc.

发明人： Mohamed N. Darwish ,  Jun Zeng

IPC分类号： H01L29/66 ,  H01L29/78

CPC分类号： H01L29/7816 ,  H01L21/26586 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7835 ,  H01L29/78624 ,  H03K17/04106

摘要： Lateral power devices where immobile electrostatic charge is emplaced in dielectric material adjoining the drift region. A shield gate is interposed between the gate electrode and the drain, to reduce the Miller charge. In some embodiments the gate electrode is a trench gate, and in such cases the shield electrode too is preferably vertically extended.