公开(公告)号：US20060097402A1

公开(公告)日：2006-05-11

申请号：US11267707

申请日：2005-11-03

申请人： Han-Ping Pu ,  Chien-Ping Huang

发明人： Han-Ping Pu ,  Chien-Ping Huang

IPC分类号： H01L23/52 ,  H01L23/48

CPC分类号： H01L25/03 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A semiconductor device having a flip-chip package and a method for fabricating the same are provided. A flip-chip package after being tested to be functionally workable is mounted on a carrier and is electrically connected to the carrier by a plurality of first conductive elements, the flip-chip package having a first chip mounted on a substrate in a flip-chip manner. At least a second chip is mounted on the flip-chip package and is electrically connected to the carrier by a plurality of second conductive elements. An encapsulant is formed on the carrier for encapsulating the flip-chip package and the second chip. A plurality of solder balls are implanted on a bottom surface of the carrier, such that the first and second chips can be electrically connected to an external device via the solder balls. The above arrangement can effectively improve the yield of a fabricated product and reduce packaging costs.

摘要翻译： 提供了一种具有倒装芯片封装的半导体器件及其制造方法。 被测试在功能上可操作的倒装芯片封装安装在载体上并且通过多个第一导电元件与载体电连接，该倒装芯片封装具有安装在基板上的倒装芯片 方式。 至少第二芯片安装在倒装芯片封装上，并通过多个第二导电元件与载体电连接。 在载体上形成密封剂，用于封装倒装芯片封装和第二芯片。 在载体的底面上注入多个焊球，使得第一芯片和第二芯片可以经由焊球电连接到外部装置。 上述布置可以有效地提高制成品的产量并降低包装成本。

公开(公告)号：US20050200006A1

公开(公告)日：2005-09-15

申请号：US11126110

申请日：2005-05-09

申请人： Han-Ping Pu ,  Chieng Huang

发明人： Han-Ping Pu ,  Chieng Huang

IPC分类号： H01L21/60 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L23/34

CPC分类号： H01L23/3128 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/3862 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor package and a fabrication method thereof are provided in which a chip is mounted on a substrate, and a dielectric layer is applied over the substrate and chip, with bond fingers formed on the substrate and electric contacts formed on the chip being exposed outside. A metal layer is formed over the dielectric layer and the exposed bond fingers and electric contacts, and patterned to form a plurality of conductive traces that electrically connect the electric contacts of the chip to the bond fingers of the substrate. The conductive traces replace conventional wire bonding technology and thus eliminate the occurrence of wire sweep or short circuits in fabrication processes. Therefore, a low profile chip with a reduced pitch between adjacent electric contacts can be used without being limited to feasibility of the wire bonding technology.

公开(公告)号：US06943439B2

公开(公告)日：2005-09-13

申请号：US10116204

申请日：2002-04-04

申请人： Chien-Ping Huang ,  Han-Ping Pu ,  Chih-Chin Liao

发明人： Chien-Ping Huang ,  Han-Ping Pu ,  Chih-Chin Liao

IPC分类号： H01L21/48 ,  H01L23/498 ,  H01L23/544 ,  H05K1/02 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  H01L23/02 ,  H01L23/48 ,  H01L23/495 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/85 ,  H01L21/4846 ,  H01L22/34 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/48 ,  H01L2224/8501 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K1/0269 ,  H05K3/242 ,  H05K3/28 ,  H05K3/3489 ,  H05K2201/09781 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A substrate and a fabrication method thereof are proposed, with at least a check point being formed on the substrate. Prior to wire bonding and/or molding processes, cleanness of the substrate (cleaned by plasma) is determined according to color variation of the check point, so as to allow only cleaned and contamination-free substrates to be subsequently formed with bonding wires and encapsulants thereon. Thereby, qualities of wire-bonded electrical connection and encapsulant adhesion for the substrate can be assured, which helps prevent the occurrence of delamination between the encapsulant and the substrate. Moreover, the check point formed on the substrate is made during general substrate fabrication by using current equipment and technique, and in a manner as not to interfere with trace routability on the substrate; thereby, costs and complexity of substrate fabrication would not undesirably increased.

摘要翻译： 提出了一种基板及其制造方法，至少在基板上形成检查点。 在引线接合和/或模制工艺之前，根据检查点的颜色变化确定基材的清洁度（通过等离子体清洁），以便仅使用清洁和无污染的基材随后用接合线和密封剂形成 上。 因此，可以确保线接合电连接的质量和用于衬底的密封剂附着性，这有助于防止密封剂和衬底之间的分层的发生。 此外，通过使用当前的设备和技术，在通常的基板制造中形成的检查点，并且以不干扰基板上的迹线布线性的方式进行; 因此，衬底制造的成本和复杂性将不会不期望地增加。

公开(公告)号：US06830957B2

公开(公告)日：2004-12-14

申请号：US10452488

申请日：2003-05-30

申请人： Han-Ping Pu ,  Chien-Ping Huang ,  Chih-Ming Huang

发明人： Han-Ping Pu ,  Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L2144

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3128 ,  H01L2224/16 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of fabricating BGA (Ball Grid Array) packages is proposed, which utilizes a specially-designed carrier to serve as an auxiliary tool to package semiconductor chips on substrates. The carrier is formed with a plurality of cavities respective for receiving a substrate and in communication with an injection gate, such that no injection gate is required on the substrate, thereby not restricting the trace routability on the substrate. Moreover, a two-piece type of mold is allowed being used to form a number of encapsulation bodies at one time, making the fabrication more productive and cost-effective. Furthermore, the proposed BGA fabrication method can be implemented without having to provide an air outlet in the substrate but allows the resulted encapsulation body to be free of voids to assure the quality of the packages. The proposed BGA fabrication method is therefore more advantageous to use than the prior art.

摘要翻译： 提出了一种制造BGA（球栅阵列）封装的方法，该封装采用专门设计的载体作为将半导体芯片封装在衬底上的辅助工具。 载体形成有多个腔体，分别用于接收衬底并与注入栅极连通，使得在衬底上不需要注入栅极，从而不限制衬底上的迹线布线性。 此外，允许两件式的模具一次用于形成多个包封体，使得制造更加生产和成本有效。 此外，可以实现所提出的BGA制造方法，而不必在衬底中提供空气出口，但是允许所得到的封装体没有空隙以确保包装的质量。 因此，提出的BGA制造方法比现有技术更有利于使用。

公开(公告)号：US06621150B1

公开(公告)日：2003-09-16

申请号：US10193530

申请日：2002-07-10

申请人： Yvonne Lee ,  Chien-Ping Huang ,  Han-Ping Pu

发明人： Yvonne Lee ,  Chien-Ping Huang ,  Han-Ping Pu

IPC分类号： H01L23495

CPC分类号： H01L23/4951 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00

摘要： Conventional configuration of a lead frame, particularly a lead frame in a Lead-on-Chip package, is substituted by one having inward ends of leads thereof arranged in unprecedented ways, resulting in bigger gap between any two adjacent inward ends of inner leads, leading to bigger Inner Lead Pitch of a lead frame in which the space available is inherently limited. It is by the new configuration that an IC packaging process can be immunized against the difficulty resulting from too small Inner Lead Pitch of a lead frame, and the bottle neck in the process of packaging an IC subject to the tendency of minimizing the size of an IC can thus be overcome.

摘要翻译： 引线框架，特别是芯片上封装的引线框架的传统结构被以前所未有的方式布置的引线框架的内端置换为引线框架，导致内引线的任何两个相邻内端之间的间隙较大 到引脚框架的较大的内引脚间距，其中可用的空间固有地受到限制。 通过新的配置，IC封装过程可以免受针脚引起的内部引线间距太小的困难，并且在封装IC的过程中瓶颈处于使IC的尺寸最小化的趋势 因此可以克服IC。

公开(公告)号：US06610560B2

公开(公告)日：2003-08-26

申请号：US09854303

申请日：2001-05-11

申请人： Han-Ping Pu ,  Yu-Po Wang ,  Caesar Lin

发明人： Han-Ping Pu ,  Yu-Po Wang ,  Caesar Lin

IPC分类号： H01L2144

CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L21/565 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/0401 ,  H01L2924/00012

摘要： A semiconductor packaging technology is proposed for the fabrication of a chip-on-chip (COC) based multi-chip module (MCM) with molded underfill. The proposed semiconductor packaging technology is characterized by the provision of a side gap of an empirically-predetermined width between the overlying chips mounted through COC technology over an underlying chip to serve as an air vent during molding process. This allows the injected molding material to flow freely into the flip-chip undergaps during molding process. In actual application, the exact width of the side gap is empirically predetermined through molded-underfill simulation experiments to find the optimal value. Based on experimental data, it is found that this side gap width should be equal to or less than 0.3 mm to allow optimal underfill effect. The optimal value for this side gap width may be varied for different package specifications.

公开(公告)号：US06451625B1

公开(公告)日：2002-09-17

申请号：US09760440

申请日：2001-01-13

申请人： Han-Ping Pu ,  Tzong-Da Ho

发明人： Han-Ping Pu ,  Tzong-Da Ho

IPC分类号： H01L2144

CPC分类号： H01L21/563 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of fabricating a FCBGA (Flip-Chip Bal-Grid-Array) package with molded underfill is proposed, which is characterized by the forming of a mold-buffering opening in the solder mask at the exit of the vent hole in the substrate, wherein the mold-buffering opening is dimensioned to be greater in width than the inside diameter of the vent hole, so that during molding process when the encapsulation material infiltrates to the exit of the vent hole, it can be confined within the mold-buffering opening, thereby preventing it from flashing to nearby solder-ball pads. Since there would substantially exist no mold flash over the exposed surface of the solder mask and the solder-ball pads, the resulted FCBGA package would be assured in the quality of its outer appearance and the bonding between the solder-ball pads and the subsequently attached solder balls thereon.

摘要翻译： 提出了一种制造具有模制底部填充物的FCBGA（倒装芯片平行栅格阵列）封装的方法，其特征在于在衬底中的通气孔的出口处在焊料掩模中形成模具缓冲开口， 其特征在于，所述模具缓冲口的尺寸设定为比所述通气孔的内径大的宽度，使得在所述密封材料渗透到所述通气孔的出口的成型工序中，所述密封材料可以被限制在所述模具缓冲开口 从而防止其闪烁到附近的焊球垫。 由于在焊接掩模和焊球垫的暴露表面上基本上不存在模具闪光，所以将确保所得到的FCBGA封装的外观质量和焊球垫与随后附着的粘合 焊球上。

公开(公告)号：US06350669B1

公开(公告)日：2002-02-26

申请号：US09699888

申请日：2000-10-30

申请人： Han-Ping Pu ,  Chien-Ping Huang

发明人： Han-Ping Pu ,  Chien-Ping Huang

IPC分类号： H01L2144

CPC分类号： H01L24/11 ,  H01L21/4846 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/14505 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2224/05599

摘要： A method is proposed for bonding a BGA (Ball Grid Array) package to a circuit board without causing the collapsing of the BGA package against the circuit board. The proposed method is characterized in the use of two groups of solder balls of different reflow collapse degrees, which are arranged in an interspersed manner among each other in the ball grid array. In one embodiment, the first group of solder balls are homogenously made of a solder material of a specific melting point; and the second group of solder balls each include an outer portion and a core portion, with the outer portion having substantially the same melting point as the first group of solder balls, and the core portion being greater in melting point than the outer portion. In another embodiment, the second group of solder balls are greater in melting point than the first group of solder balls. During the solder-reflow process, when the first group of solder balls are entirely melted, the second group of solder balls are only partly melted or entirely unmelted and thus are capable of providing a solid support to the BGA package to prevent the collapsing of BGA package against circuit board.

摘要翻译： 提出了一种用于将BGA（球栅阵列）封装结合到电路板而不引起BGA封装相对于电路板折叠的方法。 所提出的方法的特征在于使用不同回流塌陷度的两组焊球，其在球栅阵列中以散布的方式相互排列。 在一个实施例中，第一组焊球由具有特定熔点的焊料均质地制成; 并且第二组焊球各自包括外部部分和芯部分，外部部分具有与第一组焊球基本相同的熔点，并且芯部分的熔点大于外部部分。 在另一个实施例中，第二组焊球的熔点高于第一组焊球。 在焊料回流工艺期间，当第一组焊球完全熔化时，第二组焊球仅部分熔化或完全未熔化，因此能够为BGA封装提供固体支撑以防止BGA的塌陷 封装电路板。

公开(公告)号：US09159686B2

公开(公告)日：2015-10-13

申请号：US13443556

申请日：2012-04-10

申请人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

发明人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

IPC分类号： H01L23/00 ,  H01L23/488

CPC分类号： H01L24/13 ,  H01L23/488 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10125 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings.

摘要翻译： 半导体管芯包括在凸块下金属化（UBM）层上的裂纹阻挡层。 裂缝止动器为具有至少两个开口的中空圆筒形状。

公开(公告)号：US09064881B2

公开(公告)日：2015-06-23

申请号：US12944453

申请日：2010-11-11

申请人： Tsung-Fu Tsai ,  Yian-Liang Kuo ,  Ming-Song Sheu ,  Yu-Ling Tsai ,  Chen-Shien Chen ,  Han-Ping Pu

发明人： Tsung-Fu Tsai ,  Yian-Liang Kuo ,  Ming-Song Sheu ,  Yu-Ling Tsai ,  Chen-Shien Chen ,  Han-Ping Pu

IPC分类号： H01L23/29 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L21/78 ,  H01L21/02013 ,  H01L21/02016 ,  H01L21/563 ,  H01L23/295 ,  H01L23/562 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81009 ,  H01L2224/81191 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2924/10156 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/10155 ,  H01L2924/00

摘要： A die has a first surface, a second surface opposite the first surface, and sidewalls includes a first portion and a second portion, wherein the first portion is closer to the first surface than the second portion. A fillet contacts the first portion of sidewalls of the die and encircles the die. A work piece is bonded to the die through solder bumps, with the second surface facing the work piece. A first underfill is filled a gap between the die and the work piece, wherein the first underfill contacts the fillet, and wherein the first underfill and the fillet are formed of different materials.

摘要翻译： 模具具有第一表面，与第一表面相对的第二表面，并且侧壁包括第一部分和第二部分，其中第一部分比第二部分更靠近第一表面。 圆角接触模具的侧壁的第一部分并且环绕模具。 工件通过焊料凸块与模具结合，第二表面面向工件。 第一底部填充物填充模具和工件之间的间隙，其中第一底部填充物接触圆角，并且其中第一底部填充物和圆角由不同的材料形成。