公开(公告)号：US20130154078A1

公开(公告)日：2013-06-20

申请号：US13325359

申请日：2011-12-14

申请人： DaeSik Choi ,  JoungIn Yang ,  MinJung Kim ,  KyungEun Kim

发明人： DaeSik Choi ,  JoungIn Yang ,  MinJung Kim ,  KyungEun Kim

IPC分类号： H01L23/36 ,  H01L21/56

CPC分类号： H01L23/36 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/1815

摘要： A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit over a package carrier; mounting a conductive connector over the package carrier; forming an encapsulation over the integrated circuit, the encapsulation having a recess exposing the conductive connector; and mounting a heat slug over the encapsulation, the heat slug having an opening with an opening width greater than a recess width of the recess, the opening exposing a portion of a top surface of the encapsulation.

摘要翻译： 集成电路封装系统的制造方法包括：将集成电路安装在封装载体上; 将导电连接器安装在封装载体上; 在所述集成电路上形成封装，所述封装具有露出所述导电连接器的凹部; 并且将热块安装在所述封装件上，所述热芯块具有开口宽度大于所述凹部的凹陷宽度的开口，所述开口暴露所述封装的顶部表面的一部分。

公开(公告)号：US20130075915A1

公开(公告)日：2013-03-28

申请号：US13243474

申请日：2011-09-23

申请人： DaeSup Kim ,  YoungJoon Kim ,  DaeSik Choi

发明人： DaeSup Kim ,  YoungJoon Kim ,  DaeSik Choi

IPC分类号： H01L23/48 ,  H01L21/50 ,  H01L21/56

CPC分类号： H01L25/065 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16057 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/92225 ,  H01L2224/92242 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting an integrated circuit structure on the first substrate; mounting a second substrate on the integrated circuit structure; coupling a vertical chip to the first substrate and to the second substrate; and forming a package body for encapsulating the integrated circuit structure, the vertical chip, and a portion of the second substrate.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供第一基板; 在第一基板上安装集成电路结构; 将第二基板安装在所述集成电路结构上; 将垂直芯片耦合到第一基板和第二基板; 以及形成用于封装所述集成电路结构，所述垂直芯片和所述第二基板的一部分的封装体。

公开(公告)号：US20130069224A1

公开(公告)日：2013-03-21

申请号：US13235135

申请日：2011-09-16

申请人： Oh Han Kim ,  Ki Youn Jang ,  DaeSik Choi ,  DongSoo Moon

发明人： Oh Han Kim ,  Ki Youn Jang ,  DaeSik Choi ,  DongSoo Moon

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73209 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/82

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a routable layer having a column; mounting an integrated circuit structure in direct contact with the column; and forming a gamma connector to electrically connect the column to the integrated circuit structure.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有列的可布线层; 安装与柱直接接触的集成电路结构; 以及形成伽马连接器以将该列电连接到集成电路结构。

公开(公告)号：US08367467B2

公开(公告)日：2013-02-05

申请号：US12764805

申请日：2010-04-21

申请人： KiYoun Jang ,  DaeSik Choi ,  OhHan Kim ,  DongSoo Moon

发明人： KiYoun Jang ,  DaeSik Choi ,  OhHan Kim ,  DongSoo Moon

IPC分类号： H01L21/60

CPC分类号： H01L21/4853 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81413 ,  H01L2224/81416 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method of making a semiconductor device that has a flipchip semiconductor die and substrate. A first insulating layer is formed over the substrate. A via is formed through the first insulating layer. Conductive material is deposited in the via to form a conductive pillar or stacked stud bumps. The conductive pillar is electrically connected to a conductive layer within the substrate. A second insulating layer is formed over the first insulating layer. Bump material is formed over the conductive pillar. The bump material is reflowed to form a bump. The first and second insulating layers are removed. The semiconductor die is mounted to the substrate by reflowing the bump to a conductive layer of the die. The semiconductor die also has a third insulating layer formed over the conductive layer and an active surface of the die and UBM formed over the first conductive layer and third insulating layer.

摘要翻译： 一种制造半导体器件的方法，所述半导体器件具有倒装芯片半导体管芯和衬底。 在衬底上形成第一绝缘层。 通过第一绝缘层形成通孔。 导电材料沉积在通孔中以形成导电柱或堆叠的柱状凸块。 导电柱与衬底内的导电层电连接。 在第一绝缘层上形成第二绝缘层。 凸起材料形成在导电柱上。 凸块材料被回流以形成凸块。 去除第一和第二绝缘层。 半导体管芯通过将凸块回流到管芯的导电层而安装到衬底上。 半导体管芯还具有形成在导电层上的第三绝缘层和形成在第一导电层和第三绝缘层上的管芯和UBM的有源表面。

公开(公告)号：US20120319300A1

公开(公告)日：2012-12-20

申请号：US13161368

申请日：2011-06-15

申请人： Oh Han Kim ,  Yong Hee Kang ,  DaeSik Choi

发明人： Oh Han Kim ,  Yong Hee Kang ,  DaeSik Choi

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/13 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a substrate with a projection formed along a perimeter of a first surface of the substrate; mounting an integrated circuit over the first surface; forming a protruding interconnect over the first surface between the projection and the integrated circuit; and forming an underfill between the integrated circuit and the projection with a uniform height, the uniform height of the underfill less than a height of the projection.

摘要翻译： 一种集成电路封装系统的制造方法，包括：向衬底提供沿衬底的第一表面的周边形成的突起; 在第一表面上安装集成电路; 在所述突起和所述集成电路之间的所述第一表面上形成突出的互连; 并且在集成电路和突起之间以均匀的高度形成底部填充物，底部填充物的均匀高度小于突起的高度。

公开(公告)号：US20120319266A1

公开(公告)日：2012-12-20

申请号：US13597086

申请日：2012-08-28

申请人： Soo-San Park ,  Sang-Ho Lee ,  DaeSik Choi

发明人： Soo-San Park ,  Sang-Ho Lee ,  DaeSik Choi

IPC分类号： H01L23/36 ,  H01L21/60 ,  H01L21/56

CPC分类号： H01L21/565 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a package carrier having a dispense port; attaching an integrated circuit to the package carrier and over the dispense port; placing a mold chase over the integrated circuit and on the package carrier, the mold chase having a hole; and forming an encapsulation through the dispense port or the hole, the encapsulation surrounding the integrated circuit including completely filled in a space between the integrated circuit and the package carrier, and in a portion of the hole, the encapsulation having an elevated portion or a removal surface resulting from the elevated portion detached.

摘要翻译： 一种制造集成电路封装系统的方法，包括：提供具有分配端口的封装载体; 将集成电路附接到包装载体和分配端口上; 将模具放置在集成电路上和封装载体上，模具具有孔; 并且通过所述分配端口或所述孔形成封装，所述集成电路周围的封装包括完全填充在所述集成电路和所述封装载体之间的空间中，并且在所述孔的一部分中，所述封装具有升高部分或去除 由升高的部分分离而产生的表面。

公开(公告)号：US20120217629A1

公开(公告)日：2012-08-30

申请号：US13035617

申请日：2011-02-25

申请人： SungWon Cho ,  JoonYoung Choi ,  DaeSik Choi

发明人： SungWon Cho ,  JoonYoung Choi ,  DaeSik Choi

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L21/56

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68336 ,  H01L2224/02371 ,  H01L2224/02379 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06182 ,  H01L2224/08145 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/214 ,  H01L2224/221 ,  H01L2224/24011 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/06524 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/01082 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81805 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via.

摘要翻译： 半导体器件具有载体。 包括半导体管芯的半导体晶片被安装到载体上，半导体管芯的有源表面背离载体。 在半导体管芯的有源表面上形成多个凸点。 在半导体管芯的周围形成开口。 在载体和半导体管芯上，在开口中并围绕多个凸块沉积密封剂，使得多个凸块的暴露部分没有密封剂。 导电通孔通过密封剂形成在开口内，并延伸到载体。 导电层形成在密封剂上方并电连接到多个凸块的导电通孔和暴露部分。 移除载体以露出导电通孔的一端。

公开(公告)号：US08232141B2

公开(公告)日：2012-07-31

申请号：US13080070

申请日：2011-04-05

申请人： DaeSik Choi ,  JoHyun Bae ,  Junghoon Shin

发明人： DaeSik Choi ,  JoHyun Bae ,  Junghoon Shin

IPC分类号： H01L21/00 ,  H01L23/02 ,  H01L23/48

CPC分类号： H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a conductive pillar, having substantially parallel vertical sides, in direct contact with the substrate; mounting an integrated circuit to the substrate beside a conductive pillar location; and encapsulating the integrated circuit with an encapsulation having a top surface formed for the conductive pillar to extend beyond.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供基板; 形成具有与基板直接接触的基本平行的垂直边的导电柱; 在导电柱位置旁边的基板上安装集成电路; 并且封装具有用于导电柱形成的顶表面的封装的集成电路延伸超过。

公开(公告)号：US20120146235A1

公开(公告)日：2012-06-14

申请号：US12964617

申请日：2010-12-09

申请人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

发明人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

IPC分类号： H01L23/50 ,  H01L21/50

CPC分类号： H01L23/49816 ,  H01L21/4832 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48248 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/85001 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1011 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming an outer contact pad having an outer pad top side; mounting an integrated circuit above the outer pad top side; forming an encapsulation having an encapsulation top side and an encapsulation bottom side, the encapsulation over the integrated circuit with the encapsulation bottom side coplanar with the outer pad top side; and forming a vertical interconnect through the encapsulation, the vertical interconnect having an interconnect bottom side directly on the outer pad top side and an interconnect top side exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外垫顶侧的外接触垫; 在外垫顶侧上安装集成电路; 形成具有封装顶侧和封装底侧的封装，所述封装在所述集成电路上，所述封装底侧与所述外焊盘顶侧共面; 并且通过封装形成垂直互连，垂直互连具有直接在外焊盘顶侧上的互连底侧和从封装暴露的互连顶侧。

公开(公告)号：US20120119345A1

公开(公告)日：2012-05-17

申请号：US12946841

申请日：2010-11-15

申请人： SungWon Cho ,  DaeSik Choi ,  HyungSang Park

发明人： SungWon Cho ,  DaeSik Choi ,  HyungSang Park

IPC分类号： H01L23/538 ,  H01L21/50

CPC分类号： H01L25/0655 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49833 ,  H01L24/05 ,  H01L24/16 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/1064 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base bottom side and a base top side; mounting an integrated circuit perpendicular to the base top side, the integrated circuit having a first conductor partially exposed at a first end facing and connected to the base top side; and forming an encapsulation over the integrated circuit.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有基底侧和基底侧的基底基板; 安装垂直于基底侧的集成电路，所述集成电路具有在面向并连接到所述基底侧的第一端部分地露出的第一导体; 并在集成电路上形成封装。