公开(公告)号：US20090203170A1

公开(公告)日：2009-08-13

申请号：US11914416

申请日：2006-03-30

Applicant: Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu

Inventor： Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC: H01L21/60 ,  B23P19/00

CPC classification number: H01L21/563 ,  H01L21/67103 ,  H01L21/67126 ,  H01L23/3135 ,  H01L24/11 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81121 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0126 ,  H05K2203/082 ,  Y02P70/613 ,  Y10T29/53183 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/0665 ,  H01L2924/0695 ,  H01L2224/05599

Abstract: A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder powder in a solder resin composition (216) formed of solder powder (214) and a resin (215) is melted, supplying the solder resin composition (216) by a capillary phenomenon, and curing the resin (215), wherein the melted solder powder (214) in the solder resin composition (216) is moved through the predetermined gap across which the circuit board (213) and the semiconductor chip (206) are held, and self-assembled and grown, whereby the connection terminals (211) and the electrode terminals (207) are connected to each other electrically. According to this configuration, a flip chip mounting method having high productivity and reliability, which enables a next generation semiconductor chip to be mounted on a circuit board, a mounted body thereof, and a mounting apparatus thereof are provided.

Abstract translation: 一种倒装芯片安装方法，包括保持电路板（213）和半导体芯片（206），使电路板（213）与半导体芯片（206）保持一定间隔，同时将电路板（213）加热 ）或半导体芯片（206）的温度升高到由焊料粉末（214）和树脂（215）形成的焊料树脂组合物（216）中的焊料粉末熔化的温度，通过毛细管 现象，固化树脂（215），其中焊料树脂组合物（216）中的熔融焊料粉末（214）移动通过保持电路板（213）和半导体芯片（206）的预定间隙， 并且自组装和生长，由此连接端子（211​​）和电极端子（207）彼此电连接。 根据该结构，提供了一种能够将下一代半导体芯片安装在电路板上的高生产率和可靠性的倒装芯片安装方法及其安装体及其安装装置。

公开(公告)号：US07561437B2

公开(公告)日：2009-07-14

申请号：US11160393

申请日：2005-06-22

Applicant: Liang-Ming Yu ,  Chien-Lung Tsou ,  Hsin-Li Lin ,  Yuming Liu

Inventor： Liang-Ming Yu ,  Chien-Lung Tsou ,  Hsin-Li Lin ,  Yuming Liu

IPC: H05K7/00

CPC classification number: H05K1/18 ,  H05K1/0271 ,  H05K3/305 ,  H05K3/3442 ,  H05K2201/09418 ,  H05K2201/10522 ,  H05K2201/10537 ,  H05K2201/10636 ,  H05K2201/10651 ,  H05K2201/10977 ,  H05K2201/2045 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic element module and an electronic device using the same are provided. The electronic element module includes a circuit board and a plurality of electronic elements. In one embodiment, the circuit board has a plurality of leg-holes. Each of the electronic elements includes a body and a plurality of legs that connected to the body. Wherein, the bodies of the electronic elements are glued each other, and the legs of the electronic elements are partially plugged in the leg-holes. In another one embodiment, the circuit board has a plurality of contacts. The electronic element is disposed on the circuit board with a gap therebetween. The electronic element has a plurality of terminals that electrically connect to the contacts of the circuit board correspondingly. Otherwise, the gap is filled with glue.

Abstract translation: 提供一种电子元件模块和使用其的电子装置。 电子元件模块包括电路板和多个电子元件。 在一个实施例中，电路板具有多个腿孔。 每个电子元件包括主体和连接到主体的多个腿。 其中，电子元件的主体彼此粘合，并且电子元件的腿部分地插入到腿孔中。 在另一个实施例中，电路板具有多个触点。 电子元件设置在电路板上，其间具有间隙。 电子元件具有多个端子，其相应地电连接到电路板的触头。 否则，缝隙填充胶水。

公开(公告)号：US07557452B1

公开(公告)日：2009-07-07

申请号：US09590646

申请日：2000-06-08

Applicant: Vernon M. Williams ,  Ford B. Grigg ,  Bret K. Street

Inventor： Vernon M. Williams ,  Ford B. Grigg ,  Bret K. Street

IPC: H01L23/48 ,  H01L21/00

CPC classification number: H01L21/00 ,  B33Y30/00 ,  B33Y80/00 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L24/81 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/10126 ,  H01L2224/11554 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K3/12 ,  H05K3/321 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10977 ,  H05K2203/0594 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A conductive structure configured to connect a contact pad of a semiconductor device with a corresponding contact pad of a substrate. The conductive structure includes two interconnectable members, one securable to each of the corresponding contact pads. Each member includes a dielectric jacket having an aperture that laterally confines conductive material of a conductive center thereof over the contact pad to which the member is secured. The conductive center of a female member of the conductive structure only partially fills the aperture of the jacket thereof so as to form a receptacle for an end of the male member of the conductive structure. One or both of the male and female members may also be configured to limit the insertion of the male member into the receptacle of the female member. The members of the conductive structure may be preformed structures which are attached to a surface of a semiconductor device or other substrate. Alternatively, the members can be fabricated on the surface of the semiconductor device or other substrate. A stereolithographic method of fabricating at least the jackets of the members is disclosed. The stereolithographic method may include use of a machine vision system including at least one camera operably associated with a computer controlling a stereolithographic application of material so that the system may recognize the position and orientation of a semiconductor device or other substrate on which a member of the conductive structure is to be fabricated. Methods of connecting a semiconductor device with another substrate are also disclosed, as are assemblies including the conductive structures.

Abstract translation: 导电结构，其被配置为将半导体器件的接触焊盘与衬底的相应接触焊盘相连接。 导电结构包括两个互连构件，一个可连接到每个对应的接触垫。 每个构件包括具有孔的电介质护套，所述孔侧向地将导电中心的导电材料限定在该构件所固定的接触垫上。 导电结构的阴构件的导电中心仅部分地填充其护套的孔，以形成用于导电结构的阳构件的端部的插座。 阳构件和阴构件中的一个或两个也可以构造成限制将阳构件插入到阴构件的容座中。 导电结构的构件可以是附接到半导体器件或其他衬底的表面的预成型结构。 或者，可以在半导体器件或其他衬底的表面上制造构件。 公开了至少制造构件的夹套的立体光刻方法。 立体光刻方法可以包括使用机器视觉系统，该机器视觉系统包括与控制材料的立体光刻应用的计算机可操作地相关联的至少一个相机，使得系统可以识别半导体器件或其它基板的位置和取向， 要制造导电结构。 还公开了将半导体器件与另一衬底连接的方法，以及包括导电结构的组件。

公开(公告)号：US20090166064A1

公开(公告)日：2009-07-02

申请号：US12161907

申请日：2007-01-31

Applicant: Hidenobu Nishikawa ,  Daido Komyoji

Inventor： Hidenobu Nishikawa ,  Daido Komyoji

IPC: H05K1/00 ,  B32B37/00

CPC classification number: H05K3/321 ,  G06K19/07749 ,  H01L21/6835 ,  H01L23/49855 ,  H01L24/11 ,  H01L24/12 ,  H01L24/28 ,  H01L24/29 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1134 ,  H01L2224/1182 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29036 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/90 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/14 ,  H05K1/189 ,  H05K3/305 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2201/10984 ,  Y10T29/49002 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/05599

Abstract: The invention includes: applying an anisotropic conductive resin including conductive particles only to a plurality of bumps of an electronic component; placing the electronic component above a main surface of a flexible wiring board via the anisotropic conductive resin; and pressurizing the electronic component to the wiring board and curing the anisotropic conductive resin applied to the plurality of bumps to join the plurality of bumps to the electrodes of the wiring board. This can prevent a defective mounting of the electronic component.

Abstract translation: 本发明包括：将仅包含导电颗粒的各向异性导电树脂施加到电子部件的多个凸块; 通过各向异性导电树脂将电子部件放置在柔性布线板的主表面上方; 并将所述电子部件加压到所述布线基板，并固化施加到所述多个凸块的各向异性导电树脂，以将所述多个凸块接合到所述布线板的电极。 这可以防止电子部件的安装不良。

公开(公告)号：US07547968B2

公开(公告)日：2009-06-16

申请号：US11434745

申请日：2006-05-17

Applicant: Takahiro Sugimura ,  Satoshi Imasu ,  Norihiko Sugita ,  Takafumi Betsui

Inventor： Takahiro Sugimura ,  Satoshi Imasu ,  Norihiko Sugita ,  Takafumi Betsui

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/1005 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/1517 ,  H01L2924/15311 ,  H05K1/141 ,  H05K1/181 ,  H05K2201/068 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49128 ,  Y10T29/53178 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2924/0695

Abstract: The reliability of a semiconductor device which has the semiconductor components which were mounted on the same surface of the same substrate via the bump electrodes with which height differs, and with which package structure differs is improved. Semiconductor component 2 of WPP structure is mounted on the main surface of the interposer substrate which forms a semiconductor device via a plurality of bump electrodes. Semiconductor component 3 of CSP structure is mounted on the main surface of an interposer substrate via a plurality of bump electrodes with larger diameter and contiguity pitch than the above-mentioned bump electrode. And under-filling 4a and 4b mutually different, are filled up between the facing surfaces of this interposer substrate and semiconductor components 2 , and between the facing surfaces of the interposer substrate and semiconductor components 3, respectively.

Abstract translation: 具有半导体元件的半导体器件的可靠性提高了通过高度不同的突起电极安装在同一基板的同一表面上的半导体器件的可靠性。 WPP结构的半导体部件2通过多个凸块电极安装在形成半导体器件的插入器基板的主表面上。 CSP结构的半导体部件3通过多个比上述凸起电极具有更大的直径和邻接间距的凸起电极安装在插入基片的主表面上。 并且相互不同的不充分的4a和4b分别填充在该插入器基板和半导体部件2的相对表面之间以及插入器基板和半导体部件3的相对表面之间。

公开(公告)号：US07537961B2

公开(公告)日：2009-05-26

申请号：US11683612

申请日：2007-03-08

Applicant: Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Susumu Sawada

IPC: H01L21/00

CPC classification number: H05K3/3484 ,  B23K1/0016 ,  B23K35/025 ,  B23K35/262 ,  B23K35/264 ,  B23K35/268 ,  B23K35/3613 ,  C22C11/00 ,  C22C12/00 ,  C22C13/00 ,  H01L24/11 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/83855 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/323 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/29311 ,  H01L2924/00014 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2924/05442 ,  H01L2924/05432 ,  H01L2224/16225

Abstract: The present invention provides a conductive resin composition for connecting electrodes electrically, in which metal particles are dispersed in a flowing medium, wherein the flowing medium includes a first flowing medium that has relatively high wettability with the metal particles and a second flowing medium that has relatively low wettability with the metal particles, and the first flowing medium and the second flowing medium are dispersed in a state of being incompatible with each other. Thereby, a flip chip packaging method that can be applied to flip chip packaging of LSI and has high productivity and high reliability is provided.

Abstract translation: 本发明提供一种导电树脂组合物，用于电连接电极，其中金属颗粒分散在流动介质中，其中流动介质包括与金属颗粒相比具有较高润湿性的第一流动介质和具有相对较高的第二流动介质 与金属颗粒的低润湿性，以及第一流动介质和第二流动介质在彼此不相容的状态下分散。 因此，提供了可以应用于LSI的倒装芯片封装并且具有高生产率和高可靠性的倒装芯片封装方法。

公开(公告)号：US20090117757A1

公开(公告)日：2009-05-07

申请号：US12063600

申请日：2005-09-28

Applicant: Hiroyuki Suzuki

Inventor： Hiroyuki Suzuki

IPC: H01R12/00 ,  B23P19/00

CPC classification number: H05K3/361 ,  H05K3/305 ,  H05K3/328 ,  H05K2201/091 ,  H05K2201/10977 ,  H05K2203/0113 ,  H05K2203/0278 ,  Y10T29/53283

Abstract: An object of the invention is to provide a connecting structure of circuit boards in which whether or not the circuit boards have been favorably connected can be more easily judged as compared with the prior art, even in case where connecting portions have been connected with pressure by arranging the connecting portions face to face, a connecting method of the circuit boards, and a compressing tool for connecting the circuit boards. A connecting structure 10 of circuit boards includes a first circuit board 11 and a second circuit board 12. A first connecting portion 17 of the first circuit board and a second connecting portion 21 of the second circuit board are arranged face to face interposing an adhesive 13, and clamped by a compressing tool 25 so that circuit patterns 16, 19 may be brought into contact with each other, whereby the first connecting portion 17 and the second connecting portion 21 will be connected with heat and pressure. In this connecting structure 10 of the circuit boards, a pair of unbonded parts 35 are formed in a compressing region 34 of a soft substrate 18 with which an upper compressing tool 26 is adapted to be contacted.

Abstract translation: 本发明的目的是提供一种电路板的连接结构，其中与现有技术相比，电路板是否被有利地连接在一起可以更容易地判断，即使在连接部分已经被压力连接的情况下 将连接部分面对面地布置，电路板的连接方法以及用于连接电路板的压缩工具。 电路板的连接结构体10包括第一电路板11和第二电路板12.第一电路板的第一连接部分17和第二电路板的第二连接部分21面对面设置粘合剂13 并且被压缩工具25夹紧，使得电路图案16,19可以彼此接触，由此第一连接部分17和第二连接部分21将被连接到热和压力上。 在这种电路板的连接结构10中，在柔性基板18的压缩区域34中形成一对未连接部分35，上压缩工具26适于与该基板接触。

公开(公告)号：US20090117688A1

公开(公告)日：2009-05-07

申请号：US11887332

申请日：2006-03-16

Applicant: Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

Inventor： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

IPC: H01L21/02

CPC classification number: H05K3/3484 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/742 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/11849 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/16505 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/29347 ,  H01L2224/294 ,  H01L2224/29411 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/742 ,  H01L2224/75 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83204 ,  H01L2224/83211 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/301 ,  H01L2924/30105 ,  H01L2924/381 ,  H05K3/323 ,  H05K2201/10977 ,  H05K2203/0425 ,  H05K2203/087 ,  H05K2203/1178 ,  Y10T156/1744 ,  H01L2924/00011 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.

Abstract translation: 提供一种适用于下一代LSI的倒装芯片安装以及高生产率和可靠性以及凸块形成方法的倒装芯片安装方法。 在包含焊料粉末16和气泡生成剂的树脂14被供给到具有多个连接端子11的电路板21和具有多个电极端子12的半导体芯片20之间的空间的情况下，加热树脂14 从包含在树脂14中的气泡发生剂产生气泡30.树脂14通过其生长被推向产生的气泡30的外部，并且在连接端子11和电极端子12之间自组装。 通过进一步加热树脂14并熔化包含在树脂14中的自组装在端子之间的焊料粉末16，在端子之间形成连接器22以完成倒装芯片安装体。

公开(公告)号：US20090116203A1

公开(公告)日：2009-05-07

申请号：US12261368

申请日：2008-10-30

Applicant: Koso MATSUNO ,  Hidenori MIYAKAWA ,  Shigeaki SAKATANI

Inventor： Koso MATSUNO ,  Hidenori MIYAKAWA ,  Shigeaki SAKATANI

IPC: H05K7/00 ,  H05K1/03

CPC classification number: H05K3/3436 ,  H01L24/16 ,  H01L2224/10175 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/30105 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3489 ,  H05K2201/09036 ,  H05K2201/09781 ,  H05K2201/09809 ,  H05K2201/0989 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613

Abstract: A mounting structure is provided that can suppress flux from spreading, secure a connecting strength between a circuit board and an electronic component with underfill, and achieve a stable electrical connection between lands and terminals. The mounting structure is configured with a flat electronic component and a circuit board, and a plurality of lands provided on the undersurface of the electronic component and a plurality of terminals provided on the mounting surface of the circuit board so as to correspond to the plurality of lands are bonded with solder. The circuit board includes a means for holding flux separated from the solder in the proximity of at least one of the plurality of terminals.

Abstract translation: 提供了一种可以抑制磁通扩散的安装结构，通过底部填充确保电路板和电子部件之间的连接强度，并实现焊盘和端子之间的稳定的电连接。 安装结构具有扁平的电子部件和电路板，以及设置在电子部件的下表面上的多个焊盘以及设置在电路基板的安装面上的多个端子，以对应于多个 焊盘用焊料粘合。 电路板包括用于保持在焊料分离的焊剂在至少一个端子附近的装置。

公开(公告)号：US07528488B2

公开(公告)日：2009-05-05

申请号：US11494708

申请日：2006-07-28

Applicant: Isao Tsukagoshi ,  Yasushi Gotou ,  Masami Yusa ,  Yasuo Miyadera

Inventor： Isao Tsukagoshi ,  Yasushi Gotou ,  Masami Yusa ,  Yasuo Miyadera

IPC: H01L23/52

CPC classification number: H05K3/323 ,  B32B7/12 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83851 ,  H05K3/305 ,  H05K3/321 ,  H05K3/325 ,  H05K2201/0329 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/1189 ,  Y10T428/12569 ,  Y10T428/2852 ,  Y10T428/287 ,  Y10T428/2891

Abstract: The present invention relates to a method for connecting electrodes comprising: interposing the polyphthalide represented by the formula (I): wherein R represents a divalent aromatic hydrocarbon group or a divalent heteroring-containing aromatic group, R1 represents an alkyl group, a fluorinated alkyl group, an alkoxy group or a halogen atom, where the number of R1 is 0 to 4, X represents O or N—R3, provided that R3 represents one of the following groups, Y represents SO2 or Co and n represents a number of repeating units in the polymer, as a pressure-sensitive conductive polymer at least partially between electrodes opposed to each other; and applying a pressure to fix the both electrodes, a surface-treated wiring board comprising polyphthalide represented by the formula (I) formed on at least part of the surface of the electrode part, an adhesive film comprising an adhesive and polyphthalide represented by the formula (I), and an electrode-connected structure using the same.

Abstract translation: 本发明涉及一种电极连接方法，其特征在于，包括：插入由式（I）表示的多苯酞：其中R表示二价芳族烃基或含二价杂芳基的芳族基团，R 1表示烷基，氟化烷基 R 1为0〜4的烷氧基或卤素原子，X表示O或N-R 3，条件是R 3表示以下基团之中，Y表示SO 2或Co，n表示重复单元数 在聚合物中，作为至少部分地彼此相对的电极之间的压敏导电聚合物; 并且施加压力以固定两个电极，包括形成在电极部分的至少一部分表面上的由式（I）表示的多苯酞的表面处理的布线板，包含由式（I）表示的粘合剂和多苯酞的粘合剂膜 （I），以及使用其的电极连接结构。