公开(公告)号：US08781779B2

公开(公告)日：2014-07-15

申请号：US13673111

申请日：2012-11-09

Applicant: Formfactor, Inc.

Inventor： Richard James Casler, Jr. ,  Fenglei Du ,  Stephen Craig Fullerton

IPC: G01C3/00

CPC classification number: G05B13/048 ,  G01R31/2891 ,  H01L22/20

Abstract: An improved method and apparatus for automatically aligning probe pins to the test or bond pads of semiconductor devices under changing conditions. In at least one embodiment, a dynamic model is used to predict an impact of changing conditions to wafer probing process. This reduces the need for frequent measurements and calibrations during probing and testing, thereby increasing the number of dice that can be probed and tested in a given period of time and increasing the accuracy of probing at the same time. Embodiments of the present invention also make it possible to adjust positions of probe pins and pads in response to the changing conditions while they are in contact with each other.

Abstract translation: 一种改进的方法和装置，用于在变化的条件下将探针引脚自动对准半导体器件的测试或接合焊盘。 在至少一个实施例中，使用动态模型来预测改变条件对晶片探测过程的影响。 这减少了在探测和测试期间频繁测量和校准的需要，从而增加了在给定时间段内可以探测和测试的骰子的数量，同时提高了探测的准确性。 本发明的实施例还使得可以在彼此接触的同时响应于变化条件来调整探针和焊盘的位置。

公开(公告)号：US20140139250A1

公开(公告)日：2014-05-22

申请号：US13681967

申请日：2012-11-20

Applicant: FORMFACTOR, INC.

Inventor： Onnik Yaglioglu ,  Benjamin N. Eldridge ,  Alexander Slocum

IPC: G01R1/073

CPC classification number: B82Y30/00 ,  G01R1/06744 ,  G01R1/07314

Abstract: Electrically conductive columns of intertwined carbon nanotubes embedded in a mass of material flexible, resilient electrically insulating material can be used as electrically conductive contact probes. The columns can extend between opposing sides of the mass of material. Terminals of a wiring substrate can extend into the columns and be electrically connected to an electrical interface to a tester that controls testing of a device under test. A pair of physically interlocked structures can coupling the mass of material to the wiring substrate. The pair can include a receptacle and a protrusion.

Abstract translation: 嵌入质量柔软，有弹性的电绝缘材料的缠绕在一起的碳纳米管的导电柱可用作导电接触探针。 柱可以在材料块的相对侧之间延伸。 布线基板的端子可以延伸到列中并且电连接到电连接到测试器的电接口，该测试器控制被测器件的测试。 一对物理互锁的结构可以将材料质量耦合到布线基板。 该对可以包括容器和突起。

公开(公告)号：US20130271175A1

公开(公告)日：2013-10-17

申请号：US13856091

申请日：2013-04-03

Applicant: FORMFACTOR, INC.

Inventor： Shawn Powell

IPC: G01R1/073

CPC classification number: G01R1/07378 ,  G01R1/07342 ,  G01R3/00 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16225 ,  H05K1/0268 ,  H05K1/115 ,  H05K3/4038

Abstract: A probe card assembly and associated processes of forming them may include a wiring substrate with a first surface and an opposite surface, an electrically conductive first via comprising electrically conductive material extending into the wiring substrate from the opposite surface and ending before reaching the first surface, and a plurality of electrically conductive second vias, and a custom electrically conductive terminal disposed on the first surface such that said custom terminal covers the first via and contacts one of the second vias adjacent to said first via without electrically contacting the first via. Each of the second vias may be electrically conductive from the first surface to the opposite surface. The first via may include electrically insulating material disposed within a hole in the first via.

Abstract translation: 探针卡组件及其相关联的工艺可以包括具有第一表面和相对表面的布线基板，导电的第一通孔包括从相对表面延伸到布线基板中并在到达第一表面之前结束的导电材料， 以及多个导电的第二通孔以及设置在所述第一表面上的定制导电端子，使得所述定制端子覆盖所述第一通孔，并接触与所述第一通孔相邻的所述第二通孔中的一个，而不与所述第一通孔电接触。 每个第二通孔可以从第一表面到相对表面导电。 第一通孔可以包括设置在第一通孔中的孔内的电绝缘材料。

公开(公告)号：US20130169301A1

公开(公告)日：2013-07-04

申请号：US13732922

申请日：2013-01-02

Applicant: FormFactor, Inc.

Inventor： Keith J. Breinlinger ,  Kevin J. Hughes ,  Russell Newstrom

IPC: G01R1/067

CPC classification number: G01R1/06705 ,  G01R1/0675 ,  G01R1/07314 ,  G01R1/07357

Abstract: The elongated body of an electrically conductive contact probe can be disposed in a guide hole and can include a patterned region for engaging and riding on a contact region of an inner sidewall of the guide hole as the elongated body moves in the guide hole in response to a force on a tip of the probe. As the patterned region rides the contact region, the tip moves in a lateral pattern that is a function of the surface(s) of the patterned region.

Abstract translation: 导电接触探针的细长体可以设置在引导孔中，并且可以包括图案化区域，用于当细长体在引导孔中移动时接合和骑在引导孔的内侧壁的接触区域上，以响应于 探针尖端的力。 当图案区域绕着接触区域时，尖端以横向图案移动，该横向图案是图案化区域的表面的函数。

公开(公告)号：US20130135001A1

公开(公告)日：2013-05-30

申请号：US13681896

申请日：2012-11-20

Applicant: FormFactor, Inc.

Inventor： Keith J. Breinlinger

IPC: G01R1/067 ,  G01R1/073

CPC classification number: G01R1/067 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/2889

Abstract: An electrical connection between an electrically conductive probe on one device and a compliant pad on another device can be formed by piercing the compliant pad with the probe. The probe can contact multiple electrically conductive elements inside the pad and thereby electrically connect to the pad at multiple locations inside the pad.

Abstract translation: 一个器件上的导电探针与另一器件上的柔性焊盘之间的电连接可以通过用探针刺穿柔性焊盘来形成。 探头可以接触焊盘内的多个导电元件，从而在焊盘内的多个位置处电连接到焊盘。

公开(公告)号：US20040247920A1

公开(公告)日：2004-12-09

申请号：US10456343

申请日：2003-06-06

Applicant: FormFactor, Inc.

Inventor： Michael Armstrong ,  Gayle Herman ,  Greg Omweg ,  Ravindra V. Shenoy

IPC: H01F003/00 ,  B05B001/00 ,  C09D005/00 ,  C25D003/00

CPC classification number: C25D3/54 ,  Y10T428/12 ,  Y10T428/24612 ,  Y10T428/265

Abstract: A halide based stress reducing agent is added to the bath of a rhodium plating solution. The stress reducing agent reduces stress in the plated rhodium, increasing the thickness of the rhodium that can be plated without cracking. In addition, the stress reducing agent does not appreciably decrease the wear resistance or hardness of the plated rhodium.

Abstract translation: 将卤化物基应力降低剂加入到镀铑溶液的浴中。 减压剂可减少电镀铑中的应力，增加可镀而不开裂的铑的厚度。 此外，应力降低剂不会显着降低镀覆铑的耐磨性或硬度。

公开(公告)号：US20040201391A1

公开(公告)日：2004-10-14

申请号：US10832899

申请日：2004-04-27

Applicant: FormFactor, Inc.

Inventor： Charles A. Miller

IPC: G01R001/00

CPC classification number: G01R1/07378 ,  G01R3/00 ,  G01R31/2889 ,  G01R31/31723 ,  G01R31/318511 ,  G01R31/31905 ,  G01R31/31926 ,  Y10T29/49082 ,  Y10T29/49126 ,  Y10T29/4913

Abstract: A probe card provides signal paths between integrated circuit (IC) tester channels and probes accessing input and output pads of ICs to be tested. When a single tester channel is to access multiple (N) IC pads, the probe card provides a branching path linking the channel to each of the N IC input pads. Each branch of the test signal distribution path includes a resistor for isolating the IC input pad accessed via that branch from all other branches of the path so that a fault on that IC pad does not substantially affect the voltage of signals appearing on any other IC pad. When a single tester channel is to monitor output signals produced at N IC pads, the resistance in each branch of the signal path linking the pads of the tester channel is uniquely sized to that the voltage of the input signal supplied to the tester channel is a function of the combination of logic states of the signals produced at the N IC pads. The tester channel measures the voltage of its input signal so that the logic state of the signals produced at each of the N IC output pads can be determined from the measured voltage.

公开(公告)号：US20040201074A1

公开(公告)日：2004-10-14

申请号：US10410948

申请日：2003-04-10

Applicant: FormFactor, Inc.

Inventor： Igor Y. Khandros ,  Charles A. Miller ,  Stuart W. Wenzel

IPC: H01L031/00

CPC classification number: H05K3/4007 ,  H01L24/13 ,  H01L24/72 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/73251 ,  H01L2224/81901 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01R12/57 ,  H01R43/007 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09909 ,  Y10T29/49147 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A microelectronic spring contact for making electrical contact between a device and a mating substrate and method of making the same are disclosed. The spring contact has a compliant pad adhered to a substrate of the device and spaced apart from a terminal of the device. The compliant pad has a base adhered to the substrate, and side surfaces extending away from the substrate and tapering to a smaller end area distal from the substrate. A trace extends from the terminal of the device over the compliant pad to its end area. At least a portion of the compliant pad end area is covered by the trace, and a portion of the trace that is over the compliant pad is supported by the compliant pad. A horizontal microelectronic spring contact and method of making the same are also disclosed. The horizontal spring contact has a rigid trace attached at a first end to a terminal of a substrate. The trace is free from attachment at its second end, and extends from the terminal in a direction substantially parallel to a surface of the substrate to/the second end. At least a distal portion of the trace extending to the second end is spaced apart from the surface of the substrate. The spaced-apart distal portion is flexible in a plane parallel to the substrate.

Abstract translation: 公开了一种用于在器件和匹配衬底之间进行电接触的微电子弹簧触点及其制造方法。 弹簧触点具有粘附到装置的基板并与装置的端子间隔开的柔性衬垫。 柔性衬垫具有粘附到衬底的基底，以及远离衬底延伸的侧表面，并且逐渐变细到远离衬底的较小端部区域。 迹线从器件的端子通过柔性焊盘延伸到其端部区域。 柔性焊盘端部区域的至少一部分被迹线覆盖，并且位于柔性焊盘上方的迹线的一部分由柔性焊盘支撑。 还公开了一种水平微电子弹簧触头及其制造方法。 水平弹簧触点具有在第一端附接到基板的端子的刚性迹线。 该迹线在其第二端处没有附着，并且从基板平行于基板的表面的方向从端子延伸到第二端。 至少延伸到第二端的迹线的远端部分与衬底的表面间隔开。 间隔开的远侧部分在平行于基底的平面中是柔性的。

公开(公告)号：US20040152348A1

公开(公告)日：2004-08-05

申请号：US10749028

申请日：2003-12-30

Applicant: FormFactor, Inc.

Inventor： David V. Pedersen ,  Benjamin N. Eldridge ,  Igor Y. Khandros

IPC: H05K001/00

CPC classification number: H01L25/16 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/0408 ,  G01R1/0433 ,  G01R1/06711 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/01 ,  G01R31/2863 ,  G01R31/2886 ,  G01R31/2889 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/04 ,  H01L23/13 ,  H01L23/32 ,  H01L23/49811 ,  H01L23/5385 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L2223/54473 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/19043 ,  H05K1/141 ,  H05K3/20 ,  H05K3/325 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/09472 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/48

Abstract: Products and assemblies are provided for socketably receiving elongate interconnection elements, such as spring contact elements, extending from electronic components, such as semiconductor devices. Socket substrates are provided with capture pads for receiving ends of elongate interconnection elements extending from electronic components. Various capture pad configurations are disclosed. Connections to external devices are provided via conductive traces adjacent the surface of the socket substrate. The socket substrate may be supported by a support substrate. In a particularly preferred embodiment the capture pads are formed directly on a primary substrate such as a printed circuit board.

Abstract translation: 提供产品和组件用于可插拔地接收从电子部件（例如半导体器件）延伸的细长互连元件，例如弹簧接触元件。 插座基板设置有用于接收从电子部件延伸的细长互连元件的端部的捕获垫。 公开了各种捕获垫结构。 通过邻近插座基板表面的导电迹线提供与外部设备的连接。 插座基板可以由支撑基板支撑。 在特别优选的实施例中，捕获垫直接形成在诸如印刷电路板的主要基底上。

公开(公告)号：US20040140860A1

公开(公告)日：2004-07-22

申请号：US10749546

申请日：2003-12-29

Applicant: FormFactor, Inc.

Inventor： Charles A. Miller

IPC: H01L027/10 ,  H01P005/02

CPC classification number: H01L23/60 ,  H01L23/5227 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. The inductances of the conductors and various capacitances of the interconnect system are also appropriately adjusted to optimize desired interconnect system frequency response characteristics.