公开(公告)号：US20140327133A1

公开(公告)日：2014-11-06

申请号：US14269209

申请日：2014-05-05

申请人： HIMAX TECHNOLOGIES LIMITED

发明人： Chiu-Shun Lin

IPC分类号： H01L21/768 ,  H01L29/43 ,  H01L23/00

CPC分类号： H01L29/43 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/13006 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/13552 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01074

摘要： A metal bump structure for use in a driver IC includes a metal bump disposed on a matrix, an optional capping layer disposed on the metal bump to completely cover the metal bump and a protective layer disposed on the metal bump to completely cover and protect the metal bump or the optional capping layer and so that the metal bump is not exposed to an ambient atmosphere. The protective layer or the optional capping layer may have a fringe disposed on the matrix.

摘要翻译： 用于驱动器IC的金属凸块结构包括设置在基体上的金属凸块，设置在金属凸块上以完全覆盖金属凸块的可选顶盖层以及设置在金属凸块上以完全覆盖和保护金属的保护层 凸起或可选的封盖层，并且使得金属凸块不暴露于环境大气中。 保护层或可选的覆盖层可以具有设置在基体上的边缘。

公开(公告)号：US08779604B1

公开(公告)日：2014-07-15

申请号：US14073040

申请日：2013-11-06

申请人： Chipmos Technologies Inc.

发明人： Shih Jye Cheng ,  Tung Bao Lu

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L23/485 ,  H01L23/498

CPC分类号： H01L21/4825 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05027 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/8159 ,  H01L2224/8169 ,  H01L2224/81744 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/0655 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/1146

摘要： A semiconductor structure includes a device, a conductive pad on the device, and a Ag1-xYx alloy bump over the conductive pad. The Y of the Ag1-xYx bump comprises metals forming complete solid solution with Ag at arbitrary weight percentage, and the X of the Ag1-xYx alloy bump is in a range of from about 0.005 to about 0.25. A difference between one standard deviation and a mean value of a grain size distribution of the Ag1-xYx alloy bump is in a range of from about 0.2 μm to about 0.4 μm. An average grain size of the Ag1-xYx alloy bump on a longitudinal cross sectional plane is in a range of from about 0.5 μm to about 1.5 μm.

摘要翻译： 半导体结构包括器件，器件上的导电焊盘和导电焊盘上的Ag1-xYx合金凸块。 Ag1-xYx凸块的Y包括以任意重量百分比与Ag形成完全固溶体的金属，Ag1-xYx合金凸块的X在约0.005至约0.25的范围内。 Ag1-xYx合金凸块的一个标准偏差和晶粒度分布的平均值之间的差异在约0.2μm至约0.4μm的范围内。 Ag1-xYx合金凸块在纵截面上的平均粒径在约0.5μm至约1.5μm的范围内。

公开(公告)号：US08765594B2

公开(公告)日：2014-07-01

申请号：US13167448

申请日：2011-06-23

申请人： Yoshihiro Kitamura

发明人： Yoshihiro Kitamura

IPC分类号： H01L21/28

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method of fabricating a semiconductor device, includes: removing, after forming solder for forming a plurality of bumps on a semiconductor substrate, an oxide film formed on a surface of the solder while heating the semiconductor substrate with first radiant heat; and heating the semiconductor substrate with an amount of second radiant heat that is greater than the amount of the first radiant heat by holding the semiconductor substrate at a position apart from a front surface of a heater stage at a predetermined distance to reflow the solder from which the oxide film is removed.

摘要翻译： 一种制造半导体器件的方法，包括：在形成在半导体衬底上的多个凸块的焊料形成之后，除去形成在焊料表面上的氧化膜，同时用第一辐射热加热半导体衬底; 以及通过将半导体衬底保持在距加热器台的前表面预定距离处的位置处，使得半导体衬底的加热量大于第一辐射热的量，以回流焊料， 去除氧化膜。

公开(公告)号：US20130264707A1

公开(公告)日：2013-10-10

申请号：US13994660

申请日：2011-09-30

申请人： Kevin J. Lee

发明人： Kevin J. Lee

IPC分类号： H01L23/538 ,  H01L23/00

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/11001 ,  H01L2224/1183 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/27436 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/81191 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/013 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/03 ,  H01L2224/05552 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/11848 ,  H01L21/304

摘要： A structure and method of handling a device wafer during through-silicon via (TSV) processing are described in which a device wafer is bonded to a temporary support substrate with a permanent thermosetting material. Upon removal of the temporary support substrate a planar frontside bonding surface including a reflowed solder bump and the permanent thermosetting material is exposed.

公开(公告)号：US08378490B2

公开(公告)日：2013-02-19

申请号：US13048127

申请日：2011-03-15

申请人： Chyi-Tsong Ni ,  I-Shi Wang ,  Hsin-Kuei Lee ,  Ching-Hou Su

发明人： Chyi-Tsong Ni ,  I-Shi Wang ,  Hsin-Kuei Lee ,  Ching-Hou Su

IPC分类号： H01L23/48

CPC分类号： H01L21/768 ,  B81B2207/012 ,  B81C1/00269 ,  B81C2203/019 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/11826 ,  H01L2224/11827 ,  H01L2224/11848 ,  H01L2224/13017 ,  H01L2224/131 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13624 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/13684 ,  H01L2224/16145 ,  H01L2224/165 ,  H01L2224/81011 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81801 ,  H01L2224/81948 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01327 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/1461 ,  H01L2924/01014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A method of integrated circuit fabrication is provided, and more particularly fabrication of a semiconductor apparatus with a metallic alloy. An exemplary structure for a semiconductor apparatus comprises a first silicon substrate having a first contact comprising a silicide layer between the substrate and a first metal layer; a second silicon substrate having a second contact comprising a second metal layer; and a metallic alloy between the first metal layer of the first contact and the second metal layer of the second contact.

摘要翻译： 提供集成电路制造的方法，更具体地说，制造具有金属合金的半导体装置。 半导体器件的示例性结构包括具有第一接触的第一硅衬底，所述第一接触包括在衬底和第一金属层之间的硅化物层; 第二硅衬底，具有包括第二金属层的第二接触; 以及在第一接触件的第一金属层和第二接触件的第二金属层之间的金属合金。

公开(公告)号：US07906420B2

公开(公告)日：2011-03-15

申请号：US12627249

申请日：2009-11-30

申请人： Peter Alfred Gruber ,  Paul Alfred Lauro ,  Jae-Woong Nah

发明人： Peter Alfred Gruber ,  Paul Alfred Lauro ,  Jae-Woong Nah

IPC分类号： H01L21/44

CPC分类号： B23K1/0016 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1183 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T428/24612 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the first and second decals being arranged such that each of the first plurality of openings is in alignment with a corresponding one of the second plurality of openings; filling the first and second plurality of openings with molten alloy; cooling the molten alloy to thereby form at least first and second plugs, the first plug having a first surface and a second surface substantially parallel to one another, the second plug having a third surface and a fourth surface substantially parallel to one another; removing at least one of the first and second decals to at least partially expose the first and second plugs; aligning the alloy carrier with the receiving substrate so that the first and second plugs correspond to the selected areas on the receiving substrate; and transferring the first plug to a first of the selected areas and the second plug to a second of the selected areas.

摘要翻译： 一种用于在接收基板上的选定区域形成合金沉积物的方法包括以下步骤：提供合金载体，其包括至少包括第一多个开口的第一贴花和包括第二多个开口的第二贴花，第一和第二贴花 被布置成使得所述第一多个开口中的每一个与所述第二多个开口中的对应的一个开口对准; 用熔融合金填充第一和第二多个开口; 冷却所述熔融合金，从而形成至少第一和第二塞子，所述第一塞子具有基本上彼此平行的第一表面和第二表面，所述第二塞子具有基本上彼此平行的第三表面和第四表面; 去除所述第一和第二贴花中的至少一个以至少部分地暴露所述第一和第二插塞; 将合金载体与接收基板对准，使得第一和第二插塞对应于接收基板上的选定区域; 以及将所述第一插头转移到所选择的区域中的第一个，并且将所述第二插头转移到所选择的区域中的第二个。

公开(公告)号：US07615476B2

公开(公告)日：2009-11-10

申请号：US11173939

申请日：2005-06-30

申请人： Fay Hua

发明人： Fay Hua

IPC分类号： H01L21/44

CPC分类号： H01L23/49816 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1141 ,  H01L2224/11436 ,  H01L2224/1147 ,  H01L2224/1152 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13411 ,  H01L2224/13416 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/13447 ,  H01L2224/13499 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83

摘要： A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

摘要翻译： 纳米尺寸金属颗粒复合材料包括粒径为约50纳米或更小的第一金属。 电线互连与回流纳米溶剂接触并具有与回流纳米溶剂相同的金属或合金组成。 还公开了使用回流纳米涂料组合物的微电子封装。 组装微电子封装的方法包括制备导线互连模板。 计算系统包括耦合到电线互连的纳米涂料组合物。

公开(公告)号：US07273768B2

公开(公告)日：2007-09-25

申请号：US11213847

申请日：2005-08-30

申请人： Lu-Chen Hwan

发明人： Lu-Chen Hwan

IPC分类号： H01L21/50 ,  H01L21/58 ,  H01L21/60

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/11505 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/274 ,  H01L2224/2784 ,  H01L2224/83801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A wafer-level package and an IC module assembly method for a wafer-level package are provided in the present invention. The method comprises forming a metal bump on a wafer, applying a high polymer resin coating to the wafer, grinding a surface of the resin coating, printing an endpoint on the wafer, a grinding and cutting step and bonding the chips to an antenna or substrate with SMT. The present invention can be used to manufacture high quality chips of low cost with mass production to significantly reduce cost and maintain high quality of the products.

摘要翻译： 在本发明中提供晶片级封装和晶片级封装的IC模块组装方法。 该方法包括在晶片上形成金属凸块，向晶片施加高聚合物树脂涂层，研磨树脂涂层的表面，在晶片上印刷端点，研磨和切割步骤以及将芯片粘合到天线或基底 与SMT。 本发明可以用于大量生产低成本的高品质芯片，以显着降低成本并保持产品质量。

公开(公告)号：US20070001280A1

公开(公告)日：2007-01-04

申请号：US11173939

申请日：2005-06-30

申请人： Fay Hua

发明人： Fay Hua

IPC分类号： H01L23/02

CPC分类号： H01L23/49816 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1141 ,  H01L2224/11436 ,  H01L2224/1147 ,  H01L2224/1152 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13411 ,  H01L2224/13416 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/13447 ,  H01L2224/13499 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83

摘要： A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

摘要翻译： 纳米尺寸金属颗粒复合材料包括粒径为约50纳米或更小的第一金属。 电线互连与回流纳米溶剂接触并具有与回流纳米溶剂相同的金属或合金组成。 还公开了使用回流纳米涂料组合物的微电子封装。 组装微电子封装的方法包括制备导线互连模板。 计算系统包括耦合到电线互连的纳米涂料组合物。

公开(公告)号：US20230317652A1

公开(公告)日：2023-10-05

申请号：US17657162

申请日：2022-03-30

申请人： International Business Machines Corporation

发明人： Toyohiro Aoki ,  KOKI NAKAMURA ,  Takashi Hisada

IPC分类号： H01L23/00

CPC分类号： H01L24/08 ,  H01L2224/05552 ,  H01L24/16 ,  H01L24/11 ,  H01L24/03 ,  H01L24/09 ,  H01L24/05 ,  H01L24/73 ,  H01L2224/08053 ,  H01L2224/08059 ,  H01L2224/13014 ,  H01L2224/16059 ,  H01L2224/09055 ,  H01L2224/09133 ,  H01L2224/03015 ,  H01L2224/11848 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L24/32 ,  H01L2224/32145 ,  H01L2224/05557 ,  H01L24/13

摘要： A semiconductor device includes two integrated circuit (IC) chips. The first IC chip includes substrate, a spacer connected to the substrate and including holes, wherein at least one of the holes has a first shape, and solder bumps positioned in the holes, respectively. The second IC chip includes a substrate, electrode pads extending from the substrate and connected to the solder bumps, respectively. At least one of the electrode pads that corresponds to the at least one of the solder bumps has a second shape, and the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.