公开(公告)号：US20120060365A1

公开(公告)日：2012-03-15

申请号：US13373387

申请日：2011-11-14

Applicant: Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

Inventor： Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

IPC: H05K3/00

CPC classification number: H05K1/111 ,  H05K1/09 ,  H05K1/115 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0323 ,  H05K2203/0376 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: A method of manufacturing a printed circuit board having a metal bump, including: forming a recess for creation of the metal bump on a first carrier, forming a first barrier layer on the first carrier, and forming an upper circuit layer on the first barrier layer, the upper circuit layer including a metal bump charged in the recess and a circuit pattern; forming a second barrier layer on a second carrier, and forming a lower circuit layer on the second barrier layer; preparing an insulating layer, and transferring the upper and lower circuit layers to the insulating layer; removing the first and second carriers; and removing the first and second barrier layers.

Abstract translation: 一种制造具有金属凸块的印刷电路板的方法，包括：在第一载体上形成用于形成金属凸块的凹部，在第一载体上形成第一阻挡层，并在第一阻挡层上形成上电路层 所述上电路层包括充电在所述凹部中的金属凸块和电路图案; 在第二载体上形成第二阻挡层，并在第二阻挡层上形成下电路层; 制备绝缘层，并将上下电路层转移到绝缘层; 移除第一和第二载体; 以及去除所述第一和第二阻挡层。

公开(公告)号：US20110259627A1

公开(公告)日：2011-10-27

申请号：US13067883

申请日：2011-07-01

Applicant: Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

IPC: H05K1/09 ,  H05K1/11

CPC classification number: H05K3/205 ,  H01L21/4846 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K3/4007 ,  H05K2201/09745 ,  H05K2201/10674 ,  H05K2203/0338 ,  H05K2203/0435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board includes: an insulator having a groove; a circuit layer filling a portion of the groove; a solder pad on the circuit layer filling the remainder of the groove; and a circuit pattern electrically connected with the circuit layer, the circuit pattern buried in the insulator such that a portion of the circuit pattern is exposed at a surface of the insulator.

Abstract translation: 电路板包括：具有凹槽的绝缘体; 填充所述凹槽的一部分的电路层; 电路层上的填充凹槽其余部分的焊盘; 以及与电路层电连接的电路图案，电路图案埋在绝缘体中，使得电路图案的一部分在绝缘体的表面露出。

公开(公告)号：US08022553B2

公开(公告)日：2011-09-20

申请号：US12155555

申请日：2008-06-05

Applicant: Jin-Yong Ahn ,  Chang-Sup Ryu ,  Byung-Youl Min ,  Myung-Sam Kang

Inventor： Jin-Yong Ahn ,  Chang-Sup Ryu ,  Byung-Youl Min ,  Myung-Sam Kang

IPC: H01L23/48

CPC classification number: H05K1/113 ,  H01L23/13 ,  H01L23/49816 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/20 ,  H05K3/4644 ,  H05K2201/0376 ,  H05K2201/09472 ,  H01L2224/0401

Abstract: A mounting substrate and a method of manufacturing the mounting substrate. The mounting substrate can include an insulation layer, a bonding pad buried in one side of the insulation layer in correspondence with a mounting position of a chip, and a circuit pattern electrically connected to the bonding pad. By utilizing certain embodiments of the invention, the process for stacking a solder resist layer can be omitted, as the bonding pads can be implemented in a form recessed from the surface of the insulation layer. In this way, the manufacturing process can be simplified and manufacturing costs can be reduced. Since the surface of the mounting-substrate on which to mount a chip can be kept flat without any protuberances, the occurrence of voids in the underfill can be minimized. This is correlated to obtaining a high degree of reliability, and leads to a greater likelihood of successful mounting.

Abstract translation: 一种安装基板及其制造方法。 安装基板可以包括绝缘层，与绝缘层的一侧相对应于芯片的安装位置的接合焊盘以及电连接到焊盘的电路图案。 通过利用本发明的某些实施例，可以省略堆叠阻焊层的工艺，因为焊盘可以以从绝缘层的表面凹陷的形式来实施。 以这种方式，可以简化制造过程，并且可以降低制造成本。 由于安装芯片的安装基板的表面可以保持平坦而没有任何突起，所以可以使底部填充物中的空隙的发生最小化。 这与获得高可靠性相关，并且导致成功安装的可能性更大。

公开(公告)号：US08022311B2

公开(公告)日：2011-09-20

申请号：US11797084

申请日：2007-04-30

Applicant: Tae Eui Kim ,  Byoung Youl Min ,  Myung Sam Kang ,  Je Gwang Yoo

Inventor： Tae Eui Kim ,  Byoung Youl Min ,  Myung Sam Kang ,  Je Gwang Yoo

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H05K3/205 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/09672 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49165 ,  Y10T29/49169

Abstract: Disclosed are a printed circuit board for improving the tolerance of embedded capacitors and a method of manufacturing the same. The printed circuit board having embedded capacitors is manufactured by transferring and embedding a circuit layer having a lower electrode formed through an additive process into a resin insulating layer, and thereby is minimized in the circuit tolerance conventionally caused by an etching process to thus be applied to capacitors for RF matching.

Abstract translation: 公开了一种用于提高嵌入式电容器的容限的印刷电路板及其制造方法。 具有嵌入式电容器的印刷电路板通过将具有通过添加工艺形成的下电极的电路层转移并嵌入到树脂绝缘层中而被制造，从而在通常由蚀刻工艺引起的电路容差中被最小化，从而被应用于 电容器用于RF匹配。

公开(公告)号：US20110186997A1

公开(公告)日：2011-08-04

申请号：US12821621

申请日：2010-06-23

Applicant: Mi-Sun HWANG ,  Myung-Sam Kang

Inventor： Mi-Sun HWANG ,  Myung-Sam Kang

IPC: H01L23/498 ,  H01L21/60

CPC classification number: H01L23/498 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/00

Abstract: A single-layer board on chip package substrate and a method of manufacturing the same are disclosed. The single-layer board on chip package substrate in accordance with an embodiment of the present invention includes an insulator, which has a window perforated therethrough, a wiring pattern, a wire bonding pad and a solder ball pad, which are embedded in one surface of the insulator, and a solder resist layer, which is formed on the one surface of the insulator such that the solder resist layer covers the wiring pattern but at least portions of the wire bonding pad and the solder ball pad are exposed.

Abstract translation: 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例的单层片上封装基板包括：具有穿孔的窗口的绝缘体，布线图案，引线接合焊盘和焊球垫，其嵌入在 绝缘体和阻焊层，其形成在绝缘体的一个表面上，使得阻焊层覆盖布线图案，但是引线接合焊盘和焊球垫的至少一部分被暴露。

公开(公告)号：US20100132876A1

公开(公告)日：2010-06-03

申请号：US12508224

申请日：2009-07-23

Applicant: Myung-Sam Kang ,  Jung-Hyun Park ,  Ji-Eun Kim

Inventor： Myung-Sam Kang ,  Jung-Hyun Park ,  Ji-Eun Kim

IPC: C25D5/02 ,  B32B37/00 ,  B32B38/00

CPC classification number: B32B37/02 ,  B32B2457/08 ,  C25D5/022 ,  H05K3/205 ,  H05K3/428 ,  H05K3/4658 ,  H05K2201/0376 ,  H05K2203/0384

Abstract: Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for interlayer connection can include forming a circuit pattern on one side of a carrier, pressing one side of the carrier into one side of the insulator, removing the carrier, forming a hole penetrating through the insulator by processing one end of the circuit pattern, and forming a conductive material inside the hole to have the conductive material correspond to the via.

Abstract translation: 公开了印刷电路板的制造方法。 制造具有用于层间连接的通孔的印刷电路板的方法可以包括在载体的一侧上形成电路图案，将载体的一侧压在绝缘体的一侧，去除载体，形成贯穿该载体的孔 通过处理电路图案的一端，并且在孔内形成导电材料以使导电材料对应于通孔。

公开(公告)号：US20100108372A1

公开(公告)日：2010-05-06

申请号：US12585509

申请日：2009-09-16

Applicant: Myung-Sam Kang

Inventor： Myung-Sam Kang

IPC: H05K1/18

CPC classification number: H01L23/3114 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/007 ,  H05K3/20 ,  H05K3/284 ,  H05K3/4007 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2203/0361 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic component package and a manufacturing method thereof. The electronic component package includes: an insulation layer; a single layer of circuit pattern buried in the insulation layer and having a surface exposed at one side of the insulation layer, the circuit pattern comprising a bonding pad and a solder ball pad; and an electronic component mounted on one side of the insulation layer and electrically connected with the bonding pad. In addition, the electronic component package includes a portion of the insulation layer being removed in correspondence with the position of the solder ball pad such that the solder ball pad is exposed at the other side of the insulation layer.

Abstract translation: 一种电子元件封装及其制造方法。 电子部件封装包括：绝缘层; 埋在绝缘层中并具有在绝缘层的一侧露出的表面的单层电路图案，电路图案包括接合焊盘和焊球垫; 以及安装在所述绝缘层的一侧上并与所述接合焊盘电连接的电子部件。 此外，电子部件封装包括与焊球垫的位置对应地去除绝缘层的一部分，使得焊球垫在绝缘层的另一侧露出。

公开(公告)号：US07707715B2

公开(公告)日：2010-05-04

申请号：US12005610

申请日：2007-12-28

Applicant: Shuhichi Okabe ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Myung Sam Kang ,  Jung Hyun Park ,  Ji Hong Jo ,  Jin Yong An ,  Soon Oh Jung

Inventor： Shuhichi Okabe ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Myung Sam Kang ,  Jung Hyun Park ,  Ji Hong Jo ,  Jin Yong An ,  Soon Oh Jung

IPC: H05K3/00

CPC classification number: H05K3/205 ,  H05K3/062 ,  H05K3/108 ,  H05K3/462 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/061 ,  H05K2203/0733 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.

Abstract translation: 公开了一种制造多层印刷电路板的方法，其能够形成能够通过使用CTE的半添加工艺和难以传送的薄基板上的金属载体的刚性来实现的微电路。

公开(公告)号：US07697301B2

公开(公告)日：2010-04-13

申请号：US11637664

申请日：2006-12-13

Applicant: Doo-Hwan Lee ,  Byoung-Youl Min ,  Myung-Sam Kang ,  Moon-Il Kim ,  Hyung-Tae Kim

Inventor： Doo-Hwan Lee ,  Byoung-Youl Min ,  Myung-Sam Kang ,  Moon-Il Kim ,  Hyung-Tae Kim

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/10515 ,  Y10T29/4913 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: A printed circuit board having embedded electronic components and a manufacturing method thereof are disclosed. With the printed circuit board having embedded electronic components, including a core sheet, a first electronic component mounted on one side of the core sheet, a second electronic component mounted on the other side of the core sheet and overlapping the first electronic component, a first insulation layer stacked on one side of the core sheet and covering the first electronic component, a second insulation layer stacked on the other side of the core sheet and covering the second electronic component, and a circuit pattern formed on the surface of the first insulation layer or the second insulation layer, the density of the printed circuit board having embedded components is improved, as a plurality of electronic components are embedded simultaneously, and when a thin CCL substrate or a metal substrate is used as the core, a metal substrate in particular, the heat-releasing property and mechanical strength are improved, including increased bending strength in a thermal-stress environment, as electronic components are mounted on both sides of the core sheet.

Abstract translation: 公开了一种具有嵌入式电子部件的印刷电路板及其制造方法。 利用具有嵌入式电子部件的印刷电路板，包括芯片，安装在芯片的一侧的第一电子部件，安装在芯片的另一侧并与第一电子部件重叠的第二电子部件，第一电子部件 绝缘层，其堆叠在所述芯片的一侧并覆盖所述第一电子部件;堆叠在所述芯片的另一侧并覆盖所述第二电子部件的第二绝缘层，以及形成在所述第一绝缘层的表面上的电路图案 或第二绝缘层，随着多个电子部件被同时嵌入，具有嵌入部件的印刷电路板的密度得到改善，并且当使用薄CCL基板或金属基板作为芯时，特别是金属基板 ，提高了散热性能和机械强度，包括在热应力环境中增加弯曲强度 因为电子部件安装在芯片的两侧。

公开(公告)号：US20090250260A1

公开(公告)日：2009-10-08

申请号：US12155756

申请日：2008-06-09

Applicant: Myung Sam Kang

Inventor： Myung Sam Kang

IPC: H05K1/02 ,  B32B38/10 ,  B05D5/12 ,  C23F1/02

CPC classification number: H05K3/107 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/108 ,  H05K3/205 ,  H05K3/243 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4652 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09881 ,  H01L2924/00

Abstract: The present invention relates to a high density circuit board for increasing the density of a circuit by impregnating fine circuit patterns inside a top part of a substrate, and a method for manufacturing the same.In accordance with the present invention, a high density circuit board includes a substrate with fine circuit patterns impregnated inside top and bottom parts; a via formed inside the substrate to electrically conduct the fine circuit patterns of the top and bottom parts of the substrate each other; pads formed on the fine circuit patterns of the top part of the substrate; and solder resists formed on the top and bottom parts of the substrate, which can convert the circuit patterns into fine pitches and increase the degree of close adhesion between the substrate and the circuit patterns, thereby improving reliability.

Abstract translation: 高密度电路板及其制造方法技术领域本发明涉及一种用于通过在基板顶部浸渍精细电路图案来提高电路密度的高密度电路板及其制造方法。 根据本发明，高密度电路板包括具有浸渍在顶部和底部内部的精细电路图案的基板; 形成在基板内部的通孔，以使基板的顶部和底部的精细电路图案彼此导电; 衬垫形成在衬底的顶部的精细电路图案上; 以及形成在基板的顶部和底部上的阻焊剂，其可以将电路图案转换成细间距并增加基板和电路图案之间的紧密粘合度，从而提高可靠性。