公开(公告)号：US07091820B2

公开(公告)日：2006-08-15

申请号：US10881594

申请日：2004-06-30

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01C1/12

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L25/18 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic assembly, including a microelectronic element such as a semiconductor chip and a dielectric material covering the chip and forming a body having a bottom surface. The assembly includes conductive units having portions exposed at the bottom surface, posts extending upwardly from said exposed portions and top flanges spaced above the bottom surface.

Abstract translation: 一种微电子组件，包括诸如半导体芯片的微电子元件和覆盖芯片的电介质材料，并形成具有底表面的主体。 组件包括具有暴露在底表面处的部分的导电单元，从所述露出部分向上延伸的柱和在底表面上方间隔开的顶部凸缘。

公开(公告)号：US06972495B2

公开(公告)日：2005-12-06

申请号：US10643701

申请日：2003-08-19

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H01L23/29

CPC classification number: H01L24/12 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8319 ,  H01L2224/83856 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An assembly including a first microelectronic element having a first surface and a plurality of contacts exposed at the first surface; a second microelectronic element having a top surface and a plurality of contacts exposed at the top surface; and conductive elastomeric posts formed by curing a conductive elastomeric material, wherein each of the contacts of the first microelectronic element is respectively aligned with one of the contacts of the second microelectronic element, and further wherein at least some of the contacts of the first element are connected to the respectively aligned contacts of the second element by the conductive elastomeric material.

Abstract translation: 一种组件，包括具有第一表面的第一微电子元件和在第一表面处暴露的多个触点; 第二微电子元件，其具有在顶表面处暴露的顶表面和多个触点; 以及通过固化导电弹性体材料形成的导电弹性柱，其中第一微电子元件的每个触点分别与第二微电子元件的触点之一对准，并且其中第一元件的至少一些触点是 通过导电弹性体材料连接到第二元件的分别对准的触点。

公开(公告)号：US06938338B2

公开(公告)日：2005-09-06

申请号：US10417746

申请日：2003-04-17

Applicant: Joseph Fjelstad ,  John W. Smith ,  Thomas H. DiStefano ,  James Zaccardi ,  A. Christian Walton

Inventor： Joseph Fjelstad ,  John W. Smith ,  Thomas H. DiStefano ,  James Zaccardi ,  A. Christian Walton

IPC: B23K1/19 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L21/48 ,  H01L23/48 ,  H01L23/498 ,  H01R4/02 ,  H01R12/00 ,  H01R12/52 ,  H01R12/57 ,  H01R12/70 ,  H01R12/71 ,  H01R13/24 ,  H01R43/16 ,  H05K1/11 ,  H05K3/32 ,  H05K3/34 ,  H05K3/40 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K7/1084 ,  G01R1/0466 ,  G01R1/06711 ,  G01R1/06727 ,  G01R1/06733 ,  G01R1/06744 ,  G01R1/07357 ,  G01R3/00 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/8114 ,  H01L2224/81385 ,  H01L2224/81899 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01R12/7076 ,  H01R13/2485 ,  H05K1/118 ,  H05K3/326 ,  H05K3/3431 ,  H05K3/3436 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/1059 ,  H05K2201/10734 ,  Y02P70/613 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49222 ,  Y10T29/49224 ,  H01L2924/00

Abstract: Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.

Abstract translation: 诸如柔性的，片状的悬臂触点之类的微电子触点具有以规则图案设置的凹凸。 每个粗糙部分的尖端具有远离接触表面的尖端特征。 当配合的微电子元件与触点接合时，擦拭动作导致粗糙的尖锐特征刮擦配合元件，以便在触发和配合元件激活时提供有效的电互连以及可选的有效的冶金结合 接合材料。

公开(公告)号：US06906422B2

公开(公告)日：2005-06-14

申请号：US09785104

申请日：2001-02-16

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/48

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/02335 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/13099 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3025

Abstract: An element such as a semiconductor wafer or other body is provided with flexible leads, the tip ends of which project over the front surface of the element. The tips of the flexible leads are spaced apart from the front surface and are independently moveable with respect to the element. The flexible leads may be curved in a plane parallel to the front surface of the element, or may be curved so that the tip end of each flexible lead is disposed further from the front surface of the element than the main body of the flexible lead.

Abstract translation: 诸如半导体晶片或其它主体的元件设置有柔性引线，其尖端突出在元件的前表面上。 柔性引线的尖端与前表面间隔开并且可相对于元件独立地移动。 柔性引线可以在与元件的前表面平行的平面中弯曲，或者可以是弯曲的，使得每个柔性引线的末端比柔性引线的主体更远离元件的前表面设置。

公开(公告)号：US20050103522A1

公开(公告)日：2005-05-19

申请号：US10990280

申请日：2004-11-15

Applicant: Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

Inventor： Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K3/3405 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.

Abstract translation: 公开了楼梯级PCB结构，其提供包括IC封装和连接器在内的电子互连结构的各种元件之间的高性能，直接路径，无通孔互连。

公开(公告)号：US20050035357A1

公开(公告)日：2005-02-17

申请号：US10948898

申请日：2004-09-24

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/68 ,  H01L31/0203 ,  H01L27/15

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L24/32 ,  H01L24/73 ,  H01L24/97 ,  H01L31/0203 ,  H01L2221/68377 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package includes a light sensitive microelectronic element having a front face including one or more contacts and a rear surface, and conductive leads having first ends connected to the one or more contacts and second ends connected to one or more conductive pads adjacent the light sensitive microelectronic element. The package also includes an at least partially transparent encapsulant covering the light sensitive microelectronic element, the conductive leads and the one or more conductive pads, whereby the one or more conductive pads are exposed on a surface of the encapsulant.

Abstract translation: 微电子封装包括具有包括一个或多个触点和后表面的前表面的光敏微电子元件，以及导电引线，其具有连接到一个或多个触点的第一端和连接到与光敏感相邻的一个或多个导电焊盘的第二端 微电子元件。 封装还包括覆盖光敏微电子元件，导电引线和一个或多个导电焊盘的至少部分透明的密封剂，由此一个或多个导电焊盘暴露在密封剂的表面上。

公开(公告)号：US06780747B2

公开(公告)日：2004-08-24

申请号：US10097032

申请日：2002-03-13

Applicant: Thomas H. Distefano ,  Joseph Fjelstad

Inventor： Thomas H. Distefano ,  Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/80207 ,  H01L2224/81192 ,  H01L2224/81904 ,  H01L2224/83209 ,  H01L2224/9212 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/81

Abstract: A method of providing a substantially void free layer for one or more flip chip assemblies, or one or more microelectronic components, utilizing a curable encapsulant. Also disclosed is a method of injecting an encapsulant into an assembly and a method of treating a microelectronic component to form a void free layer.

Abstract translation: 一种利用可固化密封剂为一个或多个倒装芯片组件或一个或多个微电子部件提供基本无空隙的方法。 还公开了将密封剂注入到组件中的方法以及处理微电子部件以形成无空隙层的方法。

公开(公告)号：US06653172B2

公开(公告)日：2003-11-25

申请号：US10229593

申请日：2002-08-28

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/80207 ,  H01L2224/81192 ,  H01L2224/81904 ,  H01L2224/83209 ,  H01L2224/9212 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/81

Abstract: A method of treating an interposer layer includes disposing an interposer layer between a semiconductor wafer and a substrate so that voids within the interposer layer are sealed and applying pressure to substantially eliminate the voids. A method of creating a substantially void-free interposer layer includes injecting the interposer layer between a wafer and a substrate and applying pressure to substantially remove the voids.

公开(公告)号：US06586955B2

公开(公告)日：2003-07-01

申请号：US09793791

申请日：2001-02-27

Applicant: Joseph Fjelstad ,  John W. Smith

Inventor： Joseph Fjelstad ,  John W. Smith

IPC: G01R3102

CPC classification number: G01R1/07314 ,  G01R1/06744 ,  G01R3/00

Abstract: A probe card for testing electronic elements includes a layer of dielectric material provided with a plurality of cavities supported on a substrate. A mass of fusible conductive material having a melting temperature below about 150° C. is disposed in each of said cavities, the dielectric material electrically insulating the masses of fusible conductive material from one another. A probe tip of conductive material having a melting temperature greater than about 150° C. is provided at one common end of each of the masses of fusible conductive material. The probe contacts are separated from an adjacent probe contact by at least one channel formed with the layer of dielectric material.

公开(公告)号：US06499216B1

公开(公告)日：2002-12-31

申请号：US09405029

申请日：1999-09-24

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: A05K300

CPC classification number: G01R1/06727 ,  G01R1/07342 ,  G01R3/00 ,  H05K3/205 ,  H05K3/4084 ,  H05K2201/0311 ,  Y10T29/49147 ,  Y10T29/49204 ,  Y10T29/49316

Abstract: A probe card for testing an electrical element such as a semiconductor wafer or a printed wiring board includes a substrate with circuitry thereon, an encapsulant layer overlying the substrate and a multiplicity of leads extending upwardly from the substrate through the encapsulant layer to terminals, the terminals projecting above the encapsulant layer. The probe card can be engaged with the electronic element so that the tips of the leads bear on the contact pads of the electronic element, and so that the leads and encapsulant layer deform to accommodate irregularities in the electronic element or probe card. The card can be made by providing the substrate, a sacrificial layer and leads extending between the sacrificial layer and substrate, moving the substrate and sacrificial layer away from one another to deform the leads and injecting a curable material around the leads to form the encapsulant layer.

Abstract translation: 用于测试诸如半导体晶片或印刷线路板的电气元件的探针卡包括其上具有电路的衬底，覆盖衬底的密封剂层和从衬底通过密封剂层向上延伸到端子的多个引线，端子 突出在密封剂层上方。 探针卡可以与电子元件接合，使得引线的尖端承载在电子元件的接触垫上，并且使得引线和密封剂层变形以适应电子元件或探针卡中的不规则。 可以通过提供衬底，牺牲层和在牺牲层和衬底之间延伸的引线来制造该卡，使衬底和牺牲层彼此远离地移动以使引线变形并且在引线周围注入可固化材料以形成密封层 。