公开(公告)号：US20110298088A1

公开(公告)日：2011-12-08

申请号：US12795230

申请日：2010-06-07

申请人： Klaus Elian ,  Horst Theuss ,  Georg Meyer-Berg

发明人： Klaus Elian ,  Horst Theuss ,  Georg Meyer-Berg

IPC分类号： H01L29/86 ,  H01L21/56

CPC分类号： H01F17/0006 ,  H01F17/04 ,  H01F2017/0073 ,  H01F2017/048 ,  H01L21/568 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105

摘要： A semiconductor package includes a semiconductor chip. An inductor is applied to the semiconductor chip. The inductor has at least one winding. An encapsulation body is formed of an encapsulation material. The encapsulation material contains a magnetic component and fills a space within the winding to form a magnetic winding core.

摘要翻译： 半导体封装包括半导体芯片。 电感器被施加到半导体芯片。 电感器具有至少一个绕组。 封装体由封装材料形成。 封装材料包含磁性部件并填充绕组内的空间以形成磁性绕组芯。

公开(公告)号：US20110233754A1

公开(公告)日：2011-09-29

申请号：US12749192

申请日：2010-03-29

申请人： Georg Meyer-Berg

发明人： Georg Meyer-Berg

IPC分类号： H01L23/488 ,  H01L21/56 ,  H01L21/60

CPC分类号： H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/08 ,  H01L24/80 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/08238 ,  H01L2224/08245 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/16145 ,  H01L2224/80006 ,  H01L2224/80815 ,  H01L2224/8082 ,  H01L2224/8084 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15331 ,  H01L2224/80 ,  H01L2924/00

摘要： A method includes providing a carrier; applying a dielectric layer to the carrier; applying a metal layer to the dielectric layer; placing a first semiconductor chip on the metal layer with contact pads of the first semiconductor chip facing the metal layer; covering the first semiconductor chip with an encapsulation material; and removing the carrier.

摘要翻译： 一种方法包括提供载体; 将介电层施加到载体上; 将金属层施加到介电层上; 将第一半导体芯片放置在金属层上，其中第一半导体芯片的接触焊盘面向金属层; 用封装材料覆盖第一半导体芯片; 并移除载体。

公开(公告)号：US20080191348A1

公开(公告)日：2008-08-14

申请号：US11674958

申请日：2007-02-14

申请人： Georg Meyer-Berg ,  Thomas Moehring

发明人： Georg Meyer-Berg ,  Thomas Moehring

IPC分类号： H01L23/48

CPC分类号： H01L23/50 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A system for distributing electrical power for a chip comprises a plurality of electrically conductive linear trunks arranged in a metallization layer of a chip, wherein the trunks are slanted with respect to the side edges of the chip. A further system for distributing electrical power for a chip comprises a plurality of electrically conductive straps, each one of the straps comprising two trunks connected to each other at a connection point, and a plurality of electrically conductive bumps or pads connected to the straps.

摘要翻译： 用于分配芯片的电力的系统包括布置在芯片的金属化层中的多个导电线性树干，其中树干相对于芯片的侧边缘倾斜。 用于分配用于芯片的电力的另一系统包括多个导电带，每个带包括在连接点处彼此连接的两个干线，以及连接到带的多个导电凸块或焊盘。

公开(公告)号：US20070102826A1

公开(公告)日：2007-05-10

申请号：US11619086

申请日：2007-01-02

申请人： Georg Meyer-Berg ,  Barbara Vasquez

发明人： Georg Meyer-Berg ,  Barbara Vasquez

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/4853 ,  H01L21/486 ,  H01L23/142 ,  H01L23/147 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K3/4046 ,  H05K2201/0323 ,  H05K2201/10287 ,  H05K2203/0235 ,  H01L2924/00

摘要： An electronic component has a semiconductor chip and microscopically small flip-chip contacts belonging to a rewiring plate, on which macroscopically large elastic external contacts are arranged. The rewiring plate has a wiring support made of polycrystalline silicon, amorphous glass, or metal. Furthermore, the present invention relates to a method for the production of a suitable wiring support and of the electronic component.

摘要翻译： 电子部件具有属于重新布线板的半导体芯片和微小尺寸的倒装芯片触点，布置有宏观上大的弹性外部触点。 再布线板具有由多晶硅，非晶玻璃或金属制成的布线支撑。 此外，本发明涉及一种用于生产合适的布线支撑件和电子部件的方法。

公开(公告)号：US07129570B2

公开(公告)日：2006-10-31

申请号：US10784243

申请日：2004-02-24

申请人： Georg Meyer-Berg

发明人： Georg Meyer-Berg

IPC分类号： H01L23/02

CPC分类号： H01L23/49811 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/82007 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06565 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10T29/49117 ,  Y10T29/49204 ,  H01L2924/00

摘要： An electronic component includes at least one semiconductor chip, which has an active chip top side with contact areas and has a chip rear side arranged on a carrier top side of a circuit carrier. The circuit carrier and the chip top side are covered by a common rewiring layer having external contact areas at a different level. The different level is matched to a common level of external contact top sides by means of different heights of in part compliant external contacts.

摘要翻译： 电子部件包括至少一个半导体芯片，该半导体芯片具有接触区域的有源芯片顶侧，并且具有布置在电路载体的载体顶侧上的芯片后侧。 电路载体和芯片顶侧由具有不同电平的外部接触区域的公共重新布线层覆盖。 通过部分兼容的外部触点的不同高度，不同的级别与外部接触顶面的共同级别相匹配。

公开(公告)号：US20060060954A1

公开(公告)日：2006-03-23

申请号：US11246563

申请日：2005-10-11

申请人： Georg Meyer-Berg

发明人： Georg Meyer-Berg

IPC分类号： H01L23/02

CPC分类号： H01L24/85 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/73267 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01052 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multichip module includes at least one first semiconductor chip and at least one second semiconductor chip. The semiconductor chips are arranged in coplanar fashion on or in a support medium and respectively include matching components and contact areas arranged on their active top sides. At least one second semiconductor chip includes an arrangement of contact areas which is mirror-inverted in relation to a first semiconductor chip. At least one first semiconductor chip and at least one second semiconductor chip are arranged next to and/or behind one another (i.e., adjacent to one another) such that those of their edges which respectively have a matching arrangement of contact areas are opposite one another. Wiring arrangements extend between respectively opposite contact areas and between contact areas at the outer edges of the semiconductor chips and external contacts.

摘要翻译： 多芯片模块包括至少一个第一半导体芯片和至少一个第二半导体芯片。 半导体芯片以共平面方式布置在支撑介质上或分别包括匹配部件和布置在其有效顶侧上的接触区域。 至少一个第二半导体芯片包括相对于第一半导体芯片镜像反转的接触区域的布置。 至少一个第一半导体芯片和至少一个第二半导体芯片布置在彼此旁边和/或彼此之间（即，彼此相邻），使得它们的边缘分别具有接触区域的匹配布置的那些边缘彼此相对 。 布线布置在相应的相对接触区域之间以及在半导体芯片和外部触点的外边缘处的接触区域之间延伸。

公开(公告)号：US20050269690A1

公开(公告)日：2005-12-08

申请号：US11143123

申请日：2005-06-02

申请人： Georg Meyer-Berg

发明人： Georg Meyer-Berg

IPC分类号： H01L23/055 ,  H01L23/36 ,  H01L23/367 ,  H01L23/48 ,  H01L23/50 ,  H01L25/065

CPC分类号： H01L23/3675 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A ball grid array housing, a semiconductor device having a ball grid array housing and an electronic circuit are disclosed. In one embodiment, a ball grid array housing includes a substrate with solder ball connections pointing out from a housing and at least one semiconductor chip. For better heat dissipation from the housing, the ball grid includes a metallic cooling foil, or a metallic cooling plate. A method of making a ball grid array is also disclosed.

摘要翻译： 公开了一种球栅阵列壳体，具有球栅阵列壳体和电子电路的半导体器件。 在一个实施例中，球栅阵列壳体包括具有从壳体和至少一个半导体芯片指出的焊球连接的衬底。 为了从壳体更好地散热，球栅包括金属冷却箔或金属冷却板。 还公开了制造球栅阵列的方法。

公开(公告)号：US08680668B2

公开(公告)日：2014-03-25

申请号：US13407157

申请日：2012-02-28

申请人： Georg Meyer-Berg ,  Andreas Schloegl

发明人： Georg Meyer-Berg ,  Andreas Schloegl

IPC分类号： H01L23/495

CPC分类号： H01L24/27 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/492 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/41 ,  H01L24/83 ,  H01L24/84 ,  H01L24/97 ,  H01L25/072 ,  H01L2224/29111 ,  H01L2224/32014 ,  H01L2224/37011 ,  H01L2224/40225 ,  H01L2224/73219 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/01028 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

摘要： A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.

摘要翻译： 一种包括半导体芯片和金属箔的器件。 一个实施例提供了一种包括半导体芯片的器件，该半导体芯片在第一面上具有第一电极，而在第二面上与第一面相反。 第一金属箔以导电方式连接到半导体芯片的第一电极。 第二金属箔以导电的方式连接到半导体芯片的第二电极。

公开(公告)号：US20130334712A1

公开(公告)日：2013-12-19

申请号：US13523942

申请日：2012-06-15

申请人： Georg Meyer-Berg

发明人： Georg Meyer-Berg

IPC分类号： H01L21/60 ,  H01L23/488 ,  H01L21/78

CPC分类号： H01L23/49513 ,  H01L21/4821 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/24155 ,  H01L2224/29082 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82007 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/06 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1715 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776 ,  H01L2924/17763 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2924/20646 ,  H01L2924/20647 ,  H01L2924/20648 ,  H01L2924/20649 ,  H01L2924/2065 ,  H01L2924/00

摘要： A method for manufacturing a chip package is provided. The method includes forming a layer over a carrier; forming further carrier material over the layer; selectively removing one or more portions of the further carrier material thereby releasing one or more portions of the layer from the further carrier material; and adhering a chip including one or more contact pads to the carrier via the layer.

摘要翻译： 提供了一种制造芯片封装的方法。 该方法包括在载体上形成层; 在该层上形成另外的载体材料; 选择性地去除所述另外的载体材料的一个或多个部分，从而将所述层的一个或多个部分从所述另外的载体材料释放; 以及通过所述层将包括一个或多个接触焊盘的芯片粘附到所述载体。

公开(公告)号：US20100203676A1

公开(公告)日：2010-08-12

申请号：US12370266

申请日：2009-02-12

申请人： Horst Theuss ,  Georg Meyer-Berg

发明人： Horst Theuss ,  Georg Meyer-Berg

IPC分类号： H01L21/98 ,  H01L21/78 ,  H01L21/67

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00

摘要： A method of manufacturing an array of semiconductor devices comprises providing a first carrier having multiple chip alignment regions. Multiple chips are placed over the multiple chip alignment regions. Then, alignment of the chips to the multiple chip alignment regions is obtained. The multiple chips are then placed on a second carrier. The first carrier is detached from the multiple chips. An encapsulation material is applied to the multiple chips to form an encapsulated array of semiconductor chips. The second carrier is then detached from the encapsulated array of semiconductor devices.

摘要翻译： 制造半导体器件阵列的方法包括提供具有多个芯片对准区域的第一载体。 多个芯片放置在多个芯片对准区域上。 然后，获得芯片与多个芯片取向区域的​​对准。 然后将多个芯片放置在第二载体上。 第一个载体与多个芯片分离。 将封装材料施加到多个芯片以形成半导体芯片的封装阵列。 然后将第二载体从封装的半导体器件阵列分离。