Abstract:
A Tape-Automated-Bonding (TAB) package includes a resilient polyimide layer that supports a metal leadframe. A microelectronic circuit die is mounted in a hole in the polyimide layer and interconnected with inner leads of the leadframe. The TAB package is adhered to a support member having spacers that abut against the surface of a printed circuit board (PCB) on which the package is to be mounted and provide a predetermined spacing between the leadframe and the surface. Outer leads that protrude from the leadframe are bent into a shape so as extend, in their free state, toward the surface at least as far as the spacers. The package and support member assembly is placed on the PCB surface, and the combination of the weight of the assembly, the resilience of the leads and the preset standoff height enable the leads to resiliently deform so that the spacers abut against the surface and the leads conformably engage with the surface for soldering or other ohmic connection to conjugate bonding pads on the surface. The support member can be formed with lead retainers around which the leads extend to form loops that resiliently and conformably engage with the surface as the assembly is lowered thereon. The support member maintains coplanarity, adds weight to the package, pre-sets the standoff to protect the formed outer leads during surface mounting and enables the package to be shipped without a separate carrier.
Abstract:
A combination axial and surface mounted cylindrically-shaped package containing at least one electronic component and being surface mountable to a printed circuit board with electrical lands by the use of conventional axial component through hole mounting machinery that includes a hollow, electrically-insulated, and generally circular-cylindrically-shaped housing, at least one electronic component that is contained in the hollow, electrically-insulated, and generally circular-cylindrically-shaped housing, a pair of electrically-conductive axial leads that are in electrical communication with the at least one electronic component, and at least one circumferentially-disposed, laterally-oriented, and electrically-conductive ring also in electrical communication with the at least one electronic component.
Abstract:
A semiconductor device having a package of a single in-line type includes a semiconductor chip, a package body that accommodates the semiconductor chip therein and defined by a pair of opposing major surfaces and a plurality of interconnection leads held by the package body to extend substantially perpendicularly to a bottom surface. Each of the interconnection leads consists of an inner lead part located inside the package body and an outer lead part located outside the package body, the outer lead part being bent laterally at a boundary between the inner part and the outer part, in one of first and second directions that are opposite from each other and substantially perpendicular to the opposing major surfaces of the package body. A plurality of support legs extend laterally at the bottom surface of the package body for supporting the package body upright when the semiconductor device is placed on a substrate.
Abstract:
A semiconductor device having both bottom-side contacts and peripheral contacts provides surface mounting options. In one form, a semiconductor device die is positioned at a die receiving area of a leadframe. The leadframe also has a plurality of leads, each lead having a first and a second contact portion which are separated by an intermediate portion. A package body encapsulates the semiconductor device die and intermediate portions of the plurality of leads. The first contact portions of the leads are partially exposed on the bottom surface of the package body. The second contact portions extend from the package body along a portion of the package body perimeter. The first contact portions provide bottom-side contacts to the device, while the second contact portions provide peripheral contacts. The second contact portions are shaped into a desired lead configuration or are severed to establish a leadless device.
Abstract:
A structure of an electronic part which may be mounted on and soldered to the surface of a printed circuit board, and a method of mounting such an electronic part. While the electronic part mounted on the circuit board is operation, heat generated by the part is efficiently radiated to the ambience. Connecting terminals extending out from the electronic part are firmly soldered to the circuit board by a minimum of heat, whereby the bonding strength and the strength against shocks are enhanced. The electronic part of interest and other electronic parts neighboring it are free from damage ascriable to heat when the former has connecting terminals thereof soldered to the circuit board. When the connecting terminals of the electronic part are soldered to the circuit board by a laser beam. Other electronic parts mounted on the circuit board are prevented from being damaged by the laser beam.
Abstract:
A semiconductor device having improved construction of connection leads extending from the chip carrier housing for connecting a semiconductor chip in the housing with the external circuitry. The connection leads are arranged in the form of a plurality of concentric arrays. The leads in the outermost array are composed of surface connection leads to be electrically connected to the uppermost layer of a multilayer printed board to which the semiconductor device will be mounted, and the leads in the inner array or arrays are composed of lead pins to be inserted into and be electrically connected to the through holes of the multilayer printed board.
Abstract:
Provided is a MOSFET device for use with a printed circuit board (PCB) of a battery management system (BMS), the device including a semiconductor body; a metal conductor extending outwardly from a side of the semiconductor body; a plurality of power pins extending outwardly from at least one side of the semiconductor body, the power pins having tips bent downwardly; a gate pin extending outwardly from at least one side of the semiconductor body, wherein the tip of the gate pin is raised or elevated relative to the tips of the power pins so as to avoid electrical contact with the one of the spaced apart copper plates, and wherein the tip of the gate pin is connected to a circuit of the battery management system (BMS).
Abstract:
A substrate structure is provided. The substrate structure includes a first substrate, a plurality of first elastomer pins arranged on the first substrate, an elastic body disposed on the first substrate to surround the plurality of first elastomer pins, the elastic body including a plurality of spaces for receiving a plurality of solder balls on a second substrate connected to the first substrate, and a plurality of solder ball holders arranged on a boundary area of an opening of each of the plurality of spaces, wherein each of the plurality of solder ball holders has strength higher than that of the elastic body, and wherein each of the plurality of solder ball holders includes a plurality of pieces.
Abstract:
A surface mount module form factor comprises a substrate having a bottom surface, a top surface, and an outer periphery, with at least one electronic component mounted on the substrate, and a plurality of land grid array pads mounted on the bottom surface of the substrate. At least some of the land grid array pads are coupled to the at least one electronic component. A plurality of castellated edge pads are mounted around the outer periphery of the substrate, with at least some of the castellated edge pads coupled to the at least one electronic component. At least some of the land grid array pads are mapped to at least some of the castellated edge pads.
Abstract:
An apparatus includes a set of first metal contact pads disposed on a low temperature co-fired ceramic substrate. A plurality of metalized interconnectors extend between a digital electronic component and the low temperature co-fired ceramic substrate. The apparatus is configured to operate at a temperature greater than 250 degrees Celsius.