公开(公告)号：US20160172320A1

公开(公告)日：2016-06-16

申请号：US14566185

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： RAJASEKARAN SWAMINATHAN ,  RAVINDRANATH V. MAHAJAN

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11418 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13355 ,  H01L2224/13357 ,  H01L2224/1336 ,  H01L2224/13387 ,  H01L2224/13411 ,  H01L2224/13447 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2224/75264 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81222 ,  H01L2224/81409 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/0341 ,  H05K2201/083 ,  H05K2201/10674 ,  H05K2203/104 ,  Y02P70/613 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/05381 ,  H01L2924/053 ,  H01L2924/0532 ,  H01L2924/01056

Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.

公开(公告)号：US20160100482A1

公开(公告)日：2016-04-07

申请号：US14874647

申请日：2015-10-05

Applicant: IBIDEN CO., LTD.

Inventor： Masatoshi Kunieda

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/09 ,  H05K3/46 ,  H05K3/02 ,  H05K3/06

CPC classification number: H05K3/4007 ,  H01L24/00 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H05K2201/0341 ,  H05K2201/0367 ,  H01L2224/45099

Abstract: A printed wiring board includes a resin insulating layer, a conductor layer formed on the resin insulating layer and including conductor pads, a solder resist layer formed on the resin insulating layer such that the solder resist layer is covering the conductor layer and has opening portions exposing the conductor pads, respectively, and metal posts formed on the conductor pads such that each of the metal posts is protruding from the solder resist layer and has a side surface forming an angle with respect to a surface of the solder resist layer.

Abstract translation: 印刷布线板包括树脂绝缘层，形成在树脂绝缘层上并包括导体焊盘的导体层，形成在树脂绝缘层上的阻焊层，使得阻焊层覆盖导体层并具有露出部分的开口部分 导体焊盘和形成在导体焊盘上的金属柱，使得每个金属柱从阻焊层突出并且具有与阻焊层的表面成一角度的侧表面。

公开(公告)号：US20150316242A1

公开(公告)日：2015-11-05

申请号：US14761981

申请日：2014-01-20

Applicant: Sharp Kabushiki Kaisha

Inventor： Masahiro KONISHI ,  Yuhsuke FUJITA ,  Ippei YAMAGUCHI ,  Takashi NAKANISHI ,  Hiroyuki NOKUBO

IPC: F21V23/00 ,  F21K99/00

CPC classification number: F21V23/002 ,  F21K9/00 ,  F21Y2115/10 ,  H01L33/62 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H05K1/053 ,  H05K3/246 ,  H05K3/247 ,  H05K2201/0341 ,  H05K2201/10106 ,  H05K2201/10409 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In a light-emitting device (30), a wiring pattern including conductor wirings (160, 165) and electrodes (170, 180) is formed on a substrate (110), and an Au layer (120) is formed on the wiring pattern.

Abstract translation: 在发光装置（30）中，在基板（110）上形成包括导体布线（160,165）和电极（170,180）的布线图案，并且在布线图案上形成Au层（120） 。

公开(公告)号：US09066458B2

公开(公告)日：2015-06-23

申请号：US13544994

申请日：2012-07-10

Applicant: Chen-Yueh Kung

Inventor： Chen-Yueh Kung

IPC: H05K7/10 ,  H05K3/40 ,  H05K1/11 ,  H05K3/28 ,  H05K3/10 ,  H05K3/34 ,  H01L23/00

CPC classification number: H05K3/4007 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2924/12042 ,  H05K1/111 ,  H05K3/108 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/0341 ,  H05K2201/099 ,  H05K2203/0588 ,  H05K2203/1383 ,  Y02P70/611 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of fabricating a circuit board includes the following steps. A first and a second patterned conductive layer are plated on the first and the second surface of a core substrate, respectively. A first and a second extending pad are individually plated on a first and a second pad of the first and the second patterned conductive layer, respectively. A first and a second thermal-curing type dielectric layer are individually formed on the first and the second surface to cover the first and the second patterned conductive layer and the first and the second extending pad, respectively. A portion of the first and the second thermal-curing type dielectric layer respectively covering the top of the first and the second extending pad are removed. A protective film covers the second extending pad. The extending pad is removed by an etching process.

Abstract translation: 制造电路板的方法包括以下步骤。 第一和第二图案化导电层分别电镀在芯基板的第一和第二表面上。 第一和第二延伸焊盘分别电镀在第一和第二图案化导电层的第一和第二焊盘上。 第一和第二热固化型电介质层分别形成在第一和第二表面上以分别覆盖第一和第二图案化导电层以及第一和第二延伸焊盘。 分别覆盖第一和第二延伸垫的顶部的第一和第二热固化型电介质层的一部分被去除。 保护膜覆盖第二延伸垫。 通过蚀刻工艺去除延伸垫。

公开(公告)号：US20150136728A1

公开(公告)日：2015-05-21

申请号：US14264193

申请日：2014-04-29

Applicant: Samsung Display Co., Ltd. ,  Cowon Innotech Inc.

Inventor： Bong-Yeon Kim ,  Jin-Ho Ju ,  Jun-Hyuk Woo ,  Jung-Hwan Song ,  Seok-Ho Lee ,  Seong-Sik Jeon ,  Jong-Su Han

IPC: C11D11/00 ,  H05K3/06 ,  C11D7/06 ,  C11D7/32 ,  C11D7/26 ,  C11D7/08 ,  H01L21/02 ,  H05K3/26

CPC classification number: C23F1/16 ,  C11D7/06 ,  C11D7/08 ,  C11D7/265 ,  C11D7/3209 ,  C11D7/3245 ,  C11D11/0047 ,  C23F11/04 ,  H01L21/02068 ,  H05K1/0306 ,  H05K3/064 ,  H05K3/26 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2201/0341 ,  H05K2203/124 ,  H05K2203/125

Abstract: A cleaning composition includes about 0.01 to about 5 wt % of a chelating agent; about 0.01 to about 0.5 wt % of an organic acid; about 0.01 to about 1.0 wt % of an inorganic acid; about 0.01 to about 5 wt % of an alkali compound; and deionized water.

Abstract translation: 清洁组合物包含约0.01至约5重量％的螯合剂; 约0.01至约0.5重量％的有机酸; 约0.01至约1.0重量％的无机酸; 约0.01至约5重量％的碱金属化合物; 和去离子水。

公开(公告)号：US20140329107A1

公开(公告)日：2014-11-06

申请号：US14346025

申请日：2012-09-10

Applicant: Yoshitaka Shibuya ,  Kazuhiko Fukamachi ,  Atsushi Kodama

Inventor： Yoshitaka Shibuya ,  Kazuhiko Fukamachi ,  Atsushi Kodama

IPC: H01B1/02 ,  B32B15/01

CPC classification number: H01B1/02 ,  B32B15/01 ,  B32B15/018 ,  C22C5/06 ,  C22C5/08 ,  C22C5/10 ,  C22C9/00 ,  C22C9/02 ,  C22C9/04 ,  C22C13/00 ,  C22C13/02 ,  C22C19/03 ,  C22C19/07 ,  C22C22/00 ,  C22C27/06 ,  C22C38/00 ,  C23C18/1651 ,  C23C18/1692 ,  C25D3/12 ,  C25D3/20 ,  C25D3/30 ,  C25D3/38 ,  C25D3/46 ,  C25D3/50 ,  C25D3/567 ,  C25D3/62 ,  C25D3/64 ,  C25D5/10 ,  C25D5/12 ,  C25D5/505 ,  H01R13/03 ,  H05K1/117 ,  H05K1/118 ,  H05K3/244 ,  H05K2201/0341 ,  Y10T428/12681 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722

Abstract: There are provided a metal material for electronic component which has low insertability/extractability, low whisker formability, and high durability, and a method for manufacturing the metal material. The metal material 10 for electronic components has a base material 11, an A layer 14 constituting a surface layer on the base material 11 and formed of Sn, In or an alloy thereof, and a B layer 13 constituting a middle layer provided between the base material 11 and the A layer 14 and formed of Ag, Au, Pt, Pd, Ru, Rh, Os, Ir or an alloy thereof, wherein the surface layer (A layer) 14 has a thickness of 0.002 to 0.2 μm, and the middle layer (B layer) 13 has a thickness of 0.001 to 0.3 μm.

Abstract translation: 提供了具有低插入性/提取性，低晶须成形性和高耐久性的电子部件用金属材料以及金属材料的制造方法。 用于电子部件的金属材料10具有基材11，构成基材11的表层的A层14，其由Sn，In或其合金形成，B层13构成中间层， 材料11和A层14，由Ag，Au，Pt，Pd，Ru，Rh，Os，Ir或其合金形成，其中表面层（A层）14的厚度为0.002〜0.2μm， 中间层（B层）13的厚度为0.001〜0.3μm。

公开(公告)号：US08779300B2

公开(公告)日：2014-07-15

申请号：US13355311

申请日：2012-01-20

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H05K1/11 ,  H01L29/40 ,  H01L23/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L24/00 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/13006 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13171 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/3473 ,  H05K3/4007 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2203/054 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

Abstract: A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad and a thickness of the stress buffer metal layer being 1-20 μm, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post.

Abstract translation: 提供一种具有导电结构的封装基板，包括其表面上具有至少一个导电焊盘的基板主体，设置在导电焊盘上的应力缓冲金属层，应力缓冲金属层的厚度为1-20μm， 防焊层设置在基板主体上并且在其中具有至少一个开口，用于相应地暴露应力缓冲金属层的顶表面的一部分，设置在应力缓冲金属层的表面的中心部分上的金属柱，以及 焊料凸块覆盖金属柱的表面。

公开(公告)号：US08547663B2

公开(公告)日：2013-10-01

申请号：US13317599

申请日：2011-10-24

Applicant: Yuu Sugimoto

Inventor： Yuu Sugimoto

IPC: G11B5/48 ,  H05K1/09

CPC classification number: H05K1/11 ,  G11B5/486 ,  H05K1/0268 ,  H05K1/056 ,  H05K3/4007 ,  H05K2201/0341 ,  H05K2203/0323

Abstract: A suspension board with circuit includes a metal supporting board; an insulating layer formed on the metal supporting board having an opening penetrating in the thickness direction formed therein; and a conductive pattern formed on the insulating layer including an external-side terminal electrically connected to an external board. The external-side terminal is filled in the opening of the insulating layer. In the metal supporting board, a support terminal electrically insulated from the surrounding metal supporting board and electrically connected to the external-side terminal is provided. The suspension board with circuit includes a metal plating layer formed below the support terminal and an electrically-conductive layer interposed between the support terminal and the metal plating layer having a thickness of 10 nm or more to 200 nm or less.

Abstract translation: 具有电路的悬挂板包括金属支撑板; 绝缘层，形成在所述金属支撑板上，具有沿其形成的厚度方向贯通的开口; 以及形成在绝缘层上的导电图案，包括与外部电路电连接的外侧端子。 外侧端子填充在绝缘层的开口部中。 在金属支撑板中，设置有与周围金属支撑板电绝缘并与外部侧端子电连接的支撑端子。 具有电路的悬挂板包括形成在支撑端子下方的金属镀层和插入在支撑端子和金属镀层之间的厚度为10nm以上至200nm以下的导电层。

公开(公告)号：US08499446B2

公开(公告)日：2013-08-06

申请号：US13187060

申请日：2011-07-20

Applicant: Toru Nakai ,  Sho Akai

Inventor： Toru Nakai ,  Sho Akai

IPC: H05K3/02 ,  C25D5/02

CPC classification number: H05K3/4644 ,  H05K3/108 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0341 ,  H05K2201/0347 ,  H05K2201/0959 ,  H05K2203/073 ,  Y10T29/4913 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49165

Abstract: A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.

Abstract translation: 一种制造多层印刷线路板的方法包括在第一层间树脂绝缘层上形成第一层间树脂绝缘层，第一导体电路，第二层间树脂绝缘层，第二层间树脂绝缘层中的开口部分，露出面 第一导体电路的第二层间树脂绝缘层上的无电镀膜和暴露面，以及化学镀膜上的电镀抗蚀剂。 该方法还包括用具有比无电镀膜低的离子倾向的薄膜导体层和暴露面的金属代替化学镀膜，在化学镀膜的一部分上形成包括金属的电镀膜 和薄膜导体层，剥离电镀抗蚀剂，以及除去通过剥离暴露的化学镀膜。

公开(公告)号：US20130057451A1

公开(公告)日：2013-03-07

申请号：US13464775

申请日：2012-05-04

Applicant: Sandra Louise Petty-Weeks ,  Guohao Zhang ,  Hardik Bhupendra Modi

Inventor： Sandra Louise Petty-Weeks ,  Guohao Zhang ,  Hardik Bhupendra Modi

IPC: H01P3/08 ,  H01Q1/50

CPC classification number: H01L24/85 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48159 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/48844 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/1421 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K3/244 ,  H05K2201/0341 ,  H01L2924/00014 ,  H01L2924/00

Abstract: This disclosure relates to a transmission line for high performance radio frequency (RF) applications. One such transmission line can include a bonding layer configured to receive an RF signal, a barrier layer, a diffusion barrier layer, and a conductive layer proximate to the diffusion barrier layer. The diffusion barrier layer can have a thickness that allows a received RF signal to penetrate the diffusion barrier layer to the conductive layer. In certain implementations, the diffusion barrier layer can be nickel. In some of these implementations, the transmission line can include a gold bonding layer, a palladium barrier layer, and a nickel diffusion barrier layer.

Abstract translation: 本公开涉及用于高性能射频（RF）应用的传输线。 一个这样的传输线可以包括被配置为接收RF信号的结合层，阻挡层，扩散阻挡层和靠近扩散阻挡层的导电层。 扩散阻挡层可以具有允许接收的RF信号穿透到导电层的扩散阻挡层的厚度。 在某些实施方案中，扩散阻挡层可以是镍。 在这些实施方案中，传输线可以包括金结合层，钯阻挡层和镍扩散阻挡层。