Printed circuit board and manufacturing method thereof
    62.
    发明申请
    Printed circuit board and manufacturing method thereof 审中-公开
    印刷电路板及其制造方法

    公开(公告)号:US20110061912A1

    公开(公告)日:2011-03-17

    申请号:US12654668

    申请日:2009-12-29

    摘要: Provided are a printed circuit board (PCB), and a manufacturing method thereof. The PCB includes a stacked structure including second and third insulation layers with a first insulation layer interposed therebetween, and a conductive via having first to fourth conductive vias. A second-layer circuit pattern and a third-layer circuit pattern are buried in the first insulation layer, a first-layer circuit pattern is formed on the second insulation layer, and a fourth-layer circuit pattern is formed on the third insulation layer. A first conductive via connects the first-layer circuit pattern and the second-layer circuit pattern, a second conductive via connects the first-layer circuit pattern and the third-layer circuit pattern, a third conductive via connects the second-layer circuit pattern and the fourth-layer circuit pattern, and a fourth conductive via connects the third-layer circuit pattern and the fourth-layer circuit pattern.

    摘要翻译: 提供了一种印刷电路板(PCB)及其制造方法。 PCB包括堆叠结构,其包括其间插入有第一绝缘层的第二绝缘层和第三绝缘层,以及具有第一至第四导电通孔的导电通孔。 在第一绝缘层中埋设第二层电路图形和第三层电路图案,在第二绝缘层上形成第一层电路图案,在第三绝缘层上形成第四层电路图形。 第一导电通孔连接第一层电路图案和第二层电路图案,第二导电通孔连接第一层电路图案和第三层电路图案,第三导电通孔连接第二层电路图案和 第四层电路图案和第四导电通孔连接第三层电路图案和第四层电路图案。

    Carrier used in the manufacture of substrate and method of manufacturing substrate using the carrier
    66.
    发明申请
    Carrier used in the manufacture of substrate and method of manufacturing substrate using the carrier 审中-公开
    用于制造基板的载体和使用载体制造基板的方法

    公开(公告)号:US20100147559A1

    公开(公告)日:2010-06-17

    申请号:US12382359

    申请日:2009-03-13

    IPC分类号: H05K1/02 H05K3/02

    摘要: The invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier, the method including (A) preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; (B) patterning the metal layers to form base circuit layers; (C) forming buildup layers on the base circuit layers; (D) executing a routing process to separate the insulating layers from the releasing layer; and (E) forming solder-resist layers on the buildup layers and forming openings in-the solder-resist layers and the insulating layers to expose pads.

    摘要翻译: 本发明涉及用于制造基板的载体和使用该载体制造基板的方法,该方法包括:(A)制备包括释放层的载体,以及顺序地设置在两侧的绝缘层和金属层 释放层; (B)图案化金属层以形成基极电路层; (C)在基极电路层上形成积层; (D)执行路由处理以将绝缘层与释放层分离; 和(E)在积层上形成阻焊层,并在阻焊层和绝缘层中形成开口以露出焊盘。

    Buried pattern substrate
    68.
    发明申请
    Buried pattern substrate 审中-公开
    埋地图案衬底

    公开(公告)号:US20090242238A1

    公开(公告)日:2009-10-01

    申请号:US12457166

    申请日:2009-06-02

    IPC分类号: H05K1/09

    摘要: A buried pattern substrate includes an insulation layer; a circuit pattern buried in the insulation layer such that a part thereof is exposed at a surface of the insulation layer; and a stud bump buried in the insulation layer such that one end portion is exposed at one surface of the insulation layer, and such that the other end portion is exposed at the other surface of the insulation layer.

    摘要翻译: 掩埋图案衬底包括绝缘层; 埋置在绝缘层中的电路图案,使得其一部分在绝缘层的表面露出; 以及埋在所述绝缘层中的螺柱凸起,使得一个端部暴露在所述绝缘层的一个表面处,并且使得所述另一端部暴露在所述绝缘层的另一个表面处。