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公开(公告)号:US08636559B2
公开(公告)日:2014-01-28
申请号:US13618836
申请日:2012-09-14
申请人: Chen-Fa Lu , Chiang-Hao Lee , Wei-Yu Chen , Chung-Shi Liu
发明人: Chen-Fa Lu , Chiang-Hao Lee , Wei-Yu Chen , Chung-Shi Liu
CPC分类号: H01L21/67265 , B24B7/228 , B24B41/061 , B24B49/16 , H01L21/304
摘要: A method of reducing manufacturing defects of semiconductor wafers during a back-grinding process. The method includes receiving a semiconductor wafer on a chuck table, wherein said chuck table has a surface upon which a front side of the wafer is placed, and wherein said chuck table has one or more holes in surface and one or more sensors placed in said one or more holes. The method further includes grinding at least a portion of a back side of the semiconductor wafer. The method further includes monitoring a parameter, while grinding, measured by the one or more sensors and adjusting the grinding based at least on the monitored parameter.
摘要翻译: 在后磨工序中减少半导体晶片的制造缺陷的方法。 该方法包括在卡盘台上接收半导体晶片,其中所述卡盘台具有放置晶片前侧的表面,并且其中所述卡盘台具有一个或多个表面孔,并且一个或多个传感器放置在所述 一个或多个孔。 该方法还包括研磨半导体晶片的背面的至少一部分。 该方法还包括在由一个或多个传感器测量的磨削过程中监测参数,并且至少基于所监测的参数来调整磨削。
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公开(公告)号:US20140008786A1
公开(公告)日:2014-01-09
申请号:US13544783
申请日:2012-07-09
申请人: Meng-Tse Chen , Wei-Hung Lin , Chih-Wei Lin , Kuei-Wei Huang , Hui-Min Huang , Ming-Da Cheng , Chung-Shi Liu
发明人: Meng-Tse Chen , Wei-Hung Lin , Chih-Wei Lin , Kuei-Wei Huang , Hui-Min Huang , Ming-Da Cheng , Chung-Shi Liu
IPC分类号: H01L23/498 , H01L21/60
CPC分类号: H01L23/3157 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/10175 , H01L2224/1146 , H01L2224/11849 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16238 , H01L2224/73204 , H01L2224/81191 , H01L2224/81385 , H01L2224/81815 , H01L2924/12042 , H01L2924/15311 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00
摘要: A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer covering the top surface of the first package component, the first metal trace and the second metal trace, wherein the dielectric mask layer has an opening therein exposing the first metal trace. The device also includes a second package component and an interconnect formed on the second package component, the interconnect having a metal bump and a solder bump formed on the metal bump, wherein the solder bump contacts the first metal trace in the opening of the dielectric mask layer.
摘要翻译: 一种装置包括第一包装部件和第一包装部件的顶表面上的第一金属痕迹和第二金属迹线。 该装置还包括覆盖第一封装部件的顶表面,第一金属迹线和第二金属迹线的介电掩模层,其中介电掩模层具有其中的开口露出第一金属迹线。 该器件还包括形成在第二封装元件上的第二封装元件和互连,所述互连件具有形成在所述金属突起上的金属突起和焊料凸块,其中所述焊料凸点接触所述介电掩模的开口中的所述第一金属迹线 层。
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公开(公告)号:US20130276837A1
公开(公告)日:2013-10-24
申请号:US13598272
申请日:2012-08-29
申请人: Hui-Jung Tsai , Hung-Jui Kuo , Chung-Shi Liu
发明人: Hui-Jung Tsai , Hung-Jui Kuo , Chung-Shi Liu
CPC分类号: C11D11/0047 , C11D7/06 , C11D7/3218 , H01L21/02071 , H01L21/67051 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05583 , H01L2224/05644 , H01L2224/05647 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/1147 , H01L2224/1181 , H01L2224/13005 , H01L2224/13083 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13169 , H01L2224/13171 , H01L2224/13172 , H01L2224/13184 , H01L2924/00014 , H01L2924/01079 , H01L2924/01082 , H01L2924/206 , H01L2924/01047 , H01L2924/01029 , H01L2224/05552
摘要: Methods and chemical solvents used for cleaning residues on metal contacts during a semiconductor device packaging process are disclosed. A chemical solvent for cleaning a residue formed on a metal contact may comprise a reactive inorganic component and a reactive organic component. The method may comprise spraying a semiconductor device with a chemical solvent at a first pressure, and spraying the semiconductor device with the chemical solvent at a second pressure less than the first pressure.
摘要翻译: 公开了在半导体器件封装过程中用于清洁金属触点上残留物的方法和化学溶剂。 用于清洁在金属接触物上形成的残余物的化学溶剂可以包含反应性无机组分和反应性有机组分。 该方法可以包括在第一压力下喷射具有化学溶剂的半导体器件,以及在低于第一压力的第二压力下用化学溶剂喷射半导体器件。
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公开(公告)号:US08501613B2
公开(公告)日:2013-08-06
申请号:US13178276
申请日:2011-07-07
申请人: Yi-Yang Lei , Hung-Jui Kuo , Chung-Shi Liu , Mirng-Ji Lii , Chen-Hua Yu
发明人: Yi-Yang Lei , Hung-Jui Kuo , Chung-Shi Liu , Mirng-Ji Lii , Chen-Hua Yu
IPC分类号: H01L21/44
CPC分类号: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/036 , H01L2224/03632 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05564 , H01L2224/05572 , H01L2224/05647 , H01L2224/11424 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/13007 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2924/04941 , H01L2924/04953 , H01L2924/014 , H01L2924/01047 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要: A method includes forming an under-bump metallurgy (UBM) layer overlying a substrate, and forming a mask overlying the UBM layer. The mask covers a first portion of the UBM layer, and a second portion of the UBM layer is exposed through an opening in the mask. A metal bump is formed in the opening and on the second portion of the UBM layer. The mask is then removed. A laser removal is performed to remove a part of the first portion of the UBM layer and to form an UBM.
摘要翻译: 一种方法包括形成覆盖衬底的凸起下金属(UBM)层,以及形成覆盖UBM层的掩模。 掩模覆盖UBM层的第一部分,并且UBM层的第二部分通过掩模中的开口暴露。 在UBM层的开口和第二部分上形成金属凸块。 然后取下面具。 执行激光去除以去除UBM层的第一部分的一部分并形成UBM。
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公开(公告)号:US20130134588A1
公开(公告)日:2013-05-30
申请号:US13397747
申请日:2012-02-16
申请人: Chen-Hua Yu , Mirng-Ji Lii , Chung-Shi Liu , Ming-Da Cheng
发明人: Chen-Hua Yu , Mirng-Ji Lii , Chung-Shi Liu , Ming-Da Cheng
IPC分类号: H01L23/498
CPC分类号: H01L25/0657 , H01L23/49811 , H01L23/49816 , H01L23/49894 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L25/105 , H01L25/50 , H01L2224/038 , H01L2224/0401 , H01L2224/04042 , H01L2224/05023 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05552 , H01L2224/05564 , H01L2224/05568 , H01L2224/05573 , H01L2224/05611 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05693 , H01L2224/11019 , H01L2224/1134 , H01L2224/11823 , H01L2224/11825 , H01L2224/1184 , H01L2224/13017 , H01L2224/13018 , H01L2224/13019 , H01L2224/13023 , H01L2224/13082 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13562 , H01L2224/1357 , H01L2224/1358 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2224/16057 , H01L2224/16058 , H01L2224/16148 , H01L2224/16225 , H01L2224/16503 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48 , H01L2224/48611 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48693 , H01L2224/48711 , H01L2224/48724 , H01L2224/48744 , H01L2224/48747 , H01L2224/48755 , H01L2224/48764 , H01L2224/48793 , H01L2224/48811 , H01L2224/48824 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/48864 , H01L2224/48893 , H01L2224/73204 , H01L2224/81009 , H01L2224/81026 , H01L2224/81192 , H01L2224/81193 , H01L2224/81815 , H01L2224/83104 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2225/1023 , H01L2225/1058 , H01L2924/00012 , H01L2924/00014 , H01L2924/01015 , H01L2924/01047 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/157 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2224/81 , H01L2924/01029 , H01L2924/01006
摘要: Package-On-Package (PoP) structures and methods of forming PoP structures are disclosed. According to an embodiment, a structure comprises a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
摘要翻译: 封装封装(PoP)结构和形成PoP结构的方法被公开。 根据实施例,一种结构包括第一基板,螺柱灯泡,模具,第二基板和电连接器。 螺柱灯泡耦合到第一基板的第一表面。 模具附接到第一基板的第一表面。 电连接器耦合到第二基板,并且相应的电连接器耦合到相应的螺柱灯泡。
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公开(公告)号:US20130127059A1
公开(公告)日:2013-05-23
申请号:US13299100
申请日:2011-11-17
申请人: Chih-Wei Lai , Ming-Che Ho , Tzong-Hann Yang , Chien Rhone Wang , Chia-Tung Chang , Hung-Jui Kuo , Chung-Shi Liu
发明人: Chih-Wei Lai , Ming-Che Ho , Tzong-Hann Yang , Chien Rhone Wang , Chia-Tung Chang , Hung-Jui Kuo , Chung-Shi Liu
CPC分类号: G06F17/5077 , G06F17/5072 , H01L23/488 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/034 , H01L2224/03912 , H01L2224/0401 , H01L2224/05016 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05552 , H01L2224/05572 , H01L2224/05666 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/13006 , H01L2224/13012 , H01L2224/13014 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/1403 , H01L2224/14132 , H01L2924/00014 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029
摘要: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
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公开(公告)号:US08440562B2
公开(公告)日:2013-05-14
申请号:US12881939
申请日:2010-09-14
申请人: Chung-Shi Liu , Chen-Hua Yu
发明人: Chung-Shi Liu , Chen-Hua Yu
IPC分类号: H01L21/44
CPC分类号: H01L23/53295 , H01L21/76834 , H01L21/76835 , H01L21/76849 , H01L21/76856 , H01L21/76867 , H01L21/76886 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure and methods of forming the same are provided. The semiconductor structure includes a semiconductor substrate; a first dielectric layer over the semiconductor substrate; a conductive wiring in the first dielectric layer; and a copper germanide nitride layer over the conductive wiring.
摘要翻译: 提供半导体结构及其形成方法。 半导体结构包括半导体衬底; 半导体衬底上的第一电介质层; 第一电介质层中的导电布线; 以及导电布线上的锗锗化锗氮化物层。
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公开(公告)号:US20130115735A1
公开(公告)日:2013-05-09
申请号:US13289719
申请日:2011-11-04
申请人: Meng-Tse Chen , Hsiu-Jen Lin , Chun-Cheng Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
发明人: Meng-Tse Chen , Hsiu-Jen Lin , Chun-Cheng Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
CPC分类号: H01L24/97 , B29C33/68 , B29C43/18 , H01L21/563 , H01L21/566 , H01L2224/16225 , H01L2924/01322 , H01L2924/181 , H01L2924/00
摘要: Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed.
摘要翻译: 用于成型模制底部填料的方法和装置。 公开了一种方法,其包括在第一温度下将倒装芯片衬底加载到模压机的上模追逐和下模追逐中的所选择的一个中; 将模制的底部填充材料定位在上模具和下模具中的至少一个中,同时保持低于模制的底部填充材料的熔融温度的第一温度; 形成密封的模腔并在模腔中产生真空; 将模制的底部填充材料的温度提高到大于熔点的第二温度,以使模制的底部填充材料在形成底部填充层的倒装芯片衬底上流动并形成包覆成型层; 并将所述倒装芯片基板冷却至基本上低于所述模制底部填充材料的熔融温度的第三温度。 公开了一种装置。
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公开(公告)号:US20130102112A1
公开(公告)日:2013-04-25
申请号:US13280163
申请日:2011-10-24
申请人: Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
发明人: Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
CPC分类号: H01L24/75 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/97 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/75272 , H01L2224/75314 , H01L2224/75704 , H01L2224/7598 , H01L2224/81191 , H01L2224/81208 , H01L2224/8121 , H01L2224/81815 , H01L2224/94 , H01L2224/97 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/014
摘要: A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat.
摘要翻译: 一种方法包括将第一包装部件装载在凹形船上,以及将第二包装部件放置在第一包装部件上。 负载夹具放置在第二包装部件上,其中负载夹具由凹形舟皿的温度可变的间隔件支撑。 执行回流步骤以将第二包装部件粘合到第一包装部件。 在回流步骤的升温步骤期间,温度可变的间隔件响应于温度升高而软化,并且软化的温度可变间隔件的高度减小,直到负载夹具被刚性间隔件 凹船。
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公开(公告)号:US20130095611A1
公开(公告)日:2013-04-18
申请号:US13276143
申请日:2011-10-18
申请人: Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu
发明人: Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu
IPC分类号: H01L21/56
摘要: Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.
摘要翻译: 公开了半导体器件的封装方法。 在一个实施例中,封装半导体器件的方法包括提供包括多个封装衬底的工件。 在多个包装基板之间移除一部分工件。 模具附接到多个封装基板中的每一个。
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