公开(公告)号：US09691938B2

公开(公告)日：2017-06-27

申请号：US14976337

申请日：2015-12-21

Applicant: THE SILANNA GROUP PTY LTD.

Inventor： Petar Atanackovic ,  Matthew Godfrey

IPC: H01L21/00 ,  H01L33/06 ,  H01L33/00 ,  H01L33/16 ,  H01L33/32 ,  H01L21/02 ,  H01L27/15 ,  H01L33/10 ,  H01L33/14 ,  H01L33/18

CPC classification number: H01L33/06 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/15 ,  H01L33/007 ,  H01L33/10 ,  H01L33/14 ,  H01L33/16 ,  H01L33/18 ,  H01L33/32

Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

公开(公告)号：US20170179337A1

公开(公告)日：2017-06-22

申请号：US15452543

申请日：2017-03-07

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU Leuven R&D

Inventor： Hugo Bender ,  Yang Qiu

IPC: H01L33/00 ,  H01L33/24 ,  H01L33/34 ,  H01L31/18 ,  H01L31/036 ,  H01L31/0352 ,  H01L31/028 ,  H01L33/18 ,  H01L33/08

CPC classification number: H01L33/0095 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/76224 ,  H01L21/76229 ,  H01L29/0649 ,  H01L31/028 ,  H01L31/03529 ,  H01L31/036 ,  H01L31/1804 ,  H01L31/1864 ,  H01L33/0054 ,  H01L33/08 ,  H01L33/18 ,  H01L33/24 ,  H01L33/28 ,  H01L33/34

Abstract: An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.

公开(公告)号：US09627199B2

公开(公告)日：2017-04-18

申请号：US14568576

申请日：2014-12-12

Applicant: University of Maryland, College Park ,  Northrop Grumman Systems Corporation ,  The United States of America, as Represented by the Secretary of Commerce

Inventor： Abhishek Motayed ,  Sergiy Krylyuk ,  Albert V. Davydov ,  Matthew King ,  Jong-Yoon Ha

IPC: H01L21/02 ,  H01L33/00 ,  H01L21/306 ,  H01L21/3065 ,  H01L33/18 ,  H01L33/32

CPC classification number: H01L21/0259 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0257 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/30612 ,  H01L21/30617 ,  H01L21/30621 ,  H01L21/3065 ,  H01L33/007 ,  H01L33/18 ,  H01L33/32

Abstract: Methods of fabricating micro- and nanostructures comprise top-down etching of lithographically patterned GaN layer to form an array of micro- or nanopillar structures, followed by selective growth of GaN shells over the pillar structures via selective epitaxy. Also provided are methods of forming micro- and nanodisk structures and microstructures formed from thereby.

公开(公告)号：US20170092734A1

公开(公告)日：2017-03-30

申请号：US15373847

申请日：2016-12-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Anthony J. Lochtefeld

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/04 ,  H01L31/0352 ,  H01L33/24 ,  H01L31/18 ,  H01L33/00 ,  H01L33/06 ,  H01L33/08 ,  H01L33/18 ,  H01L31/036

CPC classification number: H01L29/6609 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/04 ,  H01L29/045 ,  H01L29/882 ,  H01L31/0352 ,  H01L31/035209 ,  H01L31/035236 ,  H01L31/036 ,  H01L31/18 ,  H01L31/1804 ,  H01L31/1812 ,  H01L31/1836 ,  H01L33/005 ,  H01L33/0054 ,  H01L33/06 ,  H01L33/08 ,  H01L33/18 ,  H01L33/24 ,  Y02E10/541 ,  Y02E10/543 ,  Y02E10/544 ,  Y02E10/547 ,  Y02P70/521

Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.

公开(公告)号：US20170047482A1

公开(公告)日：2017-02-16

申请号：US15339325

申请日：2016-10-31

Applicant: NICHIA CORPORATION

Inventor： Atsuo MICHIUE

IPC: H01L33/18 ,  H01L33/24 ,  H01L33/32 ,  H01L33/00 ,  H01L33/12

CPC classification number: H01L33/18 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/12 ,  H01L33/16 ,  H01L33/20 ,  H01L33/24 ,  H01L33/32

Abstract: A method for producing a nitride semiconductor device. The method comprises providing a substrate made of a material other than a nitride semiconductor. The material has a hexagonal crystal structure. An upper face of the substrate has at least one flat section. The method further comprises growing a first nitride semiconductor layer on the upper face of the substrate. The first nitride semiconductor layer is made of monocrystalline AlN. The first nitride semiconductor layer has an upper face that is a +c plane. The first nitride semiconductor layer has a thickness in a range of 10 nm to 100 nm. The method further comprises growing a second nitride semiconductor layer on the upper face of the first nitride semiconductor layer. The second nitride semiconductor layer is made of InXAlYGa1-X-YN (0≦X, 0≦Y, X+Y

Abstract translation: 一种氮化物半导体器件的制造方法。 该方法包括提供由氮化物半导体以外的材料制成的衬底。 该材料具有六方晶系结构。 基板的上表面具有至少一个平坦部分。 该方法还包括在衬底的上表面上生长第一氮化物半导体层。 第一氮化物半导体层由单晶AlN制成。 第一氮化物半导体层具有+ c面的上表面。 第一氮化物半导体层的厚度为10nm〜100nm。 该方法还包括在第一氮化物半导体层的上表面上生长第二氮化物半导体层。 第二氮化物半导体层由InXAlYGa1-X-YN（0≤X，0≤Y，X + Y <1）制成。 在生长第二氮化物半导体层的初始阶段，微核在第一氮化物半导体层的上表面上的多个位置形成，使得多个上下六角锥形或上下六角形的截头锥形凹部分开 该微核位于衬底的上表面的至少一个平坦部分上方。 在生长的初始阶段之后，进行进一步的生长以减小凹槽的尺寸，直到基本上消除凹陷。 进行进一步的生长，使得在第二氮化物半导体层的厚度增长到800nm之前基本上消除了凹部。 第二氮化物半导体层生长成具有至少一个平坦部分的上表面。

公开(公告)号：US09543473B2

公开(公告)日：2017-01-10

申请号：US15072745

申请日：2016-03-17

Applicant: NGK INSULATORS, LTD.

Inventor： Morimichi Watanabe ,  Jun Yoshikawa ,  Yoshitaka Kuraoka ,  Tsutomu Nanataki

IPC: H01L33/18 ,  H01L33/32 ,  H01L33/00 ,  H01L33/16 ,  C30B9/12 ,  C30B19/02 ,  C30B19/12 ,  C30B29/40 ,  C30B25/18 ,  C30B28/04 ,  C30B29/60 ,  C30B9/00 ,  C30B25/20

CPC classification number: H01L33/18 ,  C30B9/00 ,  C30B9/12 ,  C30B19/02 ,  C30B19/12 ,  C30B25/18 ,  C30B25/20 ,  C30B28/04 ,  C30B29/406 ,  C30B29/605 ,  H01L33/0025 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/16 ,  H01L33/32

Abstract: Provided is a self-supporting polycrystalline GaN substrate composed of GaN-based single crystal grains having a specific crystal orientation in a direction approximately normal to the substrate. The crystal orientations of individual GaN-based single crystal grains as determined from inverse pole figure mapping by EBSD analysis on the substrate surface are distributed with tilt angles from the specific crystal orientation, the average tilt angle being 1 to 10°. There is also provided a light emitting device including the self-supporting substrate and a light emitting functional layer, which has at least one layer composed of semiconductor single crystal grains, the at least one layer having a single crystal structure in the direction approximately normal to the substrate. The present invention makes it possible to provide a self-supporting polycrystalline GaN substrate having a reduced defect density at the substrate surface, and to provide a light emitting device having a high luminous efficiency.

Abstract translation: 本发明提供一种由大致垂直于基板的方向具有特定结晶取向的GaN系单晶粒构成的自支撑多晶GaN衬底。 通过在基板表面上的EBSD分析的反极图映射确定的单个GaN基单晶晶粒的晶体取向以特定晶体取向倾斜角分布，平均倾斜角为1至10°。 还提供了一种包括自支撑基板和发光功能层的发光器件，该发光功能层具有至少一层由半导体单晶晶粒构成的层，所述至少一层具有大致垂直于 底物。 本发明使得可以提供在衬底表面上具有降低的缺陷密度的自支撑多晶GaN衬底，并且提供具有高发光效率的发光器件。

公开(公告)号：US20170005230A1

公开(公告)日：2017-01-05

申请号：US15199152

申请日：2016-06-30

Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Yohan DESIERES

IPC: H01L33/32 ,  H01L33/38 ,  H01L33/18 ,  H01L33/24 ,  H01L33/42

CPC classification number: H01L33/325 ,  H01L33/18 ,  H01L33/20 ,  H01L33/22 ,  H01L33/24 ,  H01L33/38 ,  H01L33/42

Abstract: Device successively including a substrate including a metal layer capable of reflecting a radiation; a first layer of a III/N type alloy, p-type doped, and including a first surface, opposite the metal layer, the first surface being provided with cavities; a light-emitting layer made of a III/N-type alloy, capable of generating the radiation; a second layer of a III/N-type alloy, n-type doped, having the radiation coming out therethrough; wherein a non-metallic filling material transparent in the spectral range is arranged within the cavities.

Abstract translation: 依次包括包括能够反射辐射的金属层的基板的装置; 第一层III型/ N型合金，p型掺杂，并且包括与金属层相对的第一表面，第一表面设置有空腔; 由能够产生辐射的III / N型合金制成的发光层; 具有n型掺杂的III / N型合金的第二层，具有从其中穿过的辐射; 其中在所述空腔内布置在所述光谱范围内透明的非金属填充材料。

公开(公告)号：US20160372630A1

公开(公告)日：2016-12-22

申请号：US15184924

申请日：2016-06-16

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jong Min Jang ,  Seon Min Bae ,  Chae Hon Kim

IPC: H01L33/02 ,  H01L33/40 ,  H01L33/38 ,  H01L33/24 ,  H01L33/18 ,  H01L33/08 ,  H01L33/62 ,  H01L33/44 ,  H01L33/32 ,  H01L33/42 ,  H01L33/16

CPC classification number: H01L33/025 ,  H01L33/08 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01L33/32 ,  H01L33/38 ,  H01L33/382 ,  H01L33/405 ,  H01L33/42 ,  H01L33/44 ,  H01L33/62

Abstract: A light emitting diode includes: a light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first contact electrode forming ohmic contact with the first conductive type semiconductor layer; a second contact electrode disposed on the second conductive type semiconductor layer; and an insulation layer disposed on the light emitting structure and insulating the first contact electrode from the second contact electrode, wherein the first conductive type semiconductor layer includes a nitride-based substrate, the nitride-based substrate having a thread dislocation density of 104 cm−2 or less, an oxygen impurity concentration of 1019 cm−3 or less, and an optical extinction coefficient of less than 5 cm−1 at a wavelength of 465 nm to 700 nm.

Abstract translation: 发光二极管包括：发光结构，包括第一导电类型半导体层，第二导电类型半导体层和介于第一导电类型半导体层和第二导电类型半导体层之间的有源层; 与所述第一导电型半导体层形成欧姆接触的第一接触电极; 设置在所述第二导电型半导体层上的第二接触电极; 以及绝缘层，其设置在所述发光结构上并使所述第一接触电极与所述第二接触电极绝缘，其中所述第一导电类型半导体层包括氮化物基衬底，所述氮化物基衬底的线位错密度为104cm- 2以下，氧离子浓度为1019cm -3以下，光波消失系数小于5cm -1，波长为465nm〜700nm。

公开(公告)号：US09525102B2

公开(公告)日：2016-12-20

申请号：US14764349

申请日：2014-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam-Goo Cha ,  Geon-Wook Yoo ,  Han-Kyu Seong

IPC: H01L33/24 ,  H01L33/08 ,  H01L33/00 ,  H01L33/20 ,  H01L33/18

CPC classification number: H01L33/20 ,  H01L33/005 ,  H01L33/08 ,  H01L33/18 ,  H01L33/24

Abstract: There is provided a method of manufacturing a nanostructure semiconductor light emitting device including providing a base layer formed of a first conductivity-type semiconductor, forming a mask including an etch stop layer on the base layer, forming a plurality of openings with regions of the base layer exposed therethrough, in the mask; forming a plurality of nanocores by growth of the first conductivity-type semiconductor on the exposed regions of the base layer to fill the plurality of openings, partially removing the mask using the etch stop layer to expose side portions of the plurality of nanocores, and sequentially growth of an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores.

Abstract translation: 提供一种制造纳米结构半导体发光器件的方法，包括提供由第一导电型半导体形成的基底层，在基底层上形成包括蚀刻停止层的掩模，形成多个具有基底区域的开口 在面罩中暴露于其中的层; 通过在基底层的暴露区域上生长第一导电类型半导体以填充多个开口而形成多个纳米孔，使用蚀刻停止层部分地去除掩模以暴露多个纳米孔的侧部，并依次 在多个纳米孔的表面上生长活性层和第二导电型半导体层。

公开(公告)号：US09508896B2

公开(公告)日：2016-11-29

申请号：US14736778

申请日：2015-06-11

Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.

Inventor： Ching-Hsueh Chiu ,  Ya-Wen Lin ,  Po-Min Tu ,  Shih-Cheng Huang

IPC: H01L33/08 ,  H01L33/06 ,  H01L33/00 ,  H01L33/24 ,  H01L33/32 ,  H01L33/18

CPC classification number: H01L33/06 ,  H01L33/007 ,  H01L33/08 ,  H01L33/18 ,  H01L33/24 ,  H01L33/32

Abstract: A light emitting diode (LED) chip includes a first semiconductor layer, a first light emitting layer formed on the first semiconductor layer, a second light emitting layer formed on the first light emitting layer, and a second semiconductor layer formed on the second light emitting layer. The first light emitting layer emits light having a first color. The second light emitting layer emits light having a second color different from the first color.

Abstract translation: 发光二极管（LED）芯片包括第一半导体层，形成在第一半导体层上的第一发光层，形成在第一发光层上的第二发光层和形成在第二发光层上的第二发光层 层。 第一发光层发射具有第一颜色的光。 第二发光层发射具有与第一颜色不同的第二颜色的光。