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    Structure and method of forming capped chips
    1.
    发明申请
    Structure and method of forming capped chips 有权
    形成封盖芯片的结构和方法

    公开(公告)号：US20060033189A1

    公开(公告)日：2006-02-16

    申请号：US11201726

    申请日：2005-08-11

    申请人： Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David Tuckerman

    发明人： Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David Tuckerman

    IPC分类号： H01L23/02

    CPC分类号： B81B7/007 ,  H03H3/02 ,  H03H9/0547 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1092

    摘要： As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.

    摘要翻译： 如本文所公开的，提供了用于形成加盖芯片的结构和方法。 通过所公开的方法提供，在与芯片的布线绝缘的芯片上形成金属基底图案，并且形成包括金属的盖。 盖子连接到芯片上的金属基底图案以形成封盖的芯片。 在一个实施例中，芯片的前表面被暴露，其从芯片的触点延伸到芯片的边缘。 在另一个实施例中，导电连接形成于接触件，导电连接件从接触件延伸到芯片前表面上的暴露平面处的端子。

    Chip handling methods and apparatus
    2.
    发明申请
    Chip handling methods and apparatus 审中-公开
    芯片处理方法和装置

    公开(公告)号：US20060013680A1

    公开(公告)日：2006-01-19

    申请号：US11183635

    申请日：2005-07-18

    申请人： Belgacem Haba ,  David Tuckerman ,  Glenn Urbish ,  Masud Beroz ,  Ilyas Mohammed

    发明人： Belgacem Haba ,  David Tuckerman ,  Glenn Urbish ,  Masud Beroz ,  Ilyas Mohammed

    IPC分类号： B65G49/07

    CPC分类号： H01L21/67144 ,  B23K26/066 ,  B23K26/0846 ,  B23K26/10 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  H01L24/97 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： An array of chips spaced apart from one another by chip spacing distances, as, for example, an array of chips on a wafer dicing tape is juxtaposed with an array of chip receiving elements spaced apart from one another by receiving element spacing distances different from the chip spacing distances, as, for example, an array of substrates or fixtures spaced apart from one another at distances substantially larger than the chip spacing distances. The juxtaposing step is performed so that a set of chips including less than all of the chips in the array of chips is aligned with a set of the chip receiving elements. This set of chips is transferred to the set of chip receiving elements while the arrays are aligned with one another. The cycle may be repeated using the same or different array of chips, and using the same or different array of chip receiving elements. Numerous small chips can be transferred to large chip receiving elements without handling individual chips, and without the use of equipment such as pick-and-place equipment commonly used for such handling.

    摘要翻译： 通过芯片间隔距离彼此间隔开的芯片阵列，例如晶片切割带上的芯片阵列，与芯片接收元件阵列并列，通过接收元件间隔距离不同的芯片接收元件 芯片间隔距离，例如基板或固定装置的阵列，其距离基本上大于芯片间距距离彼此间隔开。 执行并置步骤，使得包括小于芯片阵列中的所有芯片的芯片组与一组芯片接收元件对准。 当阵列彼此对准时，这组芯片被传送到芯片接收元件组。 可以使用相同或不同的芯片阵列，并使用相同或不同的芯片接收元件阵列重复该周期。 许多小芯片可以转移到大的芯片接收元件而不处理单个芯片，并且不使用诸如通常用于这种处理的拾取和放置设备的设备。

    Structure and method of forming capped chips
    3.
    发明授权
    Structure and method of forming capped chips 有权
    形成封盖芯片的结构和方法

    公开(公告)号：US07351641B2

    公开(公告)日：2008-04-01

    申请号：US11201726

    申请日：2005-08-11

    申请人： Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David B. Tuckerman

    发明人： Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David B. Tuckerman

    IPC分类号： H01L21/76 ,  H01L21/30

    CPC分类号： B81B7/007 ,  H03H3/02 ,  H03H9/0547 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1092

    摘要： As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.

    摘要翻译： 如本文所公开的，提供了用于形成加盖芯片的结构和方法。 通过所公开的方法提供，在与芯片的布线绝缘的芯片上形成金属基底图案，并且形成包括金属的盖。 盖子连接到芯片上的金属基底图案以形成封盖的芯片。 在一个实施例中，芯片的前表面被暴露，其从芯片的触点延伸到芯片的边缘。 在另一个实施例中，导电连接形成于接触件，导电连接件从接触件延伸到芯片前表面上的暴露平面处的端子。

    Microelectronic package comprising offset conductive posts on compliant layer
    8.
    发明授权
    Microelectronic package comprising offset conductive posts on compliant layer 有权
    微电子封装包括柔性层上的偏移导电柱

    公开(公告)号：US08207604B2

    公开(公告)日：2012-06-26

    申请号：US10985126

    申请日：2004-11-10

    申请人： Belgacem Haba ,  Masud Beroz ,  Giles Humpston ,  Jae M. Park

    发明人： Belgacem Haba ,  Masud Beroz ,  Giles Humpston ,  Jae M. Park

    IPC分类号： H01L23/485

    CPC分类号： H01L23/13 ,  H01L21/4846 ,  H01L2924/0002 ,  H01R13/2414 ,  H01R13/2464 ,  H01L2924/00

    摘要： A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.

    摘要翻译： 微电子封装包括安装结构，与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱。 导电柱从安装结构沿向上的方向突出，至少一个导电柱是偏移柱。 每个偏移柱具有连接到安装结构的基座，每个偏置柱的基部限定质心。 每个偏移柱还限定具有质心的上肢，上肢的质心在垂直于向上方向的水平偏移方向上偏离基部的质心。 安装结构适于允许每个偏移柱绕水平轴线倾斜，使得上端部可以擦过相对电路板的接触垫。