公开(公告)号：US08269549B2

公开(公告)日：2012-09-18

申请号：US13048973

申请日：2011-03-16

Applicant: Cheng-Chung Lin ,  Wu Jiang

Inventor： Cheng-Chung Lin ,  Wu Jiang

IPC: G11C5/14

CPC classification number: G06F1/26

Abstract: A power supply circuit for a PCI-E slot includes a control chip, a first electronic switch, and a second electronic switch. The control chip determines a status of a motherboard, outputting a control signal. A first terminal of the first electronic switch is connected to the control chip to receive the control signal, and connected to a +3.3V dual power supply of the motherboard through a first resistor. A second terminal of the first electronic switch is grounded. A third terminal of the first electronic switch is connected to a first terminal of the second electronic switch, and connected to the +3.3V dual power supply through a second resistor. A second terminal of the second electronic switch is connected to the +3.3V dual power supply. A third terminal of the second electronic switch is connected to a PCI-E slot.

Abstract translation: 用于PCI-E插槽的电源电路包括控制芯片，第一电子开关和第二电子开关。 控制芯片确定主板的状态，输出控制信号。 第一电子开关的第一端子连接到控制芯片以接收控制信号，并通过第一电阻器连接到主板的+ 3.3V双电源。 第一个电子开关的第二个端子接地。 第一电子开关的第三端子连接到第二电子开关的第一端子，并通过第二电阻器连接到+ 3.3V双电源。 第二个电子开关的第二个端子连接到+ 3.3V双电源。 第二电子开关的第三端子连接到PCI-E插槽。

公开(公告)号：US08823167B2

公开(公告)日：2014-09-02

申请号：US13551421

申请日：2012-07-17

Applicant: Yi-Wen Wu ,  Cheng-Chung Lin ,  Chien Ling Hwang ,  Chung-Shi Liu

Inventor： Yi-Wen Wu ,  Cheng-Chung Lin ,  Chien Ling Hwang ,  Chung-Shi Liu

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05541 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/10145 ,  H01L2224/11002 ,  H01L2224/1112 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13551 ,  H01L2224/13561 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/1358 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13686 ,  H01L2224/13687 ,  H01L2224/13688 ,  H01L2224/1369 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2924/01007 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/00 ,  H01L2224/05552

Abstract: This description relates to an integrated circuit device including a conductive pillar formed over a substrate. The conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer between the substrate and the conductive pillar. The UBM layer has a surface region. The integrated circuit device further includes a protection structure on the sidewall surface of the conductive pillar and the surface region of the UBM layer. The protection structure is formed of a non-metal material.

Abstract translation: 该描述涉及一种集成电路器件，其包括形成在衬底上的导电柱。 导电柱具有侧壁表面和顶表面。 集成电路器件还包括在衬底和导电柱之间的凸起下 - 冶金（UBM）层。 UBM层具有表面区域。 集成电路装置还包括在导电柱的侧壁表面和UBM层的表面区域上的保护结构。 保护结构由非金属材料形成。

公开(公告)号：US08104666B1

公开(公告)日：2012-01-31

申请号：US12874009

申请日：2010-09-01

Applicant: Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

IPC: B23K31/02

CPC classification number: H01L24/81 ,  B23K1/0012 ,  B23K1/203 ,  B23K3/087 ,  B23K2101/42 ,  H01L24/95 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/7565 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75755 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81204 ,  H01L2224/814 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00

Abstract: A method of bonding includes providing a first work piece, and attaching a second work piece on the first work piece, with a solder bump disposed between the first and the second work pieces. The second work piece is heated using a heating head of a heating tool to melt the solder bump. After the step of heating the second work piece, one of the first and the second work pieces is allowed to move freely in a horizontal direction to self-align the first and the second work pieces. After the step of allowing one of the first and the second work pieces to move, a temperature of the heating head is lowed until the first solder bump solidifies to form a second solder bump.

Abstract translation: 一种接合方法包括提供第一工件，并且将第二工件附接在第一工件上，其中焊料凸块设置在第一和第二工件之间。 使用加热工具的加热头加热第二工件以熔化焊料凸块。 在加热第二工件的步骤之后，允许第一工件和第二工件中的一个在水平方向上自由移动以使第一工件和第二工件自对准。 在允许第一和第二工件中的一个移动的步骤之后，加热头的温度降低直到第一焊料凸点固化以形成第二焊料凸块。

公开(公告)号：US06943077B2

公开(公告)日：2005-09-13

申请号：US10408689

申请日：2003-04-07

Applicant: Ai-Sen Liu ,  Baw-Ching Perng ,  Ming-Ta Lei ,  Yih-Shung Lin ,  Cheng-Chung Lin ,  Chia-Hui Lin

Inventor： Ai-Sen Liu ,  Baw-Ching Perng ,  Ming-Ta Lei ,  Yih-Shung Lin ,  Cheng-Chung Lin ,  Chia-Hui Lin

IPC: H01L21/02 ,  H01L21/302 ,  H01L21/3105 ,  H01L21/314 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L21/823468 ,  H01L21/3105 ,  H01L21/3144 ,  H01L21/823456 ,  H01L29/6656

Abstract: A method of forming spacers with different widths on a semiconductor substrate, includes the steps of disposing a first spacer layer over the substrate, defining the first spacer layer into a plurality of spacers of a first width, and disposing a second spacer layer selectively over the first spacer layer of a number of the spacers preselected for the second spacer layer, the predetermined number of the spacers with the second spacer layer each having a second width which is different from the first width.

Abstract translation: 一种在半导体衬底上形成具有不同宽度的间隔物的方法，包括以下步骤：在衬底上设置第一间隔层，将第一间隔层限定为多个第一宽度的间隔物，并且在第 为第二间隔层预选的多个间隔物的第一间隔层，具有第二间隔层的预定数量的间隔物各自具有与第一宽度不同的第二宽度。

公开(公告)号：US06407013B1

公开(公告)日：2002-06-18

申请号：US09761422

申请日：2001-01-16

Applicant: Lain-Jong Li ,  Tien-I Bao ,  Cheng-Chung Lin ,  Syun-Ming Jang

Inventor： Lain-Jong Li ,  Tien-I Bao ,  Cheng-Chung Lin ,  Syun-Ming Jang

IPC: H01L2131

CPC classification number: H01L21/3105 ,  H01L21/76826 ,  H01L21/76829

Abstract: Within a method for forming a dielectric layer within a microelectronic fabrication there is first provided a substrate. There is then formed over the substrate a carbon doped silicon containing dielectric layer. There is then treated the carbon doped silicon containing dielectric layer with an oxidizing plasma to form from the carbon doped silicon containing dielectric layer an oxidizing plasma treated carbon doped silicon containing dielectric layer. By treating the carbon doped silicon containing dielectric layer with the oxidizing plasma, particularly under mild conditions, to form therefrom the oxidizing plasma treated carbon doped silicon containing dielectric layer, adhesion of an additional microelectronic layer upon the oxidizing plasma treated carbon doped silicon containing dielectric layer is enhanced in comparison with adhesion of the additional microelectronic layer upon the carbon doped silicon containing dielectric layer, while not compromising dielectric properties of the carbon doped silicon containing dielectric layer.

Abstract translation: 在微电子制造中形成电介质层的方法中，首先提供衬底。 然后在衬底上形成含碳掺杂的含硅电介质层。 然后用具有氧化等离子体的碳掺杂的含硅介电层处理从含碳掺杂的含硅介电层形成氧化等离子体处理的含碳的含硅介电层。 通过用氧化等离子体处理含碳掺杂的含硅电介质层，特别是在温和条件下由其形成氧化等离子体处理的含碳硅的介电层，附加的微电子层与氧化等离子体处理的碳掺杂的含硅介电层 与附加的微电子层对含碳的含硅介电层的粘附性相比增强，同时不损害含碳掺杂的含硅介电层的介电性质。

公开(公告)号：US08823166B2

公开(公告)日：2014-09-02

申请号：US12871565

申请日：2010-08-30

Applicant: Cheng-Chung Lin ,  Chung-Shi Liu ,  Meng-Wei Chou ,  Kuo Cheng Lin ,  Wen-Hsiung Lu ,  Chien Ling Hwang ,  Ying-Jui Huang ,  De-Yuan Lu

Inventor： Cheng-Chung Lin ,  Chung-Shi Liu ,  Meng-Wei Chou ,  Kuo Cheng Lin ,  Wen-Hsiung Lu ,  Chien Ling Hwang ,  Ying-Jui Huang ,  De-Yuan Lu

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/11 ,  H01L21/02052 ,  H01L21/32125 ,  H01L21/76873 ,  H01L21/76885 ,  H01L23/488 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2221/1084 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/1111 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11614 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/81191 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0541 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/20102 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/207

Abstract: Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.

Abstract translation: 用于提供焊料柱凸块的装置和方法。 通过在集成电路的端子上通过导电材料的电镀形成导电材料的支柱，在集成电路的输入/输出端子上形成支柱凸点连接。 柱状凸块的基部具有比上部更大的宽度。 柱形凸起的基部的横截面可以形成梯形，矩形或倾斜的形状。 焊料可以形成在柱的顶表面上。 所得到的焊料柱凸起形成比现有技术更可靠的细间距封装焊接连接。

公开(公告)号：US08344506B2

公开(公告)日：2013-01-01

申请号：US12633499

申请日：2009-12-08

Applicant: Cheng-Chung Lin ,  Chung-Shi Liu ,  Chen-Hua Yu

Inventor： Cheng-Chung Lin ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC: H01L23/50

CPC classification number: H01L21/76885 ,  H01L23/53228 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/81013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/05552

Abstract: An integrated circuit device is disclosed. An exemplary integrated circuit device includes a first copper layer, a second copper layer, and an interface between the first and second copper layers. The interface includes a flat zone interface region and an intergrowth interface region, wherein the flat zone interface region is less than or equal to 50% of the interface.

Abstract translation: 公开了一种集成电路器件。 示例性的集成电路器件包括第一铜层，第二铜层以及第一和第二铜层之间的界面。 该界面包括平坦区域界面区域和共同生长界面区域，其中平坦区域界面区域小于或等于界面的50％。

公开(公告)号：US08317077B2

公开(公告)日：2012-11-27

申请号：US13351099

申请日：2012-01-16

Applicant: Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

IPC: B23K37/04

CPC classification number: H01L24/81 ,  B23K1/0012 ,  B23K1/203 ,  B23K3/087 ,  B23K2101/42 ,  H01L24/95 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/7565 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75755 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81204 ,  H01L2224/814 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00

Abstract: A method of bonding includes providing a first work piece, and attaching a second work piece on the first work piece, with a solder bump disposed between the first and the second work pieces. The second work piece is heated using a heating head of a heating tool to melt the solder bump. After the step of heating the second work piece, one of the first and the second work pieces is allowed to move freely in a horizontal direction to self-align the first and the second work pieces. After the step of allowing one of the first and the second work pieces to move, a temperature of the heating head is lowed until the first solder bump solidifies to form a second solder bump.

公开(公告)号：US08177862B2

公开(公告)日：2012-05-15

申请号：US12901273

申请日：2010-10-08

Applicant: Chien Ling Hwang ,  Cheng-Chung Lin ,  Ying-Jui Huang ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Cheng-Chung Lin ,  Ying-Jui Huang ,  Chung-Shi Liu

IPC: H01L21/58

CPC classification number: H01L24/75 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1605 ,  H01L2224/75302 ,  H01L2224/7531 ,  H01L2224/75312 ,  H01L2224/755 ,  H01L2224/75502 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T29/41 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method includes allowing a work piece having a solder bump to contact a bond head; heating the bond head until the solder bump is melted; and conducting a cooling media into the bond head to cool the solder bump and to solidify the solder bump.

Abstract translation: 一种方法包括允许具有焊料凸点的工件接触焊接头; 加热粘结头，直到焊料凸起熔化; 并将冷却介质导入接合头以冷却焊料凸点并固化焊料凸块。

公开(公告)号：US20120111922A1

公开(公告)日：2012-05-10

申请号：US13351099

申请日：2012-01-16

Applicant: Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Ying-Jui Huang ,  Cheng-Chung Lin ,  Chung-Shi Liu

IPC: B23K3/04 ,  B23K3/08

CPC classification number: H01L24/81 ,  B23K1/0012 ,  B23K1/203 ,  B23K3/087 ,  B23K2101/42 ,  H01L24/95 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/7565 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75755 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81204 ,  H01L2224/814 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00

Abstract: A method of bonding includes providing a first work piece, and attaching a second work piece on the first work piece, with a solder bump disposed between the first and the second work pieces. The second work piece is heated using a heating head of a heating tool to melt the solder bump. After the step of heating the second work piece, one of the first and the second work pieces is allowed to move freely in a horizontal direction to self-align the first and the second work pieces. After the step of allowing one of the first and the second work pieces to move, a temperature of the heating head is lowed until the first solder bump solidifies to form a second solder bump.

Abstract translation: 一种接合方法包括提供第一工件，并且将第二工件附接在第一工件上，其中焊料凸块设置在第一和第二工件之间。 使用加热工具的加热头加热第二工件以熔化焊料凸块。 在加热第二工件的步骤之后，允许第一工件和第二工件中的一个在水平方向上自由移动以使第一工件和第二工件自对准。 在允许第一和第二工件中的一个移动的步骤之后，加热头的温度降低直到第一焊料凸点固化以形成第二焊料凸块。