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公开(公告)号：US20120243147A1
公开(公告)日：2012-09-27
申请号：US12904305
申请日：2010-10-14
CPC分类号： H05K1/113 , B23K1/0016 , B23K1/20 , B23K26/361 , H01L21/4853 , H01L23/49811 , H01L2924/0002 , H05K3/3436 , H05K2201/10378 , H05K2201/10719 , H05K2203/0315 , H01L2924/00
摘要： A method of converting a land grid array (LGA) module to a ball grid array (BGA) module by removing and oxidizing portions of the LGA conductive pad features on the upper surface of the LGA module. A BGA solder ball is deposited on the remaining portion of the conductive feature of the LGA module, with subsequent reflowing of the BGA solder ball. By modifying the LGA module to support a BGA structure, excessive heat generated by components placed on the modified LGA pad can be conducted through the BGA structure and into the element on which the LGA module is attached, such as a PCB.
摘要翻译： 通过去除和氧化LGA模块的上表面上的LGA导电焊盘特征的部分，将焊盘格栅阵列（LGA）模块转换成球栅阵列（BGA）模块的方法。 BGA焊球沉积在LGA模块的导电特征的剩余部分上，随后BGA焊球回流。 通过修改LGA模块以支持BGA结构，放置在修改的LGA焊盘上的部件产生的过热可以通过BGA结构进入并连接到诸如PCB的LGA模块所连接的元件中。
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公开(公告)号：US20120160547A1
公开(公告)日：2012-06-28
申请号：US12764993
申请日：2010-04-22
申请人： Timothy Antesberger , Rabindra N. Das , Frank D. Egitto , Voya R. Markovich , William E. Wilson
发明人： Timothy Antesberger , Rabindra N. Das , Frank D. Egitto , Voya R. Markovich , William E. Wilson
CPC分类号： H05K3/462 , H05K1/167 , H05K3/4069 , H05K3/4623 , H05K3/4632 , H05K2203/0191 , H05K2203/061 , H05K2203/063
摘要： A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.
摘要翻译： 一种用于PCB或PWB板的衬底，其具有无芯堆积层和至少一个金属和至少一个介电层。 无芯堆积电介质层可由至少部分固化的热固性树脂和热塑性树脂组成。
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公开(公告)号：US20120031649A1
公开(公告)日：2012-02-09
申请号：US12764997
申请日：2010-04-22
申请人： Timothy Antesberger , Rabindra N. Das , Frank D. Egitto , Voya R. Markovich , William E. Wilson
发明人： Timothy Antesberger , Rabindra N. Das , Frank D. Egitto , Voya R. Markovich , William E. Wilson
IPC分类号： H05K1/02
CPC分类号： H05K3/4069 , H05K3/4614 , H05K3/462 , H05K3/4623 , H05K2203/063
摘要： A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.
摘要翻译： 一种用于PCB或PWB板的衬底，其具有无芯堆积层和至少一个金属和至少一个介电层。 无芯堆积电介质层可由至少部分固化的热固性树脂和热塑性树脂组成。 衬底还可以包含焊盘阵列（LGA）封装。
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4.发明申请Method of making high density interposer and electronic package utilizing same 有权制造高密度插入件的方法和使用其的电子封装公开(公告)号：US20110126408A1
公开(公告)日：2011-06-02
申请号：US12592734
申请日：2009-12-01
CPC分类号： H05K3/4623 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L24/19 , H01L24/20 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01067 , H01L2924/01075 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H05K3/0035 , H05K3/305 , H05K2201/0154 , H05K2201/10378 , H05K2201/10674 , H05K2203/061 , H05K2203/1469 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , H01L2924/00012 , H01L2924/00
摘要： A method of making an electronic package designed for interconnecting high density patterns of conductors of an electronic device (e.g., semiconductor chip) and less dense patterns of conductors of hosting circuitized substrates (e.g., chip carriers, PCBs). In one embodiment, the method includes bonding a chip to a single dielectric layer, forming a high density pattern of conductors on one surface of the layer, forming openings in the layer and then depositing metallurgy to form a desired circuit pattern which is then adapted for engaging and being electrically coupled to a corresponding pattern on yet another hosting substrate. According to another embodiment of the invention, an electronic package using a dual layered interposer is provided. Also provided are methods of making circuitized substrate assemblies using the electronic packages made using the invention's teachings.
摘要翻译： 一种制造电子封装的方法，其设计用于互连电子器件（例如，半导体芯片）的导体的高密度图案和托管电路化基板（例如，芯片载体，PCB）的导体的较不致密的图案。 在一个实施例中，该方法包括将芯片接合到单个电介质层，在该层的一个表面上形成高密度图案的导体，在该层中形成开口，然后沉积冶金以形成期望的电路图案， 接合并且电耦合到另一托管基板上的对应图案。 根据本发明的另一个实施例，提供了一种使用双层插入器的电子封装。 还提供了使用根据本发明的教导制造的电子封装制造电路化基板组件的方法。
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5.发明授权Printed circuit boards for electronic device packages having glass free non-conductive layers and method of forming same 失效具有无玻璃非导电层的电子器件封装的印刷电路板及其形成方法公开(公告)号：US06781064B1
公开(公告)日：2004-08-24
申请号：US09342584
申请日：1999-06-29
申请人： Bernd K. Appelt , Anilkumar C. Bhatt , James W. Fuller, Jr. , John M. Lauffer , Voya R. Markovich , William J. Rudik , William E. Wilson
发明人： Bernd K. Appelt , Anilkumar C. Bhatt , James W. Fuller, Jr. , John M. Lauffer , Voya R. Markovich , William J. Rudik , William E. Wilson
IPC分类号： H05K103
CPC分类号： H01L23/564 , H01L21/481 , H01L23/498 , H01L23/49894 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H05K1/036 , H05K1/0366 , H05K3/429 , H05K3/4626 , H05K3/4641 , H05K2201/0195 , H05K2201/0769 , H05K2201/09718 , H05K2201/09881 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board for use in an electronic device package such as a ball grid array package or organic chip carrier package. This printed circuit board includes a glass-free dielectric for separating and insulating power cores, circuitry or plated through holes from each other to prevent shorts caused by a migration of conductive material along glass-based prepreg substrates.
摘要翻译： 一种用于诸如球栅阵列封装或有机芯片载体封装的电子器件封装中的印刷电路板。 该印刷电路板包括一个无玻璃的电介质，用于分离和绝缘电源芯，电路或电镀通孔，以防止导电材料沿玻璃基预浸料衬底迁移引起的短路。
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6.发明授权Resonator coupling device with a rotatable ring for adjusting the loaded Q 失效谐振器耦合装置，具有用于调节负载的Q的可旋转环
公开(公告)号：US5625330A
公开(公告)日：1997-04-29
申请号：US298453
申请日：1994-08-30
申请人： William E. Wilson , Trevor J. Nixon
发明人： William E. Wilson , Trevor J. Nixon
CPC分类号： H01P7/06
摘要： A coupling device for use in a resonator has a loop electrically connected at one end to a central conductor and at the other end to an electrically conductive ring wherein the loop may be rotated independently of the coupling device connector and mounting plate thereby allowing the loaded Q of the resonator to be varied without complete disengagement of the coupling device from the resonator.
摘要翻译： 用于谐振器的耦合装置具有在一端电连接到中心导体并且另一端电连接到导电环的环，其中环可以独立于耦合装置连接器和安装板旋转，从而允许加载的Q 的谐振器，而不会使耦合装置与谐振器完全分离。
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公开(公告)号：US5427895A
公开(公告)日：1995-06-27
申请号：US172409
申请日：1993-12-23
CPC分类号： H05K3/427 , H05K3/108 , H05K2201/0355 , H05K2203/072 , H05K3/244
摘要： A process for selective plating of a metal onto a substrate surface is provided. The process includes laminating a layer of conductive metal onto a dielectric substrate; and providing thru holes extending through said layer of conductive metal and said dielectric substrate.A thin layer of conductive metal is plated on the walls of the thru holes; and a photoresist layer is applied to the surface of the conductive metal and selectively exposed and developed to provide a mask corresponding to the negative of the desired circuit pattern.The exposed metal that is not covered by the photoresist is removed and then the remaining photoresist is removed to thereby provide the desired circuit pattern. A conductive metal is plated on the pattern up to the desired thickness.
摘要翻译： 提供了将金属选择性镀覆到基板表面上的工艺。 该方法包括将导电金属层层压到电介质基底上; 并且提供穿过所述导电金属层和所述电介质基板的通孔。 导电金属薄层镀在通孔的壁上; 并且将光致抗蚀剂层施加到导电金属的表面并选择性地暴露和显影以提供对应于期望电路图案的负值的掩模。 去除未被光致抗蚀剂覆盖的暴露的金属，然后除去剩余的光致抗蚀剂，从而提供所需的电路图案。 将导电金属镀在图案上达到所需厚度。
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公开(公告)号：US20130025839A1
公开(公告)日：2013-01-31
申请号：US13189980
申请日：2011-07-25
申请人： Frank Egitto , Voya R. Markovich , Varaprasad V. Calmidi , Timothy Antesberger , William E. Wilson
发明人： Frank Egitto , Voya R. Markovich , Varaprasad V. Calmidi , Timothy Antesberger , William E. Wilson
CPC分类号： H01L23/145 , F28F2013/006 , H01L23/3677 , H01L23/49822 , H01L23/49894 , H01L24/16 , H01L2224/131 , H01L2224/16235 , H01L2224/81191 , H01L2224/81192 , H01L2924/12042 , H05K1/0206 , H05K3/4679 , Y10T29/49826 , Y10T428/24322 , H01L2924/014 , H01L2924/00
摘要： An organic substrate capable of providing effective heat transfer through its entire thickness by the use of parallel, linear common thermally conductive openings that extend through the substrate, the substrate having thin dielectric layers bonded together to form an integral substrate structure. The structure is adapted for assisting in providing cooling of high temperature electrical components on one side by effectively transferring heat from the components to a cooling structure positioned on an opposing side. Methods of making the substrate are also provided, as is an electrical assembly including the substrate, component and cooling structure.
摘要翻译： 一种能够通过使用延伸穿过衬底的平行的线性共同导热开口，通过其整个厚度提供有效的热传递的有机衬底，该衬底具有结合在一起的细介电层以形成一体的衬底结构。 该结构适于通过有效地将热量从部件传递到位于相对侧的冷却结构来辅助提供一侧的高温电气部件的冷却。 还提供制造基板的方法，以及包括基板，部件和冷却结构的电气组件。
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公开(公告)号：US20120015532A1
公开(公告)日：2012-01-19
申请号：US12837640
申请日：2010-07-16
申请人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
发明人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
CPC分类号： H05K3/3436 , H05K1/111 , H05K2201/10378 , Y02P70/613 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/4919
摘要： A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
摘要翻译： 柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。 柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距 第二表面上的焊盘被设计成电连接到印刷线路板等。 第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。
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公开(公告)号：US06986198B2
公开(公告)日：2006-01-17
申请号：US10744142
申请日：2003-12-22
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K3/36
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.
摘要翻译： 提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。 通过孔穿过的光刻金属填充通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。 边框可以在卡周围，包括从电介质层之一的边缘终止的金属层。 提供带有间隙孔的铜箔。 第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。 在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。 开发了通孔，在两个电介质层中对其进行图案化。 可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。
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