公开(公告)号：US5133989A

公开(公告)日：1992-07-28

申请号：US416279

申请日：1989-09-27

申请人： Shunichi Numata ,  Takao Miwa ,  Takayoshi Ikeda ,  Koji Fujisaki ,  Hisae Shimanoki ,  Kunio Miyazaki ,  Osamu Miura ,  Ryuji Watanabe ,  Toshio Miyamoto ,  Yukio Okoshi

发明人： Shunichi Numata ,  Takao Miwa ,  Takayoshi Ikeda ,  Koji Fujisaki ,  Hisae Shimanoki ,  Kunio Miyazaki ,  Osamu Miura ,  Ryuji Watanabe ,  Toshio Miyamoto ,  Yukio Okoshi

IPC分类号： B32B15/088 ,  B32B15/08 ,  C08G73/10 ,  H01B1/22 ,  H01B3/30 ,  H01L21/48 ,  H01L23/14 ,  H05K1/03

CPC分类号： H05K1/0346 ,  H01B1/22 ,  H01B3/306 ,  H01L21/481 ,  H01L23/145 ,  H01L2224/16225 ,  H01L2924/12044 ,  Y10T428/31681

摘要： The present invention provides a process for producing a metal-polyimide composite material such as a wiring board. In production thereof, deterioration of polyamide film due to oxidation during imidization of a polyimide precursor in contact with metal such as copper or silver can be prevented. The present invention is characterized by using a polyimide precursor having an acidic functional group which is masked. Examples of the polyamide precursor are polyamic acid epoxy adducts, amido polyamic acids, silylated polyamic acids, etc.

公开(公告)号：US5768108A

公开(公告)日：1998-06-16

申请号：US720028

申请日：1996-09-27

申请人： Osamu Miura ,  Kunio Miyazaki ,  Akio Takahashi ,  Motoyo Wajima ,  Ryuji Watanabe ,  Takao Miwa ,  Yuichi Satsu ,  Shigeo Amagi

发明人： Osamu Miura ,  Kunio Miyazaki ,  Akio Takahashi ,  Motoyo Wajima ,  Ryuji Watanabe ,  Takao Miwa ,  Yuichi Satsu ,  Shigeo Amagi

IPC分类号： H05K1/05 ,  H01L21/48 ,  H01L23/538 ,  H05K1/11 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K1/00 ,  H05K1/09 ,  H05K1/16

CPC分类号： H01L21/4857 ,  H01L23/5385 ,  H05K3/4641 ,  H01L2224/16225 ,  H05K1/113 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/4623

摘要： A multi-layer wiring structure for mounting electronic devices is provided to be used in an electronic computer, a work station or the like, and more particularly a multi-layer packaging board having microscopic wiring layers, which board has an excellent dimensional stability and a high reliability, and also a method of producing such a board are provided. The multi-layer wiring structure includes a complex of at least two sub-assemblies each having wiring layers formed respectively on opposite sides of a core material of a low thermal expansive metal through an insulation layer in such a manner that the wiring layers correspond in area ratio to each other. The sub-assemblies are connected to one another by conductors via through holes. In this structure, the wiring structure having the core material of a low thermal expansive metal is used as a base, and therefore a dimensional change of a board is small, and microscopic wiring layers can be formed, and the reliability of connection between the sub-assemblies is enhanced. Furthermore, the board can be produced at low costs.

摘要翻译： 在电子计算机，工作站等中使用用于安装电子装置的多层布线结构，特别是具有微细布线层的多层封装板，该板具有优异的尺寸稳定性和 高可靠性，以及制造这种基板的方法。 多层布线结构包括至少两个子组件的复合体，每个子组件具有通过绝缘层分别形成在低热膨胀金属的芯材的相对侧上的布线层，使得布线层对应于区域 相互之间的比例。 子组件通过导体经由通孔彼此连接。 在这种结构中，将具有低热膨胀金属的芯材的布线结构用作基底，因此板的尺寸变化小，并且可以形成微细的布线层，并且子层之间的连接的可靠性 大会组合得到增强。 此外，该板可以低成本生产。

公开(公告)号：US5120573A

公开(公告)日：1992-06-09

申请号：US416280

申请日：1989-09-27

申请人： Kunio Miyazaki ,  Osamu Miura ,  Ryuji Watanabe ,  Yukio Ookoshi ,  Toshio Miyamoto ,  Mikio Aizawa ,  Kazumasa Igarashi ,  Amane Mochizuki

发明人： Kunio Miyazaki ,  Osamu Miura ,  Ryuji Watanabe ,  Yukio Ookoshi ,  Toshio Miyamoto ,  Mikio Aizawa ,  Kazumasa Igarashi ,  Amane Mochizuki

IPC分类号： C08G73/10 ,  H01B1/22 ,  H01B3/30 ,  H01L21/48 ,  H05K1/03

CPC分类号： H01B1/22 ,  C08G73/1007 ,  H01B3/306 ,  H01L21/481 ,  H05K1/0346 ,  H01L2224/16225

摘要： The present invention provides a process for producing a metal/polyimide composite article such as high-density wiring boards. This metal/polyimide composite article is produced by a method which comprises coating a polyamic acid alkyl ester represented by the following formula on a metallic film and curing it: ##STR1## wherein R.sub.1 and R.sub.2 which may be identical or different each represents an organic group of 1 or more carbon atoms.

公开(公告)号：US5178962A

公开(公告)日：1993-01-12

申请号：US495268

申请日：1990-03-19

申请人： Toshio Miyamoto ,  Kunio Miyazaki ,  Ryuji Watanabe ,  Osamu Miura ,  Yukio Ookoshi ,  Yuichi Satsu ,  Michio Ohue ,  Shigeru Takahashi ,  Yoshiyuki Tsuru

发明人： Toshio Miyamoto ,  Kunio Miyazaki ,  Ryuji Watanabe ,  Osamu Miura ,  Yukio Ookoshi ,  Yuichi Satsu ,  Michio Ohue ,  Shigeru Takahashi ,  Yoshiyuki Tsuru

IPC分类号： B29C59/14 ,  C08J7/12 ,  C23C14/20 ,  H05K3/38

CPC分类号： C08J7/123 ,  B29C59/14 ,  C23C14/20 ,  C08J2379/08 ,  H05K3/381 ,  Y10T428/31678 ,  Y10T428/31699

摘要： A composite of metal and an organic film having a high adhesiveness without deterioration of film quality is provided by exposing the surface of organic film to at least one of chemically reactive gas phase molecules and gas phase ions thereby forming functional groups on the surface of organic film, and forming a metallic film thereon through the functional groups.

公开(公告)号：US4886573A

公开(公告)日：1989-12-12

申请号：US87021

申请日：1987-08-19

申请人： Hiroshi Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Shunichi Numata ,  Kanji Otsuka

发明人： Hiroshi Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Shunichi Numata ,  Kanji Otsuka

IPC分类号： H01L21/3205 ,  H01L21/027 ,  H01L21/306 ,  H01L21/312 ,  H05K3/02 ,  H05K3/04 ,  H05K3/06 ,  H05K3/46

CPC分类号： H05K3/048 ,  H01L21/0272 ,  H01L21/312

摘要： In a process for forming a wiring conductor of Cu, Al, Au or the like on a wiring substrate, polyimide-based resin having the following unit structural formula is used as a lift-off material. ##STR1## wherein R.sub.1 : ##STR2## R.sub.2 : ##STR3## n is an integer of 15,000 to 30,000. This lift-off material has very good etching susceptibility and can be selectively lifted off with an etching solution of a mixture of hydrazine and ethylene diamine from a lower polyimide layer having R.sub.1 : ##STR4## R.sub.2 : ##STR5## .

摘要翻译： 在布线基板上形成Cu，Al，Au等布线导体的方法中，使用具有下列单元结构式的聚酰亚胺系树脂作为剥离材料。 其中R1： R2： n是15,000至30,000的整数。 这种剥离材料具有非常好的蚀刻敏感性，并且可以用来自具有R1：R2的下聚酰亚胺层的肼和乙二胺的混合物的蚀刻溶液选择性地剥离。

公开(公告)号：US5350886A

公开(公告)日：1994-09-27

申请号：US659672

申请日：1991-02-25

申请人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

发明人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

IPC分类号： H01L23/538 ,  H05K1/03 ,  H05K3/46 ,  H05K1/00

CPC分类号： H01L23/5385 ,  H05K3/462 ,  H05K3/4629 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/0379 ,  H05K2203/061

摘要： An LSI mounting substrate having a multilayered thin film wiring portion, with the thin film wiring portion being divided into wiring units each composed of a plurality of wiring layers, with the wirings between the units being electrically connected through connecting pads defined in the same surface as that of a surface conductive layer of the unit.

摘要翻译： 一种具有多层薄膜布线部分的LSI安装基板，薄膜布线部分被分成多个布线层的布线单元，各单元之间的布线通过与 该单元的表面导电层的那个。

公开(公告)号：US5497545A

公开(公告)日：1996-03-12

申请号：US34372

申请日：1993-03-18

申请人： Ryuji Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Yukio Ookoshi ,  Akio Takahashi

发明人： Ryuji Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Yukio Ookoshi ,  Akio Takahashi

IPC分类号： H01L21/60 ,  H01L21/48 ,  H01L21/58 ,  H01L23/12 ,  H01L23/538 ,  H01R12/51 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46 ,  H05K3/36 ,  H01R9/09

CPC分类号： H05K3/4046 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/5384 ,  H01L23/5385 ,  H01R12/523 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/78301 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K2201/0382 ,  H05K2201/10234 ,  H05K2201/10287 ,  H05K2201/10416 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K3/328 ,  H05K3/4644 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49151

摘要： A multi-layer wiring assembly including a stack of insulating layers, e.g. of polyimide, alternating with wiring patterns, typically of copper. To establish the circuit pattern, successive wiring patterns are connected to one another through the intervening insulating layers at predetermined locations, by metal stud connections. The studs are formed during assembly of the stack by wire-bonding a stud onto an underlying wiring pattern through a through-hole of the insulating layer above, and then stamping the exposed end of the wire-bonded stud to spread it into contact with the uppermost wiring pattern. The wire-bonded studs e.g. of Au, form strong bonds with the underlying conductor and are quick to apply in an automated process using a wire-bonding machine.

摘要翻译： 一种多层布线组件，包括一层绝缘层，例如 的聚酰亚胺，与布线图案交替，通常为铜。 为了建立电路图案，连续的布线图案通过金属螺柱连接在预定位置处通过中间绝缘层彼此连接。 通过将螺柱通过上面的绝缘层的通孔将螺柱线接合到下面的布线图案上，并且然后冲压引线接合的螺柱的暴露的端部以使其与 最上面的布线图案。 例如， 的Au与底层导体形成牢固的结合，并且使用引线接合机快速地应用于自动化过程中。

公开(公告)号：US4690793A

公开(公告)日：1987-09-01

申请号：US581076

申请日：1984-02-17

申请人： Hisanori Okamura ,  Kunio Miyazaki ,  Hirosi Akiyama ,  Shinichi Itoh ,  Tomio Yasuda ,  Kousuke Nakamura ,  Yukio Okoshi ,  Mutuo Kamoshita ,  Akio Chiba

发明人： Hisanori Okamura ,  Kunio Miyazaki ,  Hirosi Akiyama ,  Shinichi Itoh ,  Tomio Yasuda ,  Kousuke Nakamura ,  Yukio Okoshi ,  Mutuo Kamoshita ,  Akio Chiba

IPC分类号： G21B1/11 ,  G21B1/13 ,  G21B1/17 ,  G21B1/00 ,  B32B15/04 ,  B32B15/20

CPC分类号： G21B1/13 ,  B23K1/0008 ,  B23K1/19 ,  B23K1/20 ,  Y02E30/128 ,  Y10S228/903 ,  Y10S376/90 ,  Y10T428/12507 ,  Y10T428/12576 ,  Y10T428/12611 ,  Y10T428/12764 ,  Y10T428/12903

摘要： The nuclear fusion reactor of the present invention presents a new vacuum vessel for enclosing plasma particles where a reactor wall exposed to the above plasma particles has a piled structure. A plurality of heat-resisting ceramic tiles are metallurgically bonded to a metal-base body having a cooling means through a brazing material. The ceramic tiles are preferably composed of sintered silicon carbide of high density and containing a little beryllium oxide between the boundaries of crystal grains.

摘要翻译： 本发明的核聚变反应器提供了用于封闭等离子体颗粒的新的真空容器，其中暴露于上述等离子体颗粒的反应器壁具有堆叠结构。 多个耐热陶瓷砖通过钎焊材料冶金地结合到具有冷却装置的金属基体上。 陶瓷砖优选由高密度的烧结碳化硅构成，并且在晶粒边界之间含有少量氧化铍。

公开(公告)号：US4970577A

公开(公告)日：1990-11-13

申请号：US337145

申请日：1989-04-12

申请人： Satoru Ogihara ,  Shunichi Numata ,  Kunio Miyazaki ,  Takashi Yokoyama ,  Ken Takahashi ,  Tasao Soga ,  Kazuji Yamada ,  Hiroichi Shinohara ,  Hideo Suzuki

发明人： Satoru Ogihara ,  Shunichi Numata ,  Kunio Miyazaki ,  Takashi Yokoyama ,  Ken Takahashi ,  Tasao Soga ,  Kazuji Yamada ,  Hiroichi Shinohara ,  Hideo Suzuki

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H01L23/52 ,  H01L23/64 ,  H05K1/02 ,  H05K1/03 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36

CPC分类号： H01L23/642 ,  H01L23/49827 ,  H01L23/49833 ,  H05K1/141 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01004 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/16152 ,  H05K1/0271 ,  H05K1/0306 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/068 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K3/3426 ,  H05K3/368

摘要： A semiconductor chip module includes semiconductor chips each of which has contacts on its entire front face. A multi-layered organic circuit board having a small dielectric constant is provided for mounting the semiconductor chips. Intermediate ceramic substrates having the same thermal expansion coefficient as that of the semiconductor chip, are also provided. Each such intermediate ceramic substrate has contacts on its front and back faces corresponding to those of the semiconductor chip. These contacts are electrically connected directly in a one-to-one relationship. The contacts on the semiconductor chip and the corresponding ones on the front face of the intermediate ceramic substrates are connected by solder. The contacts on the back face of the intermediate ceramic substrate and the corresponding contacts on the front face of the multi-layered ceramic circuit board are connected by respective conductive pins having a predetermined flexibility and rigidity through a predetermined gap therebetween. With this arrangement, the relative displacement due to a thermal expansion difference between the intermediate ceramic substrate and the multi-layered organic circuit board is permitted without causing substantial stress thereon.

公开(公告)号：US5095359A

公开(公告)日：1992-03-10

申请号：US413622

申请日：1989-09-28

申请人： Akira Tanaka ,  Hirokazu Inoue ,  Kazuji Yamada ,  Kunio Miyazaki ,  Osamu Miura ,  Hideo Arakawa ,  Hiroshi Yokoyama ,  Yoshio Naganuma ,  Atsushi Morihara ,  Katsunori Ouchi

发明人： Akira Tanaka ,  Hirokazu Inoue ,  Kazuji Yamada ,  Kunio Miyazaki ,  Osamu Miura ,  Hideo Arakawa ,  Hiroshi Yokoyama ,  Yoshio Naganuma ,  Atsushi Morihara ,  Katsunori Ouchi

IPC分类号： G06F1/18 ,  H01L21/60 ,  H01L23/057 ,  H01L23/467 ,  H01L23/498 ,  H01L23/50 ,  H01L25/065

CPC分类号： H01L23/467 ,  H01L23/057 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49109 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/30107

摘要： A semiconductor package for use in computers includes a insulating substrate onto which a semiconductor device is mounted, an insulating cap which shuts out outside air and seals said semiconductor device, power-source lines which provide power to the semiconductor device, and signal lines which transmit output signals from the semiconductor device to external circuits. The signal lines are arranged perpendicularly to the insulating substrate so that they are prevented from the dielectric constant of the insulating substrate, while the power-source lines are formed within the insulating substrate and connected through conductive layers parallel to the surface onto which the semiconductor is mounted to external leads.