摘要:
The present invention provides an integrated circuit chip assembly and a method of manufacturing the same. The assembly includes a package element having a top surface and an integrated circuit chip having a top surface, a bottom surface, edge surface between the top and bottom surfaces, and contacts exposed at the top surface. The package element is disposed below the chip with the top surface of the package element facing toward the bottom surface of the chip. At least one spacer element resides between the top surface of the package element and the bottom surface of the chip. According to one embodiment, the at least one spacer element may form a substantially closed cavity between the package element and the integrated circuit chip. According to another embodiment, first conductive features may extend from the contacts of the chip along the top surface, and at least some of said first conductive features extend along at least one of the edge surfaces of the chip.
摘要:
A microelectronic element package has one or more individual carrier units overlying a region or regions of the front or rear surface of the microelectronic element, leaving other regions of the microelectronic element surface uncovered. The carrier units can be made economically using only a small area of a dielectric film or other circuit panel material.
摘要:
In thermal management systems that employ EHD devices to motivate flow of air through an enclosure, spatial distribution of a ventilation boundary may facilitate reductions in flow resistance by reducing average transit distance for cooling air from an inlet portion of the ventilation boundary to an outlet portion. Some thermal management systems described herein distribute a ventilation boundary over opposing surfaces, adjacent surfaces or even a single surface of an enclosure while providing a short, “U” shaped, “L” shaped or generally straight through flow path. In some cases, spatial distributions of the ventilation boundary facilitate or enable enclosure geometries for which conventional fan or blower ventilation would be impractical. In some cases, provision of multiple portions of the ventilation boundary may allow the thermal management system to tolerate blockage or occlusion of a subset of the inlet and/or outlet portions and, when at least some of such portions are non-contiguous spatially-distributed, tolerance to a single cause of blockage or occlusion is enhanced.
摘要:
A layered metal structure is provided in accordance with an aspect of the invention. The structure can be used, for example, to fabricate a conductive interconnect element for conductively interconnecting one or more microelectronic elements. The layered structure includes first and second metal layers each of which may include one or more of copper or aluminum, for example. An intervening layer, may include for example, chromium between the first and second metal layers, chromium being resistant to an etchant usable to pattern the first and second metal layers selectively to the intervening layer. An etchant such as cupric chloride, ferric chloride (FeCl3), a peroxysulfuric composition, or a persulfate composition may be used to pattern the first and second metal layers in such case.
摘要:
A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.
摘要:
A microelectronic interconnect element can include a plurality of first metal lines and a plurality of second metal lines interleaved with the first metal lines. Each of the first and second metal lines has a surface extending within the same reference plane. The first metal lines have surfaces above the reference plane and remote therefrom and the second metal lines have surfaces below the reference plane and remote therefrom. A dielectric layer can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.
摘要:
A microelectronic assembly includes a microelectronic package having a microelectronic element with faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, at least some of the conductive posts being electrically interconnected with the microelectronic element. The package includes a plurality of support elements disposed between the microelectronic element and the substrate and supporting the flexible substrate over the microelectronic element. At least some of the conductive posts are offset from the support elements. The assembly includes a circuitized substrate having conductive pads confronting the conductive posts of the microelectronic package, whereby the conductive posts are electrically interconnected with the conductive pads.
摘要:
A packaged microelectronic assembly includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. Each of the first posts has a width in a direction of the front surface and a height extending from the front surface, wherein the height is at least half of the width. There is also a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts.
摘要:
A method of electrically connecting a microelectronic component having a first surface bearing a plurality of contacts. The method including the steps of forming a subassembly by juxtaposing a connection component having a support structure and a plurality of elongated posts extending substantially parallel to one another from a first surface of the support structure with the microelectronic component so that the support structure overlies the surface of the component with the posts extending away from the component and electrically connecting the posts to the contacts of the microelectronic component.
摘要:
A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conductively interconnect the contacts 403 with unit contacts.