Patent search ap:"Ming-Da Cheng" Page 2

11.

发明申请
WARPAGE CONTROL IN A PACKAGE-ON-PACKAGE STRUCTURE 有权
Title translation: 包装式包装结构中的保温控制

公开(公告)号：US20140045300A1

公开(公告)日：2014-02-13

申请号：US13571665

申请日：2012-08-10

Applicant: Meng-Tse Chen , Wei-Hung Lin , Kuei-Wei Huang , Tsai-Tsung Tsai , Ai-Tee Ang , Ming-Da Cheng , Chung-Shi Liu

Inventor： Meng-Tse Chen , Wei-Hung Lin , Kuei-Wei Huang , Tsai-Tsung Tsai , Ai-Tee Ang , Ming-Da Cheng , Chung-Shi Liu

IPC: H01L21/50 , H05B3/00

CPC classification number: H01L21/67288 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/73204 , H01L2225/1058 , H01L2924/0002 , H01L2924/15311 , H05B6/6447 , H05B6/80 , H01L2924/0001

Abstract: The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.

Abstract translation: 本公开涉及一种减少封装封装半导体结构内的翘曲的工具布置和方法，同时最小化耦合封装的电绝缘粘合剂内的空隙形成。压力发生器和可变频率微波源耦合到封装封装的封装半导体结构的处理室。封装的封装半导体结构由可变频率，可变温度和可变持续时间的可变频率微波源同时加热，并通过压力发生器暴露于高压。这种用于微波加热和升高压力的组合限制了引入的翘曲量，同时防止在封装封装半导体结构的衬底的电绝缘粘合剂中形成空隙。

12.

发明申请
Fine Pitch Package-on-Package Structure 审中-公开
Title translation: 精细间距封装结构

公开(公告)号：US20140042622A1

公开(公告)日：2014-02-13

申请号：US13572417

申请日：2012-08-10

Applicant: Tsai-Tsung Tsai , Chun-Cheng Lin , Ai-Tee Ang , Yi-Da Tsai , Ming-Da Cheng , Chung-Shi Liu

Inventor： Tsai-Tsung Tsai , Chun-Cheng Lin , Ai-Tee Ang , Yi-Da Tsai , Ming-Da Cheng , Chung-Shi Liu

IPC: H01L23/498

CPC classification number: H01L23/49838 , H01L23/49816 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/15321 , H05K3/3436 , H05K3/4015 , H05K2201/0367 , H01L2224/0401

Abstract: A package-on-package (PoP) device including a substrate having an array of contact pads arranged around a periphery of the substrate, a logic chip mounted to the substrate inward of the array of contact pads, and non-solder bump structures mounted on less than an entirety of the contact pads available.

Abstract translation: 一种封装封装（PoP）器件，包括具有围绕衬底的周边布置的接触焊盘阵列的衬底，安装到衬底内部的接触焊盘阵列的逻辑芯片以及安装在衬底上的非焊料凸块结构小于可用的接触垫的整体。

13.

发明申请
Warpage Control in the Packaging of Integrated Circuits 有权
Title translation: 集成电路封装中的翘曲控制

公开(公告)号：US20140027431A1

公开(公告)日：2014-01-30

申请号：US13559318

申请日：2012-07-26

Applicant: Ming-Da Cheng , Hsiu-Jen Lin , Cheng-Ting Chen , Wei-Yu Chen , Chien-Wei Lee , Chung-Shi Liu

Inventor： Ming-Da Cheng , Hsiu-Jen Lin , Cheng-Ting Chen , Wei-Yu Chen , Chien-Wei Lee , Chung-Shi Liu

IPC: B23K31/02 , H05B1/00 , B25B11/00

CPC classification number: H05B3/02 , B23K3/087 , B23K2101/40 , H01L21/67721 , H01L21/6838 , H01L24/75 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/75744 , H01L2224/7598 , H01L2224/81191 , H01L2224/81815 , H01L2224/97 , H01L2924/3511 , H01L2924/37001 , Y10T29/41 , H01L2924/00014 , H01L2224/81 , H01L2924/014

Abstract: A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.

Abstract translation: 一种方法包括将第一包装部件放置在真空舟皿上，其中真空舟皿包括孔，并且其中第一包装部件覆盖该孔。第二包装部件放置在第一包装部件上，其中焊料区域设置在第一和第二包装部件之间。该孔被抽真空，其中第一包装部件被压靠在真空舟皿上的压力，并且其中压力由孔中的真空产生。当保持孔中的真空时，回流焊接区域以将第二包装部件结合到第一包装部件。

14.

发明授权
Methods for forming 3DIC package 有权

公开(公告)号：US08609462B2

公开(公告)日：2013-12-17

申请号：US13272032

申请日：2011-10-12

Applicant: Meng-Tse Chen , Chun-Cheng Lin , Kuei-Wei Huang , Yu-Peng Tsai , Wei-Hung Lin , Ming-Da Cheng , Chung-Shi Liu

Inventor： Meng-Tse Chen , Chun-Cheng Lin , Kuei-Wei Huang , Yu-Peng Tsai , Wei-Hung Lin , Ming-Da Cheng , Chung-Shi Liu

IPC: H01L21/44

CPC classification number: B23Q3/18 , H01L21/50 , H01L21/561 , H01L21/563 , H01L23/49827 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/75 , H01L24/81 , H01L24/83 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/75733 , H01L2224/75744 , H01L2224/75754 , H01L2224/7598 , H01L2224/75983 , H01L2224/81191 , H01L2224/81815 , H01L2224/83104 , H01L2224/83862 , H01L2224/83868 , H01L2224/83874 , H01L2224/97 , H01L2924/3511 , Y10T29/41 , H01L2924/00 , H01L2924/00014 , H01L2224/81 , H01L2924/00012 , H01L2924/014

Abstract: A method includes dispensing an underfill between a first package component and a second package component, wherein the first package component is placed on a lower jig, and the second package component is over and bonded to the first package component. A through-opening is in the lower jig and under the first package component. The underfill is cured, wherein during the step of curing the underfill, a force is applied to flatten the first package component. The force is applied by performing an action selected from the group consisting of vacuuming and air blowing through the through-opening.

15.

发明授权
Process for forming packages 有权
Title translation: 成型包装的工艺

公开(公告)号：US08603860B2

公开(公告)日：2013-12-10

申请号：US13280163

申请日：2011-10-24

Applicant: Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu

Inventor： Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu

IPC: H01L21/44 , H01L21/48 , H01L21/50

CPC classification number: H01L24/75 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/97 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/75272 , H01L2224/75314 , H01L2224/75704 , H01L2224/7598 , H01L2224/81191 , H01L2224/81208 , H01L2224/8121 , H01L2224/81815 , H01L2224/94 , H01L2224/97 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/014

Abstract: A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat.

Abstract translation: 一种方法包括将第一包装部件装载在凹形船上，以及将第二包装部件放置在第一包装部件上。负载夹具放置在第二包装部件上，其中负载夹具由凹形舟皿的温度可变的间隔件支撑。执行回流步骤以将第二包装部件粘合到第一包装部件。在回流步骤的升温步骤期间，温度可变的间隔件响应于温度升高而软化，并且软化的温度可变间隔件的高度减小，直到负载夹具被刚性间隔件凹船。

16.

发明申请
SEMICONDUCTOR PACKAGE HAVING SOLDER JOINTED REGION WITH CONTROLLED AG CONTENT 审中-公开
Title translation: 具有受控AG内容的焊接接头区域的半导体封装

公开(公告)号：US20130099371A1

公开(公告)日：2013-04-25

申请号：US13278621

申请日：2011-10-21

Applicant: Ming-Da CHENG , Kuei-Wei HUANG , Yu-Peng TSAI , Cheng-Ting CHEN , Hsiu-Jen LIN , Chung-Shi LIU

Inventor： Ming-Da CHENG , Kuei-Wei HUANG , Yu-Peng TSAI , Cheng-Ting CHEN , Hsiu-Jen LIN , Chung-Shi LIU

IPC: H01L23/498 , H01L21/60

CPC classification number: H01L24/13 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05184 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/1146 , H01L2224/11849 , H01L2224/13012 , H01L2224/13014 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16145 , H01L2224/16238 , H01L2224/81191 , H01L2924/00014 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/01073 , H01L2924/01049 , H01L2924/0103 , H01L2924/01025 , H01L2924/01022 , H01L2924/01047 , H01L2924/00012 , H01L2924/00 , H01L2224/05552

Abstract: A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The silver (Ag) content in the solder layer is between 0.5 and 1.8 weight percent.

Abstract translation: 半导体封装包括具有导电迹线的工件和具有导电柱的芯片。芯片附着在工件上，并且在导电柱和导电迹线之间形成焊点区域。焊料层中的银（Ag）含量为0.5-1.8重量％。

17.

发明申请
Package-On-Package (PoP) Structure and Method 有权
Title translation: 封装封装（PoP）结构和方法

公开(公告)号：US20130093097A1

公开(公告)日：2013-04-18

申请号：US13271952

申请日：2011-10-12

Applicant: Chen-Hua Yu , Chung-Shi Liu , Mirng-Ji Lii , Ming-Da Cheng , Chih-Wei Lin

Inventor： Chen-Hua Yu , Chung-Shi Liu , Mirng-Ji Lii , Ming-Da Cheng , Chih-Wei Lin

IPC: H01L23/48 , H01L21/56

CPC classification number: H01L25/50 , H01L21/31051 , H01L21/4846 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76802 , H01L21/76819 , H01L21/76877 , H01L21/76898 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5383 , H01L24/16 , H01L24/19 , H01L24/32 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/13082 , H01L2224/131 , H01L2224/16225 , H01L2224/16237 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/73204 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/81191 , H01L2224/81815 , H01L2224/83104 , H01L2225/06513 , H01L2225/06548 , H01L2225/06555 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H05K1/185 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2924/0665 , H01L2224/48

Abstract: A package-on-package (PoP) structure comprises a first package and a second package. The first package comprises a first die, a second die, and a core material. The core material has a first surface and a second surface. A first redistribution layer (RDL) is on the first surface, and a second RDL is on the second surface. The first die is disposed in the core material between the first surface and the second surface. The second die is coupled to one of the first RDL and the second RDL. The second package comprises a third die and an interposer. The interposer has a first side and a second side. The third die is coupled to the second side of the interposer. The first package is coupled to the second package by first electrical connectors coupled to the second side of the interposer and the first RDL.

Abstract translation: 封装封装（PoP）结构包括第一封装和第二封装。第一包装包括第一模具，第二模具和芯材料。芯材料具有第一表面和第二表面。第一再分配层（RDL）位于第一表面上，第二RDL位于第二表面上。第一模具设置在第一表面和第二表面之间的芯材料中。第二管芯耦合到第一RDL和第二RDL之一。第二包装包括第三管芯和插入件。插入器具有第一侧和第二侧。第三裸片耦合到插入器的第二侧。第一封装通过耦合到插入件的第二侧和第一RDL的第一电连接器耦合到第二封装。