公开(公告)号：US20140001644A1

公开(公告)日：2014-01-02

申请号：US13539048

申请日：2012-06-29

申请人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

发明人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

IPC分类号： H01L23/498 ,  H01L21/02

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

摘要： A device includes a first package component and the second package component. The first package component includes a first plurality of connectors at a top surface of the first package component, and a second plurality of connectors at the top surface. The second package component is over and bonded to the first plurality of connectors, wherein the second plurality of connectors is not bonded to the second package component. A solder resist is on the top surface of the first package component. A trench is disposed in the solder resist, wherein a portion of the trench spaces the second plurality of connectors apart from the first plurality of connectors.

摘要翻译： 一种装置包括第一包装部件和第二包装部件。 第一包装部件包括在第一包装部件的顶表面处的第一多个连接器和在顶部表面处的第二多个连接器。 第二包装部件结束并结合到第一多个连接器，其中第二多个连接器不结合到第二包装部件。 阻焊剂在第一包装部件的顶表面上。 沟槽设置在阻焊剂中，其中沟槽的一部分将第二多个连接器与第一多个连接器分开。

公开(公告)号：US08698306B2

公开(公告)日：2014-04-15

申请号：US12784298

申请日：2010-05-20

申请人： Chen-Hua Yu ,  Jiun Yi Wu

发明人： Chen-Hua Yu ,  Jiun Yi Wu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L21/563 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/13006 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2224/05552

摘要： An under-bump metallization (UBM) structure for a substrate, such as an organic substrate, a ceramic substrate, a silicon or glass interposer, a high density interconnect, a printed circuit board, or the like, is provided. A buffer layer is formed over a contact pad on the substrate such that at least a portion of the contact pad is exposed. A conductor pad is formed within the opening and extends over at least a portion of the buffer layer. The conductor pad may have a uniform thickness and/or a non-planar surface. The substrate may be attached to another substrate and/or a die.

摘要翻译： 提供了用于诸如有机衬底，陶瓷衬底，硅或玻璃插入件，高密度互连，印刷电路板等的衬底的凸块下金属化（UBM）结构。 缓冲层形成在衬底上的接触焊盘上，使得接触焊盘的至少一部分被暴露。 导体焊盘形成在开口内并在缓冲层的至少一部分上延伸。 导体焊盘可以具有均匀的厚度和/或非平面表面。 衬底可以附接到另一衬底和/或模具。

公开(公告)号：US08642393B1

公开(公告)日：2014-02-04

申请号：US13570065

申请日：2012-08-08

申请人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Chien-Hsun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

发明人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Chien-Hsun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

IPC分类号： H01L21/00 ,  H01L23/48

CPC分类号： H01L24/05 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85375 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/2075 ,  H01L2924/20751

摘要： An embodiment is a package-on-package (PoP) device comprising a first package on a first substrate and a second package over the first package. A plurality of wire sticks disposed between the first package and the second package and the plurality of wire sticks couple the first package to the second package. Each of the plurality of wire sticks comprise a conductive wire of a first height affixed to a bond pad on the first substrate and each of the plurality of wire sticks is embedded in a solder joint.

摘要翻译： 一个实施例是一种封装封装（PoP）器件，其包括在第一衬底上的第一封装和在第一封装上的第二封装。 设置在第一封装和第二封装之间的多个线棒，并且多个线棒将第一封装耦合到第二封装。 多个线棒中的每一个包括固定到第一基板上的接合焊盘的第一高度的导线，并且多个线棒中的每一个嵌入焊接接头中。

公开(公告)号：US08766460B2

公开(公告)日：2014-07-01

申请号：US13448796

申请日：2012-04-17

申请人： Jiun Yi Wu

发明人： Jiun Yi Wu

IPC分类号： H01L23/12 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76882 ,  H01L23/147 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of mechanisms of utilizing an interposer frame to form a package using package on package (PoP) technology are provided in this disclosure. The interposer frame is formed by using a substrate with one or more additives to adjust the properties of the substrate. The interposer frame has through substrate holes (TSHs) lined with conductive layer to form through substrate vias (TSVs) with solder balls on adjacent packages. The interposer frame enables the reduction of pitch of TSVs, mismatch of coefficients of thermal expansion (CTEs), shorting, and delamination of solder joints, and improves mechanical strength of the PoP package.

摘要翻译： 在本公开中提供了使用封装（PoP）技术来使用插入器框架来形成封装的机构的实施例。 通过使用具有一种或多种添加剂的基底来调节基材的性质来形成中介层框架。 内插器框架通过衬有导电层的衬底孔（TSH），以在相邻封装上形成具有焊球的衬底通孔（TSV）。 插入框架能够减少TSV的间距，热膨胀系数（CTE）的失配，焊点的短路和分层，并提高PoP封装的机械强度。

公开(公告)号：US08670637B2

公开(公告)日：2014-03-11

申请号：US13209228

申请日：2011-08-12

申请人： Shih-Cheng Chang ,  Jin-Lien Lin ,  Kuo-Ching Hsu ,  Kai-Ming Ching ,  Jiun Yi Wu ,  Yen-Huei Chen

发明人： Shih-Cheng Chang ,  Jin-Lien Lin ,  Kuo-Ching Hsu ,  Kai-Ming Ching ,  Jiun Yi Wu ,  Yen-Huei Chen

IPC分类号： G02B6/12

CPC分类号： G02B6/43 ,  G06F1/105

摘要： An integrated circuit structure includes a semiconductor chip including a front surface and a back surface; a via extending from the back surface of the semiconductor chip into the semiconductor chip, wherein the via is light transparent; and a photon detector in the semiconductor chip and exposed to the via.

摘要翻译： 集成电路结构包括：包括前表面和后表面的半导体芯片; 从半导体芯片的背面延伸到半导体芯片的通孔，其中所述通孔是透光的; 和半导体芯片中的光子检测器，并暴露于通孔。

公开(公告)号：US20140021594A1

公开(公告)日：2014-01-23

申请号：US13554839

申请日：2012-07-20

申请人： Ming-Chih Yew ,  Wen-Yi Lin ,  Jiun Yi Wu ,  Po-Yao Lin

发明人： Ming-Chih Yew ,  Wen-Yi Lin ,  Jiun Yi Wu ,  Po-Yao Lin

IPC分类号： H01L23/495 ,  H05K3/10 ,  H05K1/11

CPC分类号： H01L23/49811 ,  H01L21/563 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/562 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/10152 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/0271 ,  H05K2201/0989 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/81805

摘要： Packaging structures and methods for semiconductor devices are disclosed. In one embodiment, a substrate for packaging a semiconductor device includes a core substrate, an insulating material disposed over the core substrate, and conductive lines disposed in the insulating material. Contact pads are disposed over the insulating material and the conductive lines. The contact pads are disposed in an integrated circuit mounting region of the core substrate. A solder mask define (SMD) material is disposed over the insulating material. Portions of the contact pads are exposed through openings in the SMD material. A stress-relief structure (SRS) is disposed in the SMD material proximate the contact pads. The SRS is disposed entirely in the integrated circuit mounting region of the core substrate.

摘要翻译： 公开了用于半导体器件的封装结构和方法。 在一个实施例中，用于封装半导体器件的衬底包括芯衬底，设置在芯衬底上的绝缘材料以及设置在绝缘材料中的导线。 接触垫设置在绝缘材料和导电线之上。 接触垫设置在芯基板的集成电路安装区域中。 在绝缘材料上设置焊接掩模限定（SMD）材料。 接触垫的一部分通过SMD材料的开口露出。 应力消除结构（SRS）被布置在靠近接触垫的SMD材料中。 SRS完全设置在芯基板的集成电路安装区域中。

公开(公告)号：US20130082372A1

公开(公告)日：2013-04-04

申请号：US13250606

申请日：2011-09-30

申请人： Wen-Yi Lin ,  Ming-Chih Yew ,  Po-Yao Lin ,  Jing Ruei Lu ,  Jiun Yi Wu

发明人： Wen-Yi Lin ,  Ming-Chih Yew ,  Po-Yao Lin ,  Jing Ruei Lu ,  Jiun Yi Wu

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L25/50 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17519 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package on packaging structure provides for improved thermal conduction and mechanical strength by the introduction of a sold thermal coupler between the first and second packages. The first package has a first substrate and through vias through the first substrate. A first set of conductive elements is aligned with and coupled to the through vias of the first substrate. A solid thermal coupler is coupled to the first set of conductive elements and to a die of the second package. A second set of conductive elements is coupled to the die and a bottom substrate is coupled to the second set of conductive elements. The thermal coupler may be, e.g., an interposer, a heat spreader, or a thermal conductive layer.

公开(公告)号：US08005326B2

公开(公告)日：2011-08-23

申请号：US12170570

申请日：2008-07-10

申请人： Shih-Cheng Chang ,  Jin-Lien Lin ,  Kuo-Ching Hsu ,  Kai-Ming Ching ,  Jiun Yi Wu ,  Yen-Huei Chen

发明人： Shih-Cheng Chang ,  Jin-Lien Lin ,  Kuo-Ching Hsu ,  Kai-Ming Ching ,  Jiun Yi Wu ,  Yen-Huei Chen

IPC分类号： G02B6/12

CPC分类号： G02B6/43 ,  G06F1/105

摘要： An integrated circuit structure includes a semiconductor chip including a front surface and a back surface; a via extending from the back surface of the semiconductor chip into the semiconductor chip, wherein the via is light transparent; and a photon detector in the semiconductor chip and exposed to the via.

摘要翻译： 集成电路结构包括：包括前表面和后表面的半导体芯片; 从半导体芯片的背面延伸到半导体芯片的通孔，其中所述通孔是透光的; 和半导体芯片中的光子检测器，并暴露于通孔。

公开(公告)号：US09691636B2

公开(公告)日：2017-06-27

申请号：US13433210

申请日：2012-03-28

申请人： Jiun Yi Wu

发明人： Jiun Yi Wu

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/10

CPC分类号： H01L25/105 ,  H01L21/4803 ,  H01L21/4846 ,  H01L21/563 ,  H01L23/14 ,  H01L23/145 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15321 ,  H01L2924/00

摘要： The mechanisms of using an interposer frame to form a PoP package are provided in the disclosure. The interposer frame is formed by using a substrate with one or more additives to adjust the properties of the substrate. The interposer frame has openings lined with conductive layer to form through substrate vias (TSVs) with solder balls on adjacent packages. The interposer frame enables the reduction of pitch of TSVs, mismatch of coefficients of thermal expansion (CTEs), shorting, and delamination of solder joints, and improve mechanical strength of the package.

公开(公告)号：US09607936B2

公开(公告)日：2017-03-28

申请号：US12619468

申请日：2009-11-16

申请人： Ching-Wen Hsiao ,  Jiun Yi Wu ,  Ru-Ying Huang ,  Chen-Shien Chen

发明人： Ching-Wen Hsiao ,  Jiun Yi Wu ,  Ru-Ying Huang ,  Chen-Shien Chen

IPC分类号： H01L23/488 ,  H01L23/498 ,  H01L23/00 ,  H05K3/34

CPC分类号： H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3463 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： An integrated circuit structure includes a first work piece and a second work piece. The first work piece includes a semiconductor substrate, and a copper bump over the semiconductor substrate. The second work piece includes a bond pad. A solder is between and adjoining the first work piece and the second work piece, wherein the solder electrically connects the copper bump to the bond pad. The solder includes palladium.