公开(公告)号：US20160254205A1

公开(公告)日：2016-09-01

申请号：US15151176

申请日：2016-05-10

Applicant: Invensas Corporation

Inventor： Liang WANG ,  Rajesh KATKAR ,  Charles G. WOYCHIK ,  Cyprian Emeka UZOH

IPC: H01L23/31 ,  H01L25/00 ,  H01L21/48 ,  H01L21/52 ,  H01L21/54 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L23/3178 ,  H01L21/4853 ,  H01L21/52 ,  H01L21/54 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/014

Abstract: A device and method for localizing underfill includes a substrate, a plurality of dies, and underfill material. The substrate includes a plurality of contacts and a plurality of cavities separated by a plurality of mesas. The plurality of dies is mounted to the substrate using the plurality of contacts. The underfill material is located between the substrate and the dies. The underfill material is localized into a plurality of regions using the mesas. Each of the contacts is located in a respective one of the cavities. In some embodiments, the substrate further includes a plurality of channels interconnecting the cavities. In some embodiments, the substrate further includes a plurality of intra-cavity mesas for further localizing the underfill material. In some embodiments, outer edges of a first one of the dies rest on first mesas located on edges of a first one of the cavities.

Abstract translation: 用于定位底部填充物的装置和方法包括基底，多个模具和底部填充材料。 衬底包括多个触点和由多个台面隔开的多个空腔。 使用多个触点将多个模具安装到基板。 底部填充材料位于基底和模具之间。 使用台面将底部填充材料定位到多个区域中。 每个触点位于相应的一个空腔中。 在一些实施例中，衬底还包括互连空腔的多个通道。 在一些实施例中，衬底还包括用于进一步定位底部填充材料的多个腔内台面。 在一些实施例中，第一模具的外边缘位于位于第一空腔的边缘上的第一台面上。

公开(公告)号：US20160163650A1

公开(公告)日：2016-06-09

申请号：US14704714

申请日：2015-05-05

Applicant: Invensas Corporation

Inventor： Guilian GAO ,  Cyprian Emeka UZOH ,  Charles G. WOYCHIK ,  Hong SHEN ,  Arkalgud R. SITARAM ,  Liang WANG ,  Akash AGRAWAL ,  Rajesh KATKAR

IPC: H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/5385 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/0401 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49097 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Die (110) and/or undiced wafers and/or multichip modules (MCMs) are attached on top of an interposer (120) or some other structure (e.g. another integrated circuit) and are covered by an encapsulant (160). Then the interposer is thinned from below. Before encapsulation, a layer (410) more rigid than the encapsulant is formed on the interposer around the die to reduce or eliminate interposer dishing between the die when the interposer is thinned by a mechanical process (e.g. CMP). Other features are also provided.

Abstract translation: 模具（110）和/或未开封的晶片和/或多芯片模块（MCM）被附接在插入器（120）或一些其它结构（例如另一集成电路）的顶部上并被密封剂（160）覆盖。 然后插入器从下面变薄。 在封装之前，在封装周围的插入件周围形成比密封剂更刚性的层（410），以通过机械工艺（例如CMP）来减小或消除插入件在裸片间的凹陷。 还提供其他功能。

公开(公告)号：US20150364538A1

公开(公告)日：2015-12-17

申请号：US14304535

申请日：2014-06-13

Applicant: Invensas Corporation

Inventor： Liang WANG ,  Rajesh KATKAR ,  Hong SHEN ,  Cyprian Emeka UZOH

IPC: H01L49/02 ,  H01L27/108

CPC classification number: H01L28/65 ,  H01L28/90 ,  H01L28/92 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15153 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00012

Abstract: In one embodiment, a method for making a 3D Metal-Insulator-Metal (MIM) capacitor includes providing a substrate having a surface, forming an array of upstanding rods or ridges on the surface, depositing a first layer of an electroconductor on the surface and the array of rods or ridges, coating the first electroconductive layer with a layer of a dielectric, and depositing a second layer of an electroconductor on the dielectric layer. In some embodiments, the array of rods or ridges can be made of a photoresist material, and in others, can comprise bonded wires.

Abstract translation: 在一个实施例中，制造3D金属 - 绝缘体 - 金属（MIM）电容器的方法包括提供具有表面的基板，在表面上形成直立杆或脊的阵列，在表面上沉积第一层电导体， 所述棒或脊的阵列，用电介质层涂覆所述第一导电层，以及在所述电介质层上沉积第二层电导体。 在一些实施例中，杆或脊的阵列可以由光致抗蚀剂材料制成，并且在另一些实施例中，可以包括接合线。

公开(公告)号：US20180233447A1

公开(公告)日：2018-08-16

申请号：US15952935

申请日：2018-04-13

Applicant: Invensas Corporation

Inventor： Cyprian Emeka UZOH ,  Charles G. WOYCHIK ,  Arkalgud R. SITARAM ,  Hong SHEN ,  Zhuowen SUN ,  Liang WANG ,  Guilian GAO

IPC: H01L23/522 ,  H01L21/768 ,  H01L49/02 ,  H01L21/8234

CPC classification number: H01L23/5223 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/5226 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.

公开(公告)号：US20180124927A1

公开(公告)日：2018-05-03

申请号：US15858791

申请日：2017-12-29

Applicant: INVENSAS CORPORATION

Inventor： Liang WANG ,  Rajesh KATKAR ,  Hong SHEN ,  Cyprian Emeka UZOH

IPC: H05K3/40 ,  H01L23/00 ,  H05K1/11 ,  H05K3/34

Abstract: A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

公开(公告)号：US20180019191A1

公开(公告)日：2018-01-18

申请号：US15715515

申请日：2017-09-26

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka UZOH ,  Rajesh Katkar

IPC: H01L23/498 ,  B23K1/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  B32B15/01 ,  B23K35/22 ,  B23K35/02 ,  H01L25/10 ,  H01L25/00 ,  H01L21/56 ,  B23K101/40

CPC classification number: H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2101/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

Abstract: A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

公开(公告)号：US20170278787A1

公开(公告)日：2017-09-28

申请号：US15619160

申请日：2017-06-09

Applicant: Invensas Corporation

Inventor： Cyprian Emeka UZOH ,  Charles G. WOYCHIK ,  Arkalgud R. SITARAM ,  Hong SHEN ,  Zhuowen SUN ,  Liang WANG ,  Guilian GAO

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/8234 ,  H01L21/768

CPC classification number: H01L23/5223 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/5226 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.

公开(公告)号：US20160379885A1

公开(公告)日：2016-12-29

申请号：US14749529

申请日：2015-06-24

Applicant: Invensas Corporation

Inventor： Cyprian Emeka UZOH ,  Guilian GAO ,  Liang WANG ,  Hong SHEN ,  Arkalgud R. SITARAM

IPC: H01L21/82 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/522

CPC classification number: H01L21/82 ,  H01L21/486 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/96 ,  H01L24/97 ,  H01L24/98 ,  H01L2224/04105 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/3512

Abstract: A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities.

Abstract translation: 一种形成该器件的器件和方法，该器件包括形成在衬底器件的衬底中的腔体，该衬底器件还包括形成在衬底中的导电通孔。 芯片器件，晶片和其他衬底器件可以安装到衬底器件上。 可以在衬底装置上形成封装层和材料以便填充空腔。

公开(公告)号：US20150340327A1

公开(公告)日：2015-11-26

申请号：US14284969

申请日：2014-05-22

Applicant: Invensas Corporation

Inventor： Cyprian Emeka UZOH

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/522

CPC classification number: H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/18 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/05599 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A method of forming a semiconductor package includes providing a substrate having one or more conductive elements disposed therein. Each conductive element extends from a first surface of the substrate toward a second surface of the substrate extending beyond the second surface. The second surface comprises one or more substrate regions not occupied by a conductive element. A first die is attached within a substrate region, and the first die is coupled to at least one of the conductive elements. The first die may be coupled to at least one of the conductive elements by a wire bond connection. Alternatively, an RDL is formed over the second surface, and the first die is coupled to at least one conductive element through the RDL. A second die may be attached to an outer surface of the RDL, and the second die is electrically coupled to the first die through the RDL.

Abstract translation: 形成半导体封装的方法包括提供其中设置有一个或多个导电元件的衬底。 每个导电元件从衬底的第一表面延伸到延伸超过第二表面的衬底的第二表面。 第二表面包括未被导电元件占据的一个或多个衬底区域。 第一管芯附接在衬底区域内，并且第一管芯耦合到至少一个导电元件。 第一管芯可以通过引线接合连接耦合到至少一个导电元件。 或者，RDL形成在第二表面上，并且第一裸片通过RDL耦合到至少一个导电元件。 第二管芯可以附接到RDL的外表面，并且第二管芯通过RDL电耦合到第一管芯。

公开(公告)号：US20190157199A1

公开(公告)日：2019-05-23

申请号：US16238786

申请日：2019-01-03

Applicant: Invensas Corporation

Inventor： Cyprian Emeka UZOH ,  Charles G. WOYCHIK ,  Arkalgud R. SITARAM ,  Hong Shen ,  Zhuowen SUN ,  Liang WANG ,  Guilian GAO

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L49/02

CPC classification number: H01L23/5223 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/5226 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, one or more conductive features (120E.A, 120E.B, or both) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.