公开(公告)号：US07765691B2

公开(公告)日：2010-08-03

申请号：US11320922

申请日：2005-12-28

Applicant: Islam A. Salama

Inventor： Islam A. Salama

IPC: H05K3/02

CPC classification number: H05K3/4661 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/027 ,  H05K3/185 ,  H05K3/4007 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K2203/107 ,  H05K2203/1476 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A printed circuit is made by laser projection patterning a metal panel of a substrate, laminating a dielectric layer on the metal panel, laser irradiating the substrate to form vias in the substrate, laser activating a seed coat on the substrate, washing the seed coat from an unpatterned portion of the substrate, forming a patterned build-up layer on the substrate, and etching away a metal plating forming metal protrusions.

Abstract translation: 通过激光投影图案化衬底的金属面板，在金属面板上层叠电介质层，激光照射衬底以在衬底中形成通孔，激光激活衬底上的种皮，将种皮从 基板的未图案化部分，在基板上形成图案化的积层，并蚀刻形成金属电镀的金属突起。

公开(公告)号：US07732919B2

公开(公告)日：2010-06-08

申请号：US12362354

申请日：2009-01-29

Applicant: Ichio Shimizu ,  Kenya Kawano ,  Kisho Ashida ,  Yuichi Machida

Inventor： Ichio Shimizu ,  Kenya Kawano ,  Kisho Ashida ,  Yuichi Machida

IPC: H01L23/34

CPC classification number: H05K7/04 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49589 ,  H01L24/28 ,  H01L24/29 ,  H01L24/36 ,  H01L24/39 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/83855 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K3/202 ,  H05K3/321 ,  H05K3/3442 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H05K2201/1003 ,  H05K2201/10484 ,  H05K2201/10636 ,  H05K2201/10924 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Coupling reliability of a passive component is improved to increase the reliability of a semiconductor device. A first through hole is formed in a first electrode part of a first plate-like lead, and a second through hole is formed in a second electrode part of a second plate-like lead. As a result, at the first electrode part of the first plate-like lead, one external terminal of the passive component can be coupled to the first electrode parts on both sides of the first through hole while being laid across the first through hole. Also, at the second electrode part of the second plate-like lead, the other external terminal of the passive component can be coupled to the second electrode parts on both sides of the second through hole while being laid across the second through hole. Accordingly, at central portions both in the longitudinal and width directions of the passive component, the passive component is surrounded by sealing members. As a result, thermal stress applied to jointing materials such as solder can be reduced, improving the reliability of the semiconductor device (semiconductor package).

Abstract translation: 改善了无源部件的耦合可靠性，以提高半导体器件的可靠性。 第一通孔形成在第一板状引线的第一电极部分中，第二通孔形成在第二板状引线的第二电极部分中。 结果，在第一板状引线的第一电极部分，无源部件的一个外部端子可以被连接到第一通孔的两侧的第一电极部分，同时跨过第一通孔。 此外，在第二板状引线的第二电极部分，无源部件的另一个外部端子可以在跨过第二通孔而被布置在第二通孔的两侧上的第二电极部件上。 因此，在无源部件的纵向和宽度方向的中心部分处，被动部件被密封部件包围。 结果，可以减少施加到诸如焊料的接合材料的热应力，从而提高半导体器件（半导体封装）的可靠性。

公开(公告)号：US20100071936A1

公开(公告)日：2010-03-25

申请号：US12594196

申请日：2008-04-04

Applicant: Kia Kuang Tan

Inventor： Kia Kuang Tan

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/09

CPC classification number: H05K1/0204 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/19041 ,  H05K1/053 ,  H05K1/056 ,  H05K2201/09054 ,  H05K2201/09745 ,  H05K2201/09845 ,  H05K2201/10106 ,  H05K2201/2054 ,  H05K2203/0315 ,  H01L2924/00014

Abstract: Methods for controlling thermal conductivity paths in a metal core circuit board, as well as methods to provide selective electrical isolation, are described. In one embodiment, grooves are formed in an aluminum substrate surrounding areas where electrical components are to be mounted on the substrate. The grooves are oxidized along with the opposing surface of the substrate to create a vertical oxide ring around the area for electrical and lateral thermal isolation. This also allows the substrate to be made relatively thick for mechanical strength. Other features include forming copper around oxidized sides of the substrate for connection between top and bottom copper layers; plating up copper to be co-planar with a raised dielectric layer; forming indentions in the substrate for containing a dielectric so the dielectric is co-planar with the remaining surface; forming copper vias through the substrate; and planarizing the substrate surface so that conductors and dielectric layers are co-planar.

Abstract translation: 描述了用于控制金属芯电路板中的导热路径的方法以及提供选择性电隔离的方法。 在一个实施例中，在铝基板中形成凹槽，围绕要在基板上安装电气部件的区域。 凹槽与衬底的相对表面一起被氧化以在该区域周围形成垂直氧化环，用于电和横向热隔离。 这也使得基板的机械强度相对较厚。 其他特征包括在基底的氧化侧面周围形成铜，以在顶部和底部铜层之间连接; 电镀铜与凸起的电介质层共面; 在用于容纳电介质的基板中形成凹陷，使得电介质与剩余的表面共面; 通过基底形成铜通孔; 并平坦化衬底表面，使得导体和电介质层是共面的。

公开(公告)号：US07679914B2

公开(公告)日：2010-03-16

申请号：US11902379

申请日：2007-09-21

Applicant: Atsushi Kashiwazaki

Inventor： Atsushi Kashiwazaki

IPC: H05K7/20 ,  H01L23/34

CPC classification number: H05K1/181 ,  H01L23/4334 ,  H01L23/49531 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H05K1/0203 ,  H05K1/0306 ,  H05K1/167 ,  H05K3/0061 ,  H05K3/284 ,  H05K2201/09745 ,  H05K2201/1034 ,  H05K2201/1056 ,  H05K2201/10674 ,  H05K2201/10924 ,  H05K2203/049 ,  H05K2203/1572 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An electronic controller having a circuit board with an element disposed thereon, a base member with the circuit board adhered thereon and a lead terminal in an electrical connection with the circuit board includes as the elements thick film resistors and electric components soldered by solder on a bottom side of the circuit board, and also includes electronic components including bare chips being at least wired without soldering on a top surface of the circuit board. The electronic controller has a first concave portion at a position corresponding to a position of the components on a surface that has the circuit board of the base member adhered thereon, and the circuit board is molded by a sealing resin so as to expose a portion of the base member and a portion of the lead terminal.

Abstract translation: 一种电子控制器，具有设置在其上的元件的电路板，其上附着有电路板的基座构件和与电路板电连接的引线端子包括作为元件的厚膜电阻器和焊接在底部的焊料的电气部件 并且还包括电子部件，包括至少布线的裸芯片，而不在电路板的顶表面上焊接。 该电子控制器在对应于在其上附着有基底部件的电路板的表面上的部件的位置处的位置处具有第一凹部，并且电路板由密封树脂模制以暴露部分 基座部件和引线端子的一部分。

公开(公告)号：US20100000085A1

公开(公告)日：2010-01-07

申请号：US12047694

申请日：2008-03-13

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H05K3/10

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种制造模块装置的方法，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US07641479B2

公开(公告)日：2010-01-05

申请号：US12047664

申请日：2008-03-13

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种制造包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入件的方法。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20090320282A1

公开(公告)日：2009-12-31

申请号：US12106462

申请日：2008-04-21

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R43/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

公开(公告)号：US07622183B2

公开(公告)日：2009-11-24

申请号：US11385904

申请日：2006-03-22

Applicant: Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

Inventor： Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

IPC: B32B3/00

CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/382 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/0278 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31681

Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

Abstract translation: 本发明提供了一种多层印刷线路板，其具有有利地用于在其上形成精细电路图案的填充通孔结构，并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层构成，层间绝缘树脂层各自形成有各自填充有镀层的孔，以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦，并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半，小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙，并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂，氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。

公开(公告)号：US07595553B2

公开(公告)日：2009-09-29

申请号：US11937208

申请日：2007-11-08

Applicant: Masayuki Nagamatsu ,  Ryosuke Usui

Inventor： Masayuki Nagamatsu ,  Ryosuke Usui

IPC: H01L23/12 ,  H01L23/06 ,  H01L23/04 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/053 ,  H01L23/02

CPC classification number: H05K1/111 ,  H01L23/295 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/181 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/383 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/0542 ,  Y02P70/611 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region. A solder resist is formed in such a manner as to cover part of the gold plating layer and the wiring pattern corresponding to the boundary region and the wiring region, and the solder resist has a predetermined opening through which to connect to the semiconductor device. A conductive member is connected to the gold plating layer in the electrode region, and a molded resin layer seals the entire semiconductor module.

Abstract translation: 本发明的优点是抑制从焊盘电极部分渗透的湿气在布线图案的表面上扩散，并提高包装板的可靠性。 包装板的布线图案形成在绝缘基板上，并且包括布线区域，与半导体器件连接的电极区域（焊盘电极）以及设置在布线区域和电极区域之间的边界区域。 在布线图案的电极区域的表面上设置镀金层。 布线图案的边界区域的顶表面被形成为从布线图案的布线区域的顶表面凹陷，并且在边界区域中设置有台阶部分。 形成阻焊层，以覆盖与边界区域和布线区域相对应的金镀层和布线图案的一部分，阻焊剂具有与半导体器件连接的预定开口。 导电构件连接到电极区域中的镀金层，并且模制树脂层密封整个半导体模块。

公开(公告)号：US07583475B2

公开(公告)日：2009-09-01

申请号：US11066949

申请日：2005-02-25

Applicant: Yuhsuke Matsumoto ,  Tatsumi Tsuchiya ,  Takaaki Murokawa ,  Yoshio Uematsu ,  Tatsushi Yoshida ,  Nobuyuki Hashi ,  Hiroyasu Tsuchida ,  Takuma Muraki

Inventor： Yuhsuke Matsumoto ,  Tatsumi Tsuchiya ,  Takaaki Murokawa ,  Yoshio Uematsu ,  Tatsushi Yoshida ,  Nobuyuki Hashi ,  Hiroyasu Tsuchida ,  Takuma Muraki

IPC: G11B5/48

CPC classification number: H05K3/3442 ,  G11B5/4853 ,  H05K1/111 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H05K2201/10727 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

Abstract: Embodiments of the invention provide techniques to prevent, when a bonding pad and a lead wiring pad are to be connected using a solder ball, the solder ball from deviating from a centerline and a soldering problem from occurring. In one embodiment, a head suspension assembly includes a solder ball disposed between a lead wiring pad provided for a flexure and a bonding pad provided for a slider. The solder ball is then melted for making a soldered joint between the lead wiring pad and the bonding pad. A through slot is provided at a position near a centerline on a front surface of the lead wiring pad. The solder ball is dropped into the through slot by gravity from the front surface of the lead wiring pad. A contact area in contact with the solder ball is thereby secured on a side of the slider.

Abstract translation: 本发明的实施例提供了当使用焊球连接接合焊盘和引线接线焊盘时防止焊料球偏离中心线并发生焊接问题的技术。 在一个实施例中，头悬挂组件包括设置在为弯曲提供的引线布线垫和为滑块设置的接合焊盘之间的焊球。 然后将焊球熔化以在引线接线焊盘和焊盘之间形成焊接接头。 在引线配线衬垫的前表面上的中心线附近的位置处设有通槽。 焊球通过重力从引线接线板的前表面落入通槽。 因此，与滑块接触的接触区域被固定在滑块的一侧。