公开(公告)号：US06261868B1

公开(公告)日：2001-07-17

申请号：US09285827

申请日：1999-04-02

Applicant: Gerald R. Miller ,  Lakshminarayan Viswanathan

Inventor： Gerald R. Miller ,  Lakshminarayan Viswanathan

IPC: H01L2144

CPC classification number: H01L23/66 ,  H01L2924/0002 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/00

Abstract: A method for packaging a semiconductor device (23) to form a semiconductor component (10). A die attach material (17) is disposed on a flange (11). A semiconductor chip (23) is bonded to the die attach material (17). After disposing the die attach material (17) on the flange (11), an insulator material (28) is coupled to the flange (11). A leadframe (32) is coupled to the semiconductor chip (23) via a plurality of wirebonds (36). The wirebonds (36) and the semiconductor chip (23) are protected by a lid (37).

Abstract translation: 一种用于封装半导体器件（23）以形成半导体部件（10）的方法。 芯片附接材料（17）设置在凸缘（11）上。 半导体芯片（23）被接合到管芯附着材料（17）上。 在将管芯附着材料（17）设置在凸缘（11）上之后，绝缘体材料（28）联接到凸缘（11）上。 引线框架（32）经由多个引线键（36）耦合到半导体芯片（23）。 线圈（36）和半导体芯片（23）由盖（37）保护。

公开(公告)号：US09698116B2

公开(公告)日：2017-07-04

申请号：US14530285

申请日：2014-10-31

Applicant: Lakshminarayan Viswanathan ,  Jaynal A. Molla

Inventor： Lakshminarayan Viswanathan ,  Jaynal A. Molla

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373

CPC classification number: H01L23/3736 ,  H01L23/367 ,  H01L23/3735 ,  H01L24/29 ,  H01L2224/29083 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144

Abstract: A semiconductor device and a method of manufacturing the same include a die and a planar thermal layer, and a thick-silver layer having a thickness of at least four (4) micrometers disposed directly onto a first planar side of the planar thermal layer, as well as a metallurgical die-attach disposed between the thick-silver layer and the die, the metallurgical die-attach directly contacting the thick-silver layer.

公开(公告)号：US09589860B2

公开(公告)日：2017-03-07

申请号：US14508645

申请日：2014-10-07

Applicant: Lakshminarayan Viswanathan ,  Jaynal A. Molla

Inventor： Lakshminarayan Viswanathan ,  Jaynal A. Molla

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/36 ,  H01L23/367 ,  H01L23/00 ,  H01L23/482 ,  H01L21/683 ,  H01L23/66 ,  H01L21/56

CPC classification number: H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/741 ,  H01L24/743 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/03436 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/05864 ,  H01L2224/05887 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/27002 ,  H01L2224/2731 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/27438 ,  H01L2224/27505 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29117 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2918 ,  H01L2224/29184 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/296 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83815 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/1016 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/3512 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/01015 ,  H01L2924/01048 ,  H01L2924/01014 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01026 ,  H01L2224/03 ,  H01L2224/05099 ,  H01L2924/01006 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2221/68304 ,  H01L21/304 ,  H01L21/78 ,  H01L2224/83 ,  H01L2924/0781 ,  H01L2924/00 ,  H01L2224/034 ,  H01L2221/68368 ,  H01L2224/274

Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.

Abstract translation: 电子器件包括具有下表面的半导体管芯，位于半导体管芯的下表面下方的烧结金属层，在烧结金属层下面的导热流动层，以及位于导热流动层下面的导热基底。

公开(公告)号：US09518555B2

公开(公告)日：2016-12-13

申请号：US14560675

申请日：2014-12-04

Applicant: Mario M. Bokatius ,  Lakshminarayan Viswanathan ,  David P. Lester ,  Basim H. Noori ,  Pierre Marie J. Piel

Inventor： Mario M. Bokatius ,  Lakshminarayan Viswanathan ,  David P. Lester ,  Basim H. Noori ,  Pierre Marie J. Piel

IPC: H01T13/16 ,  F02P23/04 ,  H05H1/24 ,  H01T21/02 ,  H05H1/52

CPC classification number: F02P23/04 ,  F02P9/007 ,  F02P13/00 ,  H01T13/16 ,  H01T21/02 ,  H05H1/24 ,  H05H1/52

Abstract: A radiation device and related method are presented. The radiation device includes a body. The body includes a threaded portion configured to engage with a threaded opening in an engine and an open interior volume. The radiation device includes a ground electrode coupled to the body, a substrate disposed within the open interior volume in the body, and a radio frequency generator on the substrate. The radio frequency generator is configured to receive an input signal and, in response to the input signal, generate plasma energy between the body and the ground electrode.

Abstract translation: 提出了一种辐射装置及相关方法。 辐射装置包括主体。 主体包括构造成与发动机中的螺纹开口和敞开的内部容积接合的螺纹部分。 辐射装置包括耦合到主体的接地电极，设置在主体内的开放内部空间内的基板，以及基板上的射频发生器。 射频发生器被配置为接收输入信号，并且响应于输入信号，在主体和接地电极之间产生等离子体能量。

公开(公告)号：US20160160833A1

公开(公告)日：2016-06-09

申请号：US14560675

申请日：2014-12-04

Applicant: Mario M. Bokatius ,  Lakshminarayan Viswanathan ,  David P. Lester ,  Basim H. Noori ,  Pierre Marie J. Piel

Inventor： Mario M. Bokatius ,  Lakshminarayan Viswanathan ,  David P. Lester ,  Basim H. Noori ,  Pierre Marie J. Piel

IPC: F02P23/04 ,  H01T13/16 ,  H01T21/02 ,  H05H1/24

CPC classification number: F02P23/04 ,  F02P9/007 ,  F02P13/00 ,  H01T13/16 ,  H01T21/02 ,  H05H1/24 ,  H05H1/52

Abstract: A radiation device and related method are presented. The radiation device includes a body. The body includes a threaded portion configured to engage with a threaded opening in an engine and an open interior volume. The radiation device includes a ground electrode coupled to the body, a substrate disposed within the open interior volume in the body, and a radio frequency generator on the substrate. The radio frequency generator is configured to receive an input signal and, in response to the input signal, generate plasma energy between the body and the ground electrode.

Abstract translation: 提出了一种辐射装置及相关方法。 辐射装置包括主体。 主体包括构造成与发动机中的螺纹开口和敞开的内部容积接合的螺纹部分。 辐射装置包括耦合到主体的接地电极，设置在主体内的开放内部空间内的基板，以及基板上的射频发生器。 射频发生器被配置为接收输入信号，并且响应于输入信号，在主体和接地电极之间产生等离子体能量。

公开(公告)号：US09312231B2

公开(公告)日：2016-04-12

申请号：US14068496

申请日：2013-10-31

Applicant: Lakshminarayan Viswanathan

Inventor： Lakshminarayan Viswanathan

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/057 ,  H01L23/14 ,  H01L23/367 ,  H01L21/50 ,  H01L23/31

CPC classification number: H01L23/047 ,  H01L21/288 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/50 ,  H01L23/057 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/4924 ,  H01L23/49861 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/2731 ,  H01L2224/29139 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0461 ,  H01L2924/0469 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/16152 ,  H01L2924/16598 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.

Abstract translation: 提供了结合使用银耦合的陶瓷，有机和金属材料的组合的半导体器件封装。 银在加压和低温下以微粒的形式施加。 应用后，银形成具有典型的银熔点的固体，因此成品封装可承受明显高于制造温度的温度。 此外，由于银是各种组合材料之间的界面材料，所以陶瓷，有机和金属组分之间的不同材料性质（如热膨胀系数）的影响由于低粘结温度和 银。

公开(公告)号：US09263375B2

公开(公告)日：2016-02-16

申请号：US14341292

申请日：2014-07-25

Applicant: Lakshminarayan Viswanathan ,  Lakshmi N. Ramanathan ,  Audel A. Sanchez ,  Fernando A. Santos

Inventor： Lakshminarayan Viswanathan ,  Lakshmi N. Ramanathan ,  Audel A. Sanchez ,  Fernando A. Santos

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/49568 ,  H01L21/4825 ,  H01L21/4882 ,  H01L21/561 ,  H01L21/568 ,  H01L23/04 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/49506 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is opposite to the first surface. A second flange also has a first surface and a second surface, with the first surface providing a second one of the terminations, and the second surface is opposite to the first surface. A die is mounted to the second surface of the first flange with a material having a melting point in excess of 240° C. An electrical interconnect extends between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body.

Abstract translation: 封装的半导体器件可以包括终端表面，其终端被配置为表面安装到印刷电路板的无引线互连。 第一凸缘具有第一表面和第二表面。 第一表面提供第一个终端，第二表面与第一表面相对。 第二凸缘还具有第一表面和第二表面，其中第一表面提供端接件中的第二表面，并且第二表面与第一表面相对。 使用熔点超过240℃的材料将模具安装到第一凸缘的第二表面。电互连件在模具与第二凸缘的与端接表面相对的第二表面之间延伸，使得电气 互连，第一凸缘和第二凸缘基本上容纳在主体内。

公开(公告)号：US20140070365A1

公开(公告)日：2014-03-13

申请号：US13611793

申请日：2012-09-12

Applicant: Lakshminarayan Viswanathan ,  Jeffrey K. Jones ,  Scott D. Marshall

Inventor： Lakshminarayan Viswanathan ,  Jeffrey K. Jones ,  Scott D. Marshall

IPC: H01L27/08 ,  H01L21/76 ,  H01L29/92

CPC classification number: H01L23/66 ,  H01L23/047 ,  H01L23/49589 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.

Abstract translation: 半导体器件（例如，RF器件）的实施例包括衬底，隔离结构，有源器件，引线和电路。 隔离结构耦合到衬底，并且包括开口。 有源器件区域由通过开口暴露的衬底表面的一部分限定。 有源器件耦合到有源器件区域内的衬底表面。 电路电耦合在有源器件和引线之间。 电路包括位于有源器件区域外的一个或多个元件（例如，物理耦合到隔离结构和/或在引线下方）。 位于有源器件区域之外的元件可以包括封装端接电路和/或阻抗匹配电路的元件。 实施例还包括制造这种半导体器件的方法。

公开(公告)号：US20130154068A1

公开(公告)日：2013-06-20

申请号：US13326636

申请日：2011-12-15

Applicant: Audel A. Sanchez ,  Fernando A. Santos ,  Lakshminarayan Viswanathan

Inventor： Audel A. Sanchez ,  Fernando A. Santos ,  Lakshminarayan Viswanathan

IPC: H01L23/34 ,  H01L21/50

CPC classification number: H01L21/56 ,  H01L21/76895 ,  H01L23/3107 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20755 ,  H01L2924/00012

Abstract: A packaged leadless semiconductor device (20) includes a heat sink flange (24) to which semiconductor dies (26) are coupled using a high temperature die attach process. The semiconductor device (20) further includes a frame structure (28) pre-formed with bent terminal pads (44). The frame structure (28) is combined with the flange (24) so that a lower surface (36) of the flange (24) and a lower section (54) of each terminal pad (44) are in coplanar alignment, and so that an upper section (52) of each terminal pad (44) overlies the flange (24). Interconnects (30) interconnect the die (26) with the upper section (52) of the terminal pad (44). An encapsulant (32) encases the frame structure (28), flange (24), die (26), and interconnects (30) with the lower section (54) of each terminal pad (44) and the lower surface (36) of the flange (24) remaining exposed from the encapsulant (32).

Abstract translation: 封装的无引线半导体器件（20）包括散热器法兰（24），半导体管芯（26）使用高温管芯附接工艺耦合到该散热器法兰（24）。 半导体器件（20）还包括预先形成有弯曲的端子焊盘（44）的框架结构（28）。 框架结构（28）与凸缘（24）组合，使得凸缘（24）的下表面（36）和每个端子垫（44）的下部（54）处于共面对准，并且因此 每个端子焊盘（44）的上部（52）覆盖在凸缘（24）上。 互连件（30）将管芯（26）与端子焊盘（44）的上部（52）互连。 密封剂（32）将框架结构（28），凸缘（24），模具（26）和互连件（30）与每个端子垫（44）的下部（54）和下表面（36） 所述凸缘（24）保持暴露于所述密封剂（32）。

公开(公告)号：US08318545B2

公开(公告)日：2012-11-27

申请号：US12695983

申请日：2010-01-28

Applicant: David F. Abdo ,  Monte G. Miller ,  Lakshminarayan Viswanathan

Inventor： David F. Abdo ,  Monte G. Miller ,  Lakshminarayan Viswanathan

IPC: H01L21/00

CPC classification number: H01L24/29 ,  H01L23/3736 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/838 ,  H01L2224/83805 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/157 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/01006 ,  H01L2924/00015 ,  H01L2924/00014

Abstract: A method of making a mounted gallium nitride (GaN) device includes obtaining a device structure comprising a silicon layer, a silicon carbide (SiC) layer over the silicon layer, and a GaN layer over the SiC layer. The GaN layer is processed to form an active layer of active devices and interconnect over the GaN layer. After the step of processing the GaN layer, a gold layer is formed on the silicon layer. The device structure is attached to a heat sink structure using the gold layer. The mounted GaN device includes the SiC layer over the polysilicon layer and the GaN layer over the SiC layer. The active layer is over the GaN layer.

Abstract translation: 制造安装的氮化镓（GaN）器件的方法包括获得包括在硅层上的硅层，碳化硅（SiC）层和在SiC层上的GaN层的器件结构。 处理GaN层以形成有源器件的有源层并在GaN层上互连。 在处理GaN层的步骤之后，在硅层上形成金层。 该装置结构使用金层连接到散热器结构。 安装的GaN器件包括多晶硅层上的SiC层和SiC层上的GaN层。 有源层在GaN层之上。