公开(公告)号：US06197619B1

公开(公告)日：2001-03-06

申请号：US09239382

申请日：1999-01-28

Applicant: Michael Anthony Gaynes ,  Mark Vincent Pierson ,  Aleksander Zubelewicz

Inventor： Michael Anthony Gaynes ,  Mark Vincent Pierson ,  Aleksander Zubelewicz

IPC: H01L2144

CPC classification number: H01L23/3135 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A structure and methods for reinforcing a semiconductor device to prevent cracking is provided. The device may take the form of a semiconductor chip or a semiconductor chip package. When a semiconductor chip is provided, an adhesion layer is applied over its top surface, followed by the application of a reinforcing layer over the adhesion layer. When a semiconductor chip package is provided, the package first undergoes a cleaning process, followed by the application of an adhesion layer over its top surface and, lastly, the application of a reinforcing layer over the adhesion layer.

Abstract translation: 提供了用于加强半导体器件以防止开裂的结构和方法。 该器件可以采取半导体芯片或半导体芯片封装的形式。 当提供半导体芯片时，在其顶表面上施加粘合层，随后在粘合层上施加增强层。 当提供半导体芯片封装时，封装首先进行清洁处理，然后在其顶表面上施加粘合层，最后在粘合层上施加增强层。

公开(公告)号：US6150726A

公开(公告)日：2000-11-21

申请号：US88834

申请日：1998-06-02

Applicant: Natalie Barbara Feilchenfeld ,  Stephen Joseph Fuerniss ,  Michael Anthony Gaynes ,  Mark Vincent Pierson ,  Pat Hoontrakul

Inventor： Natalie Barbara Feilchenfeld ,  Stephen Joseph Fuerniss ,  Michael Anthony Gaynes ,  Mark Vincent Pierson ,  Pat Hoontrakul

IPC: G03F7/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L23/498 ,  H05K3/12 ,  H05K3/28 ,  H05K3/32 ,  H05K3/34 ,  H05K1/11 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L29/62

CPC classification number: H01L24/16 ,  G03F7/00 ,  G03F7/0035 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4867 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/12 ,  H01L24/29 ,  H01L24/83 ,  H05K3/321 ,  H05K3/3484 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K2201/0218 ,  H05K2201/0245 ,  H05K2201/10674 ,  H05K2201/10984 ,  H05K2203/0568 ,  H05K2203/0577 ,  H05K2203/0769 ,  H05K3/1216 ,  H05K3/28 ,  H05K3/3463

Abstract: Chip carrier packages, integrated circuits, wiring boards, and assemblies in computer systems are made having conductive adhesive interconnections. Electrically conductive polymer paste with metal particles and powders are used with photoimagable polymer films to form the interconnection structure. These articles are produced with screening and printing processes using a screening head and printing machine.

Abstract translation: 计算机系统中的芯片载体封装，集成电路，布线板和组件被制成具有导电粘合剂互连。 具有金属颗粒和粉末的导电聚合物浆料与光可塑聚合物膜一起使用以形成互连结构。 这些物品使用筛选头和印刷机进行筛选和印刷。

公开(公告)号：US6115912A

公开(公告)日：2000-09-12

申请号：US428751

申请日：1999-10-28

Applicant: Alan Harris Crudo ,  John Gillette Davis ,  Christian Robert Le Coz ,  Mark Vincent Pierson ,  Amit Kumar Sarkhel ,  Ajit Kumar Trivedi

Inventor： Alan Harris Crudo ,  John Gillette Davis ,  Christian Robert Le Coz ,  Mark Vincent Pierson ,  Amit Kumar Sarkhel ,  Ajit Kumar Trivedi

IPC: H01L23/12 ,  H05K3/00 ,  H05K3/22 ,  H05K3/34 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/3436 ,  H05K3/225 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K2201/0949 ,  H05K2201/10287 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/175 ,  H05K3/0047 ,  H05K3/341 ,  H05K3/429 ,  Y02P70/613 ,  Y10T29/49124 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49153 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49723 ,  Y10T29/49726 ,  Y10T29/49728 ,  Y10T29/4973 ,  Y10T29/49734 ,  Y10T29/49815 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53274

Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin. Alternately, after the plated through hole is drilled out, an insulated wire may be inserted into the hole with insulation removed from the length of the wire which extends beyond one surface of the printed circuit board. The bare length of wire is bent parallel to the surface of the printed circuit board and attached thereto by a solder reflow process. In a dog bone configuration, the wire is formed around a pad on the surface of the printed circuit board which receives the solder ball.

公开(公告)号：US5938106A

公开(公告)日：1999-08-17

申请号：US691275

申请日：1996-08-01

Applicant: Mark Vincent Pierson

Inventor： Mark Vincent Pierson

IPC: B23K3/06 ,  H05K1/00 ,  H05K3/00 ,  H05K3/12 ,  H05K3/34 ,  B23K3/00

CPC classification number: H05K3/3484 ,  B23K3/0623 ,  B23K3/0638 ,  H05K3/1225 ,  H05K3/3478 ,  B23K2201/36 ,  B23K2201/42 ,  H05K1/0393 ,  H05K2203/0126 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/1545 ,  H05K3/0097 ,  H05K3/1216

Abstract: A method and apparatus is disclosed for applying solder to a substrate which has a predetermined pattern of receiving pads thereon and forming solder balls from the applied solder. A conveyor is provided having a support member and a continuous metering member. The metering member has openings thereon arranged in the same preselected pattern as the solder receiving pads on the substrate. The substrate is moved into contact with the support member and the metering member, the openings in the metering member being in alignment with the solder receiving pads of the substrate. A container of solder is provided which supplies solder to the openings. The solder may be in liquid form, or in paste form, or in the form of solid solder balls. The applied solder, if in the form of paste or solid balls is melted. Thereafter, the solder is solidified on the pads to form solder balls, and the substrate is discharged from the conveyor with the solidified solder balls thereon.

公开(公告)号：US5872051A

公开(公告)日：1999-02-16

申请号：US510401

申请日：1995-08-02

Applicant: Kenneth Michael Fallon ,  Christian Robert Le Coz ,  Mark Vincent Pierson

Inventor： Kenneth Michael Fallon ,  Christian Robert Le Coz ,  Mark Vincent Pierson

IPC: B23K1/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K3/32 ,  H05K3/34 ,  H01L21/288 ,  H01L21/58

CPC classification number: H01L24/12 ,  B23K1/0016 ,  H01L21/4867 ,  H01L21/563 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H05K3/3484 ,  B23K2201/40 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1182 ,  H01L2224/1184 ,  H01L2224/13006 ,  H01L2224/13011 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/742 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3511 ,  H05K2201/035 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K3/321 ,  H05K3/3436 ,  H05K3/3463

Abstract: A process within substrate is provided with vias communicating with surface contacts or bumps. Joining material paste is forced through holes in a screen onto an area array of the contacts on the substrate then the screen is biased against the substrate as the paste is heated and cooled to transfer the joining material onto the contacts. Alternately, joining material paste is forced into the screen and then a substrate is placed onto the screen with an area array of bump contacts of the substrate in contact with the solder paste, and then the paste is heated and cooled to transfer the material onto the bumps. The joining material may be a solder paste, conductive adhesive paste, or transient liquid bond paste. The substrate may be a semiconductor chip substrate, flexible or rigid organic substrate, or a metal substrate coated to form a dielectric surface. Also, the substrate may be a computer chip, chip carrier substrate or a circuit board substrate. The process may be used to produce flip chips, ball grid array modules, column grid array modules, circuit boards, and attachment structures of the preceding components including information handling systems.

Abstract translation: 衬底内的工艺设有与表面接触或凸块连通的通孔。 连接材料糊料被迫通过筛网上的孔到基板上的触点的区域阵列上，然后当膏被加热和冷却以将接合材料转移到触点上时，屏幕被偏压到基板上。 或者，将接合材料糊剂强制进入筛网，然后将基板放置在具有与焊膏接触的基板的凸起接触的区域阵列的屏幕上，然后将该浆料加热并冷却以将材料转移到 颠簸 接合材料可以是焊膏，导电粘合剂糊或瞬态液体粘合膏。 衬底可以是半导体芯片衬底，柔性或刚性有机衬底或涂覆以形成电介质表面的金属衬底。 此外，基板可以是计算机芯片，芯片载体基板或电路板基板。 该过程可用于制造包括信息处理系统的前述组件的倒装芯片，球栅阵列模块，列网格阵列模块，电路板和附接结构。

公开(公告)号：US5796452A

公开(公告)日：1998-08-18

申请号：US828215

申请日：1997-03-21

Applicant: Mark Vincent Pierson

Inventor： Mark Vincent Pierson

IPC: G02F1/1333 ,  G02F1/1345 ,  G02F1/1343

CPC classification number: G02F1/13336 ,  G02F1/1345

Abstract: A liquid crystal display is provided having a plurality of liquid crystal displays arranged in matrix and interconnected to a tile carrier wherein at least one of the individual display tiles has both its X and Y address wiring routed to a single tile edge.

Abstract translation: 提供一种液晶显示器，其具有排列成矩阵并互连到瓦片载体的多个液晶显示器，其中至少一个单独的显示瓦片将其X和Y地址布线路由到单个瓦片边缘。