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    Semiconductor chip assembly
    42.
    发明授权
    Semiconductor chip assembly 有权
    半导体芯片组装

    公开(公告)号：US06169328A

    公开(公告)日：2001-01-02

    申请号：US09246056

    申请日：1999-02-08

    申请人： Craig Mitchell ,  Mike Warner ,  Jim Behlen

    发明人： Craig Mitchell ,  Mike Warner ,  Jim Behlen

    IPC分类号： H01L2348

    CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/72 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H01L2924/00

    摘要： A semiconductor chip package structure for providing a reliable interface between a semiconductor chip and a PWB to accommodate for the thermal coefficient of expansion mismatch therebetween. The interface between a chip and a PWB is comprised of a package substrate having a plurality of compliant pads defining channels therebetween. The package substrate is typically comprised of a flexible dielectric sheet that has leads and terminals on at least one surface thereof. The pads have a first coefficient of thermal expansion (“CTE”) and are comprised of a material having a fairly low modulus of elasticity. An encapsulant having a second CTE lower than the CTE of the compliant pads is disposed within the channels to form a uniform encapsulation layer. The pads are in rough alignment with the conductive terminals on the package substrate thereby allowing independent movement of the terminals during thermal cycling of the chip. The encapsulant encases the conductive leads electrically connecting the terminals to chip contacts on a face surface of the chip. The lower CTE of the encapsulant controls the flexing of the conductive leads so that the leads do not prematurely fatigue and become unreliable while the lower modulus compliant pads relieve the stress on the solder balls induced by the CTE mismatch of the chip and the PWB.

    摘要翻译： 一种用于在半导体芯片和PWB之间提供可靠接口的半导体芯片封装结构，以适应其间的热膨胀系数不匹配。 芯片和PWB之间的接口包括具有多个在其间形成通道的柔性衬垫的封装衬底。 封装基板通常由在其至少一个表面上具有引线和端子的柔性电介质片构成。 垫具有第一热膨胀系数（“CTE”），并且由具有相当低的弹性模量的材料组成。 具有比柔性焊盘的CTE低的第二CTE的密封剂设置在通道内以形成均匀的封装层。 焊盘与封装衬底上的导电端子粗略对准，从而允许在芯片的热循环期间端子的独立移动。 密封剂封装导电引线，将引线电连接到芯片的表面上的芯片触点。 密封剂的较低CTE控制导电引线的弯曲，使得引线不会过早地疲劳并变得不可靠，而较低模量的柔性焊盘缓解由芯片和PWB的CTE不匹配引起的焊球上的应力。

    BSI image sensor package with variable-height silicon for even reception of different wavelengths
    44.
    发明授权
    BSI image sensor package with variable-height silicon for even reception of different wavelengths 有权
    BSI图像传感器封装，具有可变高度的硅，用于均匀接收不同的波长

    公开(公告)号：US08937361B2

    公开(公告)日：2015-01-20

    申请号：US13114243

    申请日：2011-05-24

    申请人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

    发明人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

    IPC分类号： H01L31/0232 ,  H01L27/146

    CPC分类号： H01L27/14625 ,  H01L27/1461 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687

    摘要： A microelectronic image sensor assembly for backside illumination and method of making same are provided. The assembly includes a microelectronic element having contacts exposed at a front face and light sensing elements arranged to receive light of different wavelengths through a rear face. A semiconductor region has a first thickness between the first light sensing element and the rear face and a second thickness between the second light sensing element and the rear face such that the first and second light sensing elements receive light of substantially the same intensity. A dielectric region is provided at least substantially filling a space of the semiconductor region adjacent at least one of the light sensing elements. The dielectric region may include at least one light guide.

    摘要翻译： 提供了一种用于背面照明的微电子图像传感器组件及其制造方法。 该组件包括具有在正面暴露的触点的微电子元件和被布置成通过后表面接收不同波长的光的光感测元件。 半导体区域在第一光感测元件和后表面之间具有第一厚度，并且在第二光感测元件和后表面之间具有第二厚度，使得第一和第二光感测元件接收基本上相同强度的光。 提供至少基本上填充与至少一个光感测元件相邻的半导体区域的空间的电介质区域。 电介质区域可以包括至少一个光导。

    Dual wafer spin coating
    50.
    发明授权
    Dual wafer spin coating 有权
    双晶圆片旋涂

    公开(公告)号：US08512491B2

    公开(公告)日：2013-08-20

    申请号：US12974611

    申请日：2010-12-21

    申请人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

    发明人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

    IPC分类号： B32B41/00

    CPC分类号： H01L22/12 ,  H01L21/67092

    摘要： A method of bonding a first substrate and a second substrate includes the steps of rotating first substrate with an adhesive mass thereon, and second substrate contacting the mass and overlying the first substrate, controlling a vertical height of a heated control platen spaced apart from and not contacting the second substrate so as to control a temperature of the adhesive mass, so as to at least one of bond the first and second substrates in alignment with one another, or achieve a sufficiently planar adhesive interface between the first and second substrates.

    摘要翻译： 接合第一基板和第二基板的方法包括以下步骤：使第一基板与其上的粘合剂质量物质旋转，第二基板接触物料并覆盖第一基板，控制加热的控制台板的垂直高度， 使所述第二基板接触以控制所述粘合剂物料的温度，以便使所述第一和第二基板彼此对准的至少一个接合，或在所述第一和第二基板之间实现足够平坦的粘合界面。