公开(公告)号：USRE43444E1

公开(公告)日：2012-06-05

申请号：US11285730

申请日：2005-11-23

申请人： Atsushi Nakamura ,  Kunihiko Nishi

发明人： Atsushi Nakamura ,  Kunihiko Nishi

IPC分类号： H01L23/48 ,  H01L23/31 ,  H01L23/12 ,  H01L23/498 ,  H01L23/28 ,  H01L23/13

CPC分类号： H01L24/49 ,  B29C45/0046 ,  B29C45/14655 ,  B29C45/14836 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48221 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85206 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0695 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

摘要翻译： 一种半导体器件，包括安装在基底基板的主表面的芯片安装区域上的半导体芯片，其中布置在基底衬底背面的第一电极焊盘电连接到布置在半导体芯片的主表面上的焊盘 。 基底由刚性基板形成，其第一电极焊盘电连接到布置在其背面的第二电极焊盘。 半导体芯片安装在基板的主表面的芯片安装区域上，其主表面向下，并且其焊盘通过穿过形成在其中的狭缝的接合线与基底衬底的第二电极焊盘电连接 基底。

公开(公告)号：US07754581B2

公开(公告)日：2010-07-13

申请号：US11956560

申请日：2007-12-14

申请人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

发明人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

IPC分类号： H01L21/30

CPC分类号： H01L21/46 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83194 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：形成第一和第二半导体晶片，每个半导体晶片均包括芯片和细长电极阵列，在将芯片彼此分开的划线上形成凹槽; 用粘合剂涂覆其中一个半导体晶片的表面; 将半导体晶片粘合在一起，同时允许凹槽在其中容纳过多的粘合剂; 并加热晶片以连接两个半导体晶片的细长电极。

公开(公告)号：US07528014B2

公开(公告)日：2009-05-05

申请号：US11100437

申请日：2005-04-07

申请人： Yoshinori Miyaki ,  Hiromichi Suzuki ,  Kazunari Suzuki ,  Kunihiko Nishi

发明人： Yoshinori Miyaki ,  Hiromichi Suzuki ,  Kazunari Suzuki ,  Kunihiko Nishi

IPC分类号： H01L21/00

CPC分类号： H01L24/32 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/83 ,  H01L2224/29007 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48664 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/78983 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85181 ,  H01L2224/85439 ,  H01L2224/85464 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/20753 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2924/01026 ,  H01L2924/01049 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A manufacturing method of a semiconductor device including preparing a lead frame having a die pad, leads arranged around the die pad and a silver plating layer formed over a first portion of each of the leads, mounting a semiconductor chip over a main surface of the die pad with a rear surface of the chip fixed to the main surface of the die pad, electrically connecting electrodes of the chip with the leads through wires, forming a molding resin sealing the die pad, the first portion, the semiconductor chip, and the wires, and forming a lead-free solder plating layer over a second portion of each of the leads exposed from the molding resin. An area of the die pad is smaller than an area of the chip, and a part of the molding resin contacts with the rear surface of the chip exposed from the die pad.

公开(公告)号：US07091620B2

公开(公告)日：2006-08-15

申请号：US11116209

申请日：2005-04-28

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

公开(公告)号：US06223893B1

公开(公告)日：2001-05-01

申请号：US09387049

申请日：1999-08-31

申请人： Wahei Kitamura ,  Gen Murakami ,  Kunihiko Nishi

发明人： Wahei Kitamura ,  Gen Murakami ,  Kunihiko Nishi

IPC分类号： B65D7302

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： In surface packaging of thin resin packages such as surface mount resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging. To solve this problem, the devices are sealed, by heat-sealing, in a bag moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging. The devices are packaged in a moisture-proofing bag made of a laminate film, and a desiccant is sealed, by heat-sealing the bag, in the moisture-proofing bag together with the, e.g., surface mount semiconductor device having a plastic package encapsulating the semiconductor device.

摘要翻译： 在诸如表面贴装树脂模制存储器IC等的薄树脂封装的表面封装中，由于树脂在包装之前吸收了水分，所以在焊料回流步骤中经常发生热冲击作用于封装的封装裂纹。 为了解决这个问题，这些装置在树脂模制装置的树脂干燥的组装步骤中通过热封在袋子中被密封地密封，并且在执行表面之前从袋子中取出 打包。 将装置包装在由层压膜制成的防潮袋中，并且通过将防潮袋热封在防潮袋中，并与例如具有塑料封装的表面贴装半导体装置密封干燥剂 半导体器件。

公开(公告)号：US5714405A

公开(公告)日：1998-02-03

申请号：US721240

申请日：1996-09-26

申请人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

发明人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L21/60

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2225/1029 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49121

摘要： A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

摘要翻译： 一种半导体器件，其具有通过绝缘粘合剂膜固定到半导体芯片的主表面并与半导体芯片的各个外部端子电连接的内部引线。 可以关于芯片尺寸的半导体器件被配置为使得外引线从每个内引线连续地延伸到与半导体芯片的主表面相对的后表面，以便保持引线和外部器件 导通。

公开(公告)号：US5266834A

公开(公告)日：1993-11-30

申请号：US915761

申请日：1992-07-21

申请人： Kunihiko Nishi ,  Michio Tanimoto ,  Toshihiro Yasuhara ,  Katsuhiro Tabata ,  Yasuhiro Yoshikawa ,  Isao Akima ,  Souichi Kunito ,  Toshio Nosaka ,  Hideaki Nakamura

发明人： Kunihiko Nishi ,  Michio Tanimoto ,  Toshihiro Yasuhara ,  Katsuhiro Tabata ,  Yasuhiro Yoshikawa ,  Isao Akima ,  Souichi Kunito ,  Toshio Nosaka ,  Hideaki Nakamura

IPC分类号： H01L23/495 ,  H01L25/10 ,  H01L23/02

CPC分类号： H01L23/4951 ,  H01L23/49568 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73215 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/3511

摘要： A package is provided for achieving higher packing density and higher circuit integration of memories, in particular, a structure is provided having a plurality of thin, surface mount packages which are stacked up. Each of the laminated packages includes a semiconductor pellet, leads fixed to the front surface of the pellet, a radiating plate fixed to the rear surface of the same, and a resin mold member. To achieve a stabilized laminated structure, the mold member is shaped into a convex form on the front side of the pellet and into a concave form on the rear side of the same, so that the concave portion of one package can engage with the convex portion of another package.

摘要翻译： 提供了用于实现更高的堆积密度和更高的存储器电路集成的封装，特别地，提供了具有堆叠的多个薄的表面贴装封装的结构。 每个层叠包装包括半导体颗粒，固定在颗粒的前表面的引线，固定到其后表面的散热板和树脂模制构件。 为了实现稳定的层压结构，模具构件在颗粒的前侧成形为凸形，并且在其后侧成为凹形，使得一个包装的凹部能够与凸部接合 的另一个包。

公开(公告)号：USRE41722E1

公开(公告)日：2010-09-21

申请号：US10105236

申请日：2002-03-26

申请人： Atsushi Nakamura ,  Kunihiko Nishi

发明人： Atsushi Nakamura ,  Kunihiko Nishi

IPC分类号： H01L23/49 ,  H01L23/13 ,  H01L23/48 ,  H01L23/31 ,  H01L23/12 ,  H01L23/498 ,  H01L23/28

CPC分类号： H01L24/49 ,  B29C45/0046 ,  B29C45/14655 ,  B29C45/14836 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48221 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85206 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0695 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

公开(公告)号：USRE41478E1

公开(公告)日：2010-08-10

申请号：US11182040

申请日：2005-07-15

申请人： Atsushi Nakamura ,  Kunihiko Nishi

发明人： Atsushi Nakamura ,  Kunihiko Nishi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L21/00 ,  H01L21/44

CPC分类号： H01L24/49 ,  B29C45/0046 ,  B29C45/14655 ,  B29C45/14836 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48221 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85206 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0695 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

摘要翻译： 一种半导体器件，包括安装在基底基板的主表面的芯片安装区域上的半导体芯片，其中布置在基底衬底背面的第一电极焊盘电连接到布置在半导体芯片的主表面上的焊盘 。 基底由刚性基板形成，其第一电极焊盘电连接到布置在其背面的第二电极焊盘。 半导体芯片安装在基板的主表面的芯片安装区域上，其主表面向下，并且其焊盘通过穿过形成在其中的狭缝的接合线与基底衬底的第二电极焊盘电连接 基底。

公开(公告)号：US20090109641A1

公开(公告)日：2009-04-30

申请号：US12285222

申请日：2008-09-30

申请人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

发明人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

IPC分类号： H05K7/00

CPC分类号： H05K1/0296 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L24/90 ,  H01L25/0657 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/2518 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/09 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613

摘要： A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion 20 which is provided in low melting point metal 15 for electrically connecting mutually joined wafers 61 and 62, and which defines an interval between mutually joined wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted. A joining structure of wafers 61 and 62 is manufactured by using wafers 61 and 62, at least one of which has protrusion 20. In the manufactured joining structure of wafers 61 and 62, wafers 61 and 62 are electrically connected to each other by low melting point metal 15, and protrusion 20, which defines the interval between wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted, is provided in low melting point metal 15.

摘要翻译： 用于进行三维安装的晶片（或电路板）具有突起20，该突起20设置在用于电连接相互接合的晶片61和62的低熔点金属15中，并且限定相互连接的晶片之间的间隔 61和62，在低熔点金属15熔化时不变形。 通过使用晶片61和62中的至少一个具有突起20来制造晶片61和62的接合结构。在制造的晶片61和62的接合结构中，晶片61和62通过低熔点彼此电连接 点金属15和在低熔点金属15熔化时不会变形的晶片61和62之间的间隔的突起20设置在低熔点金属15中。