公开(公告)号：US20130009286A1

公开(公告)日：2013-01-10

申请号：US13471735

申请日：2012-05-15

申请人： Young-lyong Kim ,  Jong-ho Lee ,  Moon-gi Cho ,  Hwan-sik Lim ,  Sun-hee Park

发明人： Young-lyong Kim ,  Jong-ho Lee ,  Moon-gi Cho ,  Hwan-sik Lim ,  Sun-hee Park

IPC分类号： H01L23/58

CPC分类号： H01L24/11 ,  H01L23/3128 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/02123 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03464 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/0519 ,  H01L2224/05191 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0556 ,  H01L2224/05562 ,  H01L2224/05568 ,  H01L2224/05666 ,  H01L2224/0569 ,  H01L2224/05691 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/1319 ,  H01L2224/13191 ,  H01L2224/14131 ,  H01L2224/1416 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/1435 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor chip includes stress-relief to mitigate the effects of differences in coefficients of thermal expansion (CTE) between a printed circuit board (PCB) and a semiconductor chip and a flip-chip package including the semiconductor chip. The semiconductor chip includes a stress-relief buffer coupling a bump and a semiconductor chip pad.

摘要翻译： 半导体芯片包括减轻压力以减轻印刷电路板（PCB）和半导体芯片之间的热膨胀系数（CTE）的差异以及包括半导体芯片的倒装芯片封装的影响。 半导体芯片包括耦合凸块的应力消除缓冲器和半导体芯片焊盘。

公开(公告)号：US20130082090A1

公开(公告)日：2013-04-04

申请号：US13614608

申请日：2012-09-13

申请人： Moon-gi CHO ,  Hwan-sik LIM ,  Sun-hee PARK

发明人： Moon-gi CHO ,  Hwan-sik LIM ,  Sun-hee PARK

IPC分类号： B23K31/02 ,  B23K1/20

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13024 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14104 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01046 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/014

摘要： Methods of forming connection bumps for semiconductor devices in which rewiring patterns are formed. The method includes preparing a semiconductor substrate on which a pad is partially exposed through a passivation film, forming a seed layer on the pad and passivation film, forming a photoresist pattern including an opening pattern comprising a first opening that exposes a portion of the seed layer on the pad and a second opening that exposes a portion of the seed layer on the passivation film and is separated from the first opening, performing a first electroplating to form filler layers in the opening patterns, performing a second electroplating to form a solder layer on the filler layers, removing the photoresist pattern and performing a reflow process to form a collapsed solder layer that electrically connects the filler layers to each other and a solder bump on the filler layer formed in the second opening.

摘要翻译： 形成重新布线图形的半导体器件的连接凸块的形成方法。 该方法包括制备其上通过钝化膜部分地暴露焊盘的半导体衬底，在焊盘和钝化膜上形成种子层，形成包括开口图案的光致抗蚀剂图案，该开口图案包括暴露种子层的一部分的第一开口 在所述焊盘上和第二开口，其暴露所述钝化膜上的所述种子层的一部分并且与所述第一开口分离，执行第一电镀以在所述开口图案中形成填充层，执行第二电镀以形成焊料层 填充层，去除光致抗蚀剂图案并进行回流处理，以形成将填充层彼此电连接的凹陷焊料层和形成在第二开口中的填料层上的焊料凸块。

公开(公告)号：US20110095418A1

公开(公告)日：2011-04-28

申请号：US12788901

申请日：2010-05-27

申请人： HWAN-SIK LIM ,  SUNWON KANG ,  JONGHO LEE

发明人： HWAN-SIK LIM ,  SUNWON KANG ,  JONGHO LEE

IPC分类号： H01L23/485 ,  H01L21/50

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/0603 ,  H01L2224/06515 ,  H01L2224/13025 ,  H01L2224/13028 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.

摘要翻译： 半导体封装包括具有第一凸块组和第二凸块组的半导体芯片，以及具有用于与半导体芯片进行数据通信的第一图案的封装基板和用于向半导体芯片供电或将半导体芯片接地的第二图案， 其中所述第一凸块组设置在所述第一图案上，并且所述第二凸块组设置在所述第二图案上。

公开(公告)号：US08497569B2

公开(公告)日：2013-07-30

申请号：US13042855

申请日：2011-03-08

申请人： Jin-Woo Park ,  Hwan-Sik Lim ,  Eunchul Ahn

发明人： Jin-Woo Park ,  Hwan-Sik Lim ,  Eunchul Ahn

IPC分类号： H01L21/311

CPC分类号： H01L21/50 ,  H01L21/563 ,  H01L23/48 ,  H01L23/58 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/00012

摘要： A package substrate, a semiconductor package having the same, and a method for fabricating the semiconductor package. The semiconductor package includes a semiconductor chip, a package substrate, and a molding layer. The package substrate provides a region mounted with the semiconductor chip. The molding layer is configured to mold the semiconductor chip. The package substrate includes a first opening portion that provides an open region connected electrically to the semiconductor chip and extends beyond sides of the semiconductor chip to be electrically connected to the semiconductor chip.

摘要翻译： 封装基板，具有该封装基板的半导体封装以及半导体封装的制造方法。 半导体封装包括半导体芯片，封装基板和模制层。 封装衬底提供安装有半导体芯片的区域。 模制层被配置成模制半导体芯片。 封装基板包括第一开口部分，该第一开口部分提供与半导体芯片电连接的开放区域，并且延伸超过半导体芯片的两侧以与半导体芯片电连接。

公开(公告)号：US20120129333A1

公开(公告)日：2012-05-24

申请号：US13241824

申请日：2011-09-23

申请人： Ha-Young YIM ,  Eun-Chul AHN ,  Ui-Hyoung LEE ,  Moon-Gi CHO ,  Hwan-Sik LIM

发明人： Ha-Young YIM ,  Eun-Chul AHN ,  Ui-Hyoung LEE ,  Moon-Gi CHO ,  Hwan-Sik LIM

IPC分类号： H01L21/60 ,  H01L21/768

CPC分类号： H01L24/11 ,  H01L21/76804 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/11912 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/14515 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014

摘要： Provided are a method for manufacturing a semiconductor package and a semiconductor package manufactured using the method. The method includes providing a substrate having a first region and a second region having a higher step difference than the first region, i.e., having a difference in height, forming a mask pattern having a first opening exposing a portion of the first region and a second opening exposing a portion of the second region on the substrate, forming first and second bump material films filling the first and second openings, respectively, and forming the first and second bumps by performing a reflow process on the first and second bump material films, wherein the first opening has a lower portion having the same width with the second opening and a top portion having a width greater than the second opening.

摘要翻译： 提供一种使用该方法制造的半导体封装和半导体封装的制造方法。 该方法包括提供具有第一区域和第二区域的衬底，该第一区域和第二区域具有比第一区域更高的台阶差，即，具有高度差，形成具有暴露第一区域的一部分的第一开口的掩模图案， 打开所述基板上的所述第二区域的一部分，分别形成填充所述第一和第二开口的第一和第二凸块材料膜，并且通过对所述第一和第二凸块材料膜执行回流处理来形成所述第一和第二凸块，其中 第一开口具有与第二开口具有相同宽度的下部，并且具有大于第二开口的宽度的顶部。

公开(公告)号：US20110283034A1

公开(公告)日：2011-11-17

申请号：US13076605

申请日：2011-03-31

申请人： Sun-won KANG ,  Hwan-sik LIM

发明人： Sun-won KANG ,  Hwan-sik LIM

IPC分类号： H01L23/498 ,  G06F13/14

CPC分类号： H01L23/525 ,  H01L23/49894 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/29 ,  H01L24/30 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/1412 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/29019 ,  H01L2224/29028 ,  H01L2224/291 ,  H01L2224/30151 ,  H01L2224/32106 ,  H01L2224/32227 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor chip includes a redistribution interconnect that is implemented by shorting bumps, and a semiconductor package and a system each including the semiconductor chip. The semiconductor chip includes a semiconductor substrate, a passivation film disposed on the semiconductor substrate, and a plurality of pseudo bumps disposed on the passivation film. Each pseudo bump is directly connected to adjacent pseudo bumps to form at least one redistribution interconnect.

摘要翻译： 半导体芯片包括通过短路凸起实现的再分配互连，以及包括半导体芯片的半导体封装和系统。 半导体芯片包括半导体衬底，设置在半导体衬底上的钝化膜和设置在钝化膜上的多个伪凸点。 每个伪凸块直接连接到相邻的伪凸点以形成至少一个再分布互连。

公开(公告)号：US09312213B2

公开(公告)日：2016-04-12

申请号：US14014300

申请日：2013-08-29

申请人： Moon Gi Cho ,  Young Lyong Kim ,  Sun-Hee Park ,  Hwan-Sik Lim

发明人： Moon Gi Cho ,  Young Lyong Kim ,  Sun-Hee Park ,  Hwan-Sik Lim

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02331 ,  H01L2224/02351 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/0556 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/10165 ,  H01L2224/10175 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13008 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/14133 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/05552 ,  H01L2924/00

摘要： A bump structure may include a body portion spaced apart from a pad disposed on a substrate and a first extension extending from a side of the body portion onto the pad. A second extension extends from another side of the body portion.

摘要翻译： 凸块结构可以包括与设置在基板上的焊盘间隔开的主体部分和从主体部分的侧面延伸到焊盘上的第一延伸部。 第二延伸部从主体部分的另一侧延伸。

公开(公告)号：US08680685B2

公开(公告)日：2014-03-25

申请号：US12788901

申请日：2010-05-27

申请人： Hwan-Sik Lim ,  Sunwon Kang ,  Jongho Lee

发明人： Hwan-Sik Lim ,  Sunwon Kang ,  Jongho Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/0603 ,  H01L2224/06515 ,  H01L2224/13025 ,  H01L2224/13028 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.

公开(公告)号：US20140084457A1

公开(公告)日：2014-03-27

申请号：US14014300

申请日：2013-08-29

申请人： Moon Gi CHO ,  Young Lyong KIM ,  Sun-Hee PARK ,  Hwan-Sik LIM

发明人： Moon Gi CHO ,  Young Lyong KIM ,  Sun-Hee PARK ,  Hwan-Sik LIM

IPC分类号： H01L23/498

CPC分类号： H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02331 ,  H01L2224/02351 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/0556 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/10165 ,  H01L2224/10175 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13008 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/14133 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/05552 ,  H01L2924/00

摘要： A bump structure may include a body portion spaced apart from a pad disposed on a substrate and a first extension extending from a side of the body portion onto the pad. A second extension extends from another side of the body portion.

摘要翻译： 凸块结构可以包括与设置在基板上的焊盘间隔开的主体部分和从主体部分的侧面延伸到焊盘上的第一延伸部。 第二延伸部从主体部分的另一侧延伸。

公开(公告)号：US08519470B2

公开(公告)日：2013-08-27

申请号：US13076605

申请日：2011-03-31

申请人： Sun-won Kang ,  Hwan-sik Lim

发明人： Sun-won Kang ,  Hwan-sik Lim

IPC分类号： H01L29/788

CPC分类号： H01L23/525 ,  H01L23/49894 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/29 ,  H01L24/30 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/1412 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/29019 ,  H01L2224/29028 ,  H01L2224/291 ,  H01L2224/30151 ,  H01L2224/32106 ,  H01L2224/32227 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor chip includes a redistribution interconnect that is implemented by shorting bumps, and a semiconductor package and a system each including the semiconductor chip. The semiconductor chip includes a semiconductor substrate, a passivation film disposed on the semiconductor substrate, and a plurality of pseudo bumps disposed on the passivation film. Each pseudo bump is directly connected to adjacent pseudo bumps to form at least one redistribution interconnect.

摘要翻译： 半导体芯片包括通过短路凸起实现的再分配互连，以及包括半导体芯片的半导体封装和系统。 半导体芯片包括半导体衬底，设置在半导体衬底上的钝化膜和设置在钝化膜上的多个伪凸点。 每个伪凸块直接连接到相邻的伪凸点以形成至少一个再分布互连。